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1. 发明申请

US20080284398A1 Controller having comp node voltage shift cancellation for improved discontinuous conduction mode (DCM) regulator performance and related methods 有权
标题翻译：具有comp节点电压偏移消除的控制器，用于改善不连续导通模式（DCM）调节器的性能和相关方法
公开(公告)号：US20080284398A1
公开(公告)日：2008-11-20
申请号：US11879074
申请日：2007-07-16
申请人： Weihong Qiu , Robert Isham
发明人： Weihong Qiu , Robert Isham
IPC分类号： G05F1/565
CPC分类号： H02M3/156
摘要： A modulation controller includes an error amplifier which receives a reference voltage and an output voltage (VOUT) from a switching regulator being controlled by the controller at its inputs and provides a VCOMP signal at its output, and at least one comparator, wherein a first input of the comparator is coupled to an output of the error amplifier and a second input coupled to receive a ramp signal. A VCOMP shift cancellation circuit is interposed between the first or second input of the comparator, wherein the VCOMP shift cancellation circuit improves diode conduction mode performance (DCM) of the regulator by reducing a variation in average VCOMP.
摘要翻译：调制控制器包括误差放大器，该误差放大器从其控制器在其输入处控制的开关调节器接收参考电压和输出电压（V OUT OUT），并提供V COMP >信号，以及至少一个比较器，其中比较器的第一输入耦合到误差放大器的输出端，以及耦合以接收斜坡信号的第二输入。移位消除电路插入在比较器的第一或第二输入之间，其中V COMP运动消除电路通过以下方式提高了调节器的二极管导通模式性能（DCM）：减少平均V COMP的变化。

2. 发明申请

US20070013356A1 PWM controller with dual-edge modulation using dual ramps 有权
标题翻译： PWM控制器采用双路斜坡调制
公开(公告)号：US20070013356A1
公开(公告)日：2007-01-18
申请号：US11318081
申请日：2005-12-23
申请人： Weihong Qiu , Zhixiang Liang , Robert Isham , Ben Dowlat , Rami Abou-Hamze
发明人： Weihong Qiu , Zhixiang Liang , Robert Isham , Ben Dowlat , Rami Abou-Hamze
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M3/1588 , H02M2001/0025 , H02M2003/1566 , Y02B70/1466
摘要： A dual-edge modulation controller including first and second ramp circuits, first and second comparators, an error amplifier and pulse control logic. The first ramp circuit provides a leading-edge ramp synchronous with a clock. The error amplifier compares a feedback signal with a reference and provides a compensation signal. The first comparator compares the leading-edge ramp with the compensation signal and asserts a set signal. The second ramp circuit provides a trailing-edge ramp that begins ramping when the set signal is asserted. The second comparator compares the trailing-edge ramp with the compensation signal and asserts a reset signal. The pulse control logic asserts a PWM signal when the set signal is asserted and de-asserts the PWM signal when the reset signal is asserted. The controller may control multiple phases with current balancing. The slew rate of the ramps may be adjusted based on the number of PWM signal asserted.
摘要翻译：包括第一和第二斜坡电路，第一和第二比较器，误差放大器和脉冲控制逻辑的双边缘调制控制器。第一个斜坡电路提供与时钟同步的前沿斜坡。误差放大器将反馈信号与参考值进行比较，并提供补偿信号。第一个比较器将前沿斜坡与补偿信号进行比较，并置位一个置位信号。第二斜坡电路提供一个后沿斜坡，当设定信号被断言时开始斜坡。第二个比较器将后沿斜坡与补偿信号进行比较，并确定复位信号。当置位信号置位时，脉冲控制逻辑置位PWM信号，并在复位信号置位时取消置位PWM信号。控制器可以通过电流平衡控制多个相。斜坡的转换速率可以根据断言的PWM信号的数量进行调整。

3. 发明授权

US07898310B2 Phase doubler 有权
标题翻译：相位倍增器
公开(公告)号：US07898310B2
公开(公告)日：2011-03-01
申请号：US12429238
申请日：2009-04-24
申请人： Weihong Qui , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
发明人： Weihong Qui , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
IPC分类号： H03K3/00
CPC分类号： H02M3/1584
摘要： A phase doubler driver circuit includes first control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to an input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current.
摘要翻译：相位倍增器驱动器电路包括第一控制逻辑产生响应于输入PWM驱动信号的第一输出PWM驱动信号和第二输出PWM驱动信号。在第一操作模式中，输入PWM驱动的交替脉冲分别作为第一输出PWM驱动信号和第二PWM输出驱动信号输出。在第二操作模式中，当与第二输出PWM驱动信号相关联的第二相电流超过与第一输出PWM驱动信号和输入相关联的第一相电流时，输入PWM驱动信号被提供为第一输出PWM驱动信号当与第一输出PWM信号相关联的相电流超过与第二输出PWM信号相关的相电流时，提供PWM驱动信号作为第二输出PWM驱动信号。第二控制逻辑响应于与第一相电流相关联的第一电流与平均电流之间的差异，并且将偏移加到第二输出PWM信号的下降沿，将补偿添加到第一输出PWM驱动信号的下降沿响应于与第二相电流相关联的第二电流之间的差异。

4. 发明授权

US07782035B2 Controller and driver communication for switching regulators 有权
标题翻译：用于开关稳压器的控制器和驱动器通信
公开(公告)号：US07782035B2
公开(公告)日：2010-08-24
申请号：US11935535
申请日：2007-11-06
申请人： Chun Cheung , Weihong Qiu , Robert Isham
发明人： Chun Cheung , Weihong Qiu , Robert Isham
IPC分类号： G05F1/40
CPC分类号： H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译：脉冲宽度调制（PWM）控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。响应于识别低功率模式，控制器产生具有至少三（3）个不同电平的PWM模式信号，包括耦合到至少一个驱动器的至少一个中间电平。基于PWM模式信号，调节器切换到省电低功耗工作模式。

5. 发明申请

US20100079175A1 PHASE DOUBLER 有权
标题翻译：相位双打
公开(公告)号：US20100079175A1
公开(公告)日：2010-04-01
申请号：US12429238
申请日：2009-04-24
申请人： Weihong Qiu , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
发明人： Weihong Qiu , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
IPC分类号： H03K3/00 , H03K5/04
CPC分类号： H02M3/1584
摘要： A phase doubler driver circuit includes a first input for receiving a input PWM drive signal. First control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to the input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current and the average current, wherein the average current comprises the average of the first current and the second current. Drive circuitry generates drive signals responsive to each of the first output PWM drive signal and the second output PWM drive signal.
摘要翻译：倍增器驱动器电路包括用于接收输入PWM驱动信号的第一输入端。第一控制逻辑产生响应于输入PWM驱动信号的第一输出PWM驱动信号和第二输出PWM驱动信号。在第一操作模式中，输入PWM驱动的交替脉冲分别作为第一输出PWM驱动信号和第二PWM输出驱动信号输出。在第二操作模式中，当与第二输出PWM驱动信号相关联的第二相电流超过与第一输出PWM驱动信号和输入相关联的第一相电流时，输入PWM驱动信号被提供为第一输出PWM驱动信号当与第一输出PWM信号相关联的相电流超过与第二输出PWM信号相关的相电流时，提供PWM驱动信号作为第二输出PWM驱动信号。第二控制逻辑响应于与第一相电流相关联的第一电流与平均电流之间的差异，并且将偏移加到第二输出PWM信号的下降沿，将补偿添加到第一输出PWM驱动信号的下降沿响应于与第二相电流相关联的第二电流与平均电流之间的差异，其中平均电流包括第一电流和第二电流的平均值。驱动电路根据第一输出PWM驱动信号和第二输出PWM驱动信号中的每一个产生驱动信号。

6. 发明申请

US20070109825A1 ADAPTIVE PWM PULSE POSITIONING FOR FAST TRANSIENT RESPONSE 有权
标题翻译：自适应PWM脉冲定位快速瞬态响应
公开(公告)号：US20070109825A1
公开(公告)日：2007-05-17
申请号：US11383878
申请日：2006-05-17
申请人： Weihong Qiu , Robert Isham , Zhixiang Liang
发明人： Weihong Qiu , Robert Isham , Zhixiang Liang
IPC分类号： H02M1/12
CPC分类号： H02M3/156 , H02M3/33507
摘要： An adaptive pulse positioning system for a voltage converter providing an output voltage, the system including a PWM generation circuit, a sensor, and a pulse positioning circuit. The PWM generation circuit generates a PWM signal with PWM pulses for controlling the output voltage of the voltage controller. The sensor senses an output load condition of the voltage converter and provides a load signal indicative thereof. The pulse positioning circuit adaptively positions the PWM pulses based on the load signal. A method of adaptively positioning PWM pulses that are used to control an output voltage of a voltage regulator including generating a series of PWM pulses based on a clock signal, sensing an output load condition, and adaptively shifting the series of PWM pulses based on the output load condition.
摘要翻译：一种用于提供输出电压的电压转换器的自适应脉冲定位系统，该系统包括PWM生成电路，传感器和脉冲定位电路。 PWM生成电路生成PWM信号，PWM脉冲用于控制电压控制器的输出电压。传感器感测电压转换器的输出负载状态，并提供指示其的负载信号。脉冲定位电路根据负载信号自适应地定位PWM脉冲。一种自适应地定位用于控制电压调节器的输出电压的PWM脉冲的方法，包括基于时钟信号产生一系列PWM脉冲，感测输出负载条件，以及基于输出自适应地移位一系列PWM脉冲负载条件。

7. 发明申请

US20070108954A1 Compensation offset adjustment scheme for fast reference voltage transitioning 有权
标题翻译：用于快速参考电压转换的补偿偏移调整方案
公开(公告)号：US20070108954A1
公开(公告)日：2007-05-17
申请号：US11395909
申请日：2006-03-31
申请人： Weihong Qiu , Robert Isham , Zhixiang Liang
发明人： Weihong Qiu , Robert Isham , Zhixiang Liang
IPC分类号： G05F1/00
CPC分类号： H02M3/156
摘要： A PWM control circuit for a voltage regulator including a compensation network, a ramp generator providing a ramp voltage, an offset adjust circuit and a comparator circuit. The compensation network senses the output voltage, receives a reference voltage, and outputs a compensation voltage. The offset adjust circuit adjusts a selected one of the ramp voltage and the compensation voltage based on the reference voltage. The comparator circuit compares the compensation voltage with the ramp voltage and provides a PWM signal for controlling the output voltage. The offset adjust circuit may generate an offset voltage based on the reference voltage and a gain G of the voltage regulator. The offset adjust circuit may subtract the offset voltage from either the ramp voltage or the compensation voltage to provide an adjusted voltage to the comparator circuit.
摘要翻译：一种用于包括补偿网络的电压调节器的PWM控制电路，提供斜坡电压的斜坡发生器，偏移调整电路和比较器电路。补偿网络感测输出电压，接收参考电压，并输出补偿电压。偏移调整电路根据参考电压调整斜坡电压和补偿电压中选择的一个。比较器电路将补偿电压与斜坡电压进行比较，并提供用于控制输出电压的PWM信号。偏移调整电路可以基于参考电压和电压调节器的增益G产生偏移电压。偏移调整电路可以从斜坡电压或补偿电压中减去偏移电压，以向比较器电路提供经调整的电压。

8. 发明授权

US08115468B2 Controller and driver communication for switching regulators 有权
标题翻译：用于开关稳压器的控制器和驱动器通信
公开(公告)号：US08115468B2
公开(公告)日：2012-02-14
申请号：US13025453
申请日：2011-02-11
申请人： Chun Cheung , Weihong Qui , Robert Isham
发明人： Chun Cheung , Weihong Qui , Robert Isham
IPC分类号： G05F1/40
CPC分类号： H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译：脉冲宽度调制（PWM）控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。响应于识别低功率模式，控制器产生具有至少三（3）个不同电平的PWM模式信号，包括耦合到至少一个驱动器的至少一个中间电平。基于PWM模式信号，调节器切换到省电低功耗工作模式。

9. 发明申请

US20110133717A1 CONTROLLER AND DRIVER COMMUNICATION FOR SWITCHING REGULATORS 有权
公开(公告)号：US20110133717A1
公开(公告)日：2011-06-09
申请号：US13025471
申请日：2011-02-11
申请人： Chun Cheung , Weihong Qui , Robert Isham
发明人： Chun Cheung , Weihong Qui , Robert Isham
IPC分类号： G05F1/618
CPC分类号： H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

10. 发明申请

US20110133716A1 CONTROLLER AND DRIVER COMMUNICATION FOR SWITCHING REGULATORS 有权
标题翻译：用于切换调节器的控制器和驱动器通信
公开(公告)号：US20110133716A1
公开(公告)日：2011-06-09
申请号：US13025453
申请日：2011-02-11
申请人： Chun Cheung , Weihong Qiu , Robert Isham
发明人： Chun Cheung , Weihong Qiu , Robert Isham
IPC分类号： G05F1/618
CPC分类号： H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译：脉冲宽度调制（PWM）控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。响应于识别低功率模式，控制器产生具有至少三（3）个不同电平的PWM模式信号，包括耦合到至少一个驱动器的至少一个中间电平。基于PWM模式信号，调节器切换到省电低功耗工作模式。

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