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1. 发明授权

US10163511B2 Nonvolatile memory device and storage device including nonvolatile memory device 有权
公开(公告)号：US10163511B2
公开(公告)日：2018-12-25
申请号：US15614671
申请日：2017-06-06
申请人： Sang-Wan Nam , Sang-In Park
发明人： Sang-Wan Nam , Sang-In Park
IPC分类号： G11C7/22 , G11C16/08 , G11C8/06 , G11C11/408 , G11C11/4099 , G11C16/34 , G11C16/10 , G11C29/02 , H03K19/02
摘要： A nonvolatile memory device includes a memory cell array, a row decoder circuit, a page buffer circuit, and a control logic circuit. The control logic circuit controls the row decoder circuit and the page buffer circuit to perform: (1) a pre-program of sequentially selecting a plurality of memory blocks and increasing threshold voltages of string selection transistors or ground selection transistors of the selected memory block and (2) after the pre-program is completed, a main program of sequentially selecting the plurality of memory blocks, programming string selection transistors or ground selection transistors of the selected memory block, and performing a verification by using a verification voltage.

2. 发明授权

US09721664B2 Memory devices and methods of operating the memory devices by programming normal cells after programming a first dummy cell 有权
公开(公告)号：US09721664B2
公开(公告)日：2017-08-01
申请号：US14605433
申请日：2015-01-26
申请人： Sang-wan Nam , Kyung-min Kang
发明人： Sang-wan Nam , Kyung-min Kang
IPC分类号： G11C11/34 , G11C16/10 , G11C16/04 , G11C7/14
CPC分类号： G11C16/10 , G11C7/14 , G11C16/0483
摘要： A method of operating a memory device including a first memory block having a plurality cell strings is provided. Each of the plurality of cell strings includes a string selection transistor connected in series to a first dummy cell, a plurality of normal cells, a second dummy cell and a ground selection transistor. The method includes programming the first dummy cell, and programming the normal cells in at least one of the cell strings after the programming the first dummy cell. The normal cells are selected based on a first program command inputted to the memory device. The programming the first dummy cell is performed at least twice before the normal cells are programmed. A number of times of programming the first dummy cell is different according to a level of a voltage applied to the first dummy cell and a level of a voltage applied to the normal cells.

3. 发明申请

US20170168742A1 MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF OPERATING MEMORY DEVICE 审中-公开
公开(公告)号：US20170168742A1
公开(公告)日：2017-06-15
申请号：US15443647
申请日：2017-02-27
申请人： SANG-WAN NAM , Doo-Hyun Kim , Dae-Seok Byeon , Chi-Weon Yoon
发明人： SANG-WAN NAM , Doo-Hyun Kim , Dae-Seok Byeon , Chi-Weon Yoon
IPC分类号： G06F3/06
CPC分类号： G06F3/0619 , G06F3/061 , G06F3/0644 , G06F3/0655 , G06F3/0688 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/34 , G11C16/3459 , H01L27/11582
摘要： A memory device is provided as follows. A memory cell region includes a plurality of blocks, each block including a plurality of NAND strings. A control logic divides the plurality of blocks into a plurality of block regions based on a smaller distance of a first distance with respect to a first edge of the memory cell region and a second distance with respect to a second edge of the memory cell region and controls an operation performed on the memory cell region using a plurality of bias sets of operation parameters for the operation. Each bias set is associated with one of the block regions.

4. 发明申请

US20160322107A1 3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME 审中-公开
标题翻译：具有不同密码字线的3D闪存存储器件和包括其中的数据存储器件
公开(公告)号：US20160322107A1
公开(公告)日：2016-11-03
申请号：US15210628
申请日：2016-07-14
申请人： SANG-WAN NAM , KITAE PARK
发明人： SANG-WAN NAM , KITAE PARK
IPC分类号： G11C16/04 , G11C16/10 , G11C16/16 , G11C16/08
CPC分类号： G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/3427
摘要： A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.
摘要翻译：三维（3D）闪速存储器包括设置在接地选择线和最下面的主字线之间的第一虚拟字线和设置在弦选择线和最上主字线之间的不同字线配置的第二虚拟字线字线。

5. 发明申请

US20160232981A1 NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME 审中-公开
公开(公告)号：US20160232981A1
公开(公告)日：2016-08-11
申请号：US15130237
申请日：2016-04-15
申请人： Sang-Wan NAM
发明人： Sang-Wan NAM
IPC分类号： G11C16/26 , G11C16/34 , G11C16/04
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/08 , G11C16/34 , G11C16/3418 , G11C16/3427 , G11C16/3459 , H01L27/11582
摘要： According to example embodiments, an operation method of a nonvolatile memory device includes determining a location of a selected word line among word lines connected to the nonvolatile memory device, selecting one of a plurality of different read disturbance reducing modes according to the location of the selected word line, and performing a read or verification operation according to the selected read disturbance reducing modes. The nonvolatile memory device includes cell strings. Each one of the cell strings includes memory cells stacked on top of each other in a direction perpendicular to the substrate and between a ground select transistor and a string select transistor. The ground select transistor is between the substrate and the number of the memory cells. The string select transistor is connected to a bit line and is between the bit line and the number of the memory cells.

6. 发明授权

US09318202B2 Nonvolatile memory device and method of operating the same 有权
标题翻译：非易失存储器件及其操作方法
公开(公告)号：US09318202B2
公开(公告)日：2016-04-19
申请号：US14681748
申请日：2015-04-08
申请人： Sang-Wan Nam
发明人： Sang-Wan Nam
IPC分类号： G11C16/26 , G11C16/04 , G11C17/08 , G11C16/34
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/08 , G11C16/34 , G11C16/3418 , G11C16/3427 , G11C16/3459 , H01L27/11582
摘要： According to example embodiments, an operation method of a nonvolatile memory device includes determining a location of a selected word line among word lines connected to the nonvolatile memory device, selecting one of a plurality of different read disturbance reducing modes according to the location of the selected word line, and performing a read or verification operation according to the selected read disturbance reducing modes. The nonvolatile memory device includes cell strings. Each one of the cell strings includes memory cells stacked on top of each other in a direction perpendicular to the substrate and between a ground select transistor and a string select transistor. The ground select transistor is between the substrate and the number of the memory cells. The string select transistor is connected to a bit line and is between the bit line and the number of the memory cells.
摘要翻译：根据示例实施例，非易失性存储器件的操作方法包括：确定连接到非易失性存储器件的字线中所选字线的位置，根据所选择的位置选择多个不同的读干扰减少模式之一字线，并且根据所选择的读取干扰降低模式执行读取或验证操作。非易失性存储器件包括单元串。单元串中的每一个包括在垂直于衬底的方向上以及接地选择晶体管和串选择晶体管之间彼此叠置的存储单元。接地选择晶体管位于衬底和存储器单元的数量之间。串选择晶体管连接到位线，位于位线和存储单元数之间。

7. 发明授权

US09293206B2 Memory system including nonvolatile memory device and erase method thereof 有权
标题翻译：包括非易失性存储装置的存储系统及其擦除方法
公开(公告)号：US09293206B2
公开(公告)日：2016-03-22
申请号：US14534200
申请日：2014-11-06
申请人： Sang-Wan Nam
发明人： Sang-Wan Nam
IPC分类号： G11C16/14 , G11C16/04 , G11C16/34
CPC分类号： G11C16/14 , G11C16/0483 , G11C16/3445
摘要： An erase method of a three-dimensional nonvolatile memory device may include receiving an erase command, applying an erase voltage to perform an erase operation to a selected memory region in response to the erase command, suspending the erase operation by cutting off the erase voltage after a specific time has elapsed from when the erase voltage is applied, receiving a resume command after a reference time has elapsed from when the erase operation is suspended, and applying the erase voltage to the memory region for the specific time according to the resume command.
摘要翻译：三维非易失性存储器件的擦除方法可以包括接收擦除命令，施加擦除电压以对擦除指令执行擦除操作到所选择的存储区域，通过在擦除指令之后切断擦除电压来暂停擦除操作从施加擦除电压起经过了特定的时间，在从擦除操作中断起经过基准时间之后接收恢复命令，并根据恢复命令将该擦除电压施加到特定时间的存储区域。

8. 发明授权

US09183943B2 Nonvolatile memory device and control method thereof 有权
标题翻译：非易失性存储器件及其控制方法
公开(公告)号：US09183943B2
公开(公告)日：2015-11-10
申请号：US14104406
申请日：2013-12-12
申请人： Yang-Lo Ahn , Sang-Wan Nam , Sang-Won Shim
发明人： Yang-Lo Ahn , Sang-Wan Nam , Sang-Won Shim
IPC分类号： G11C16/34
CPC分类号： G11C16/3427 , G11C16/3422
摘要： A vertical nonvolatile memory device which includes a plurality of cell strings formed in a direction intersecting with a substrate is provided. The vertical nonvolatile memory device is configured to apply a non-selection read voltage to at least one selection line connected to a cell string from among the plurality of cell strings. The vertical nonvolatile memory device is configured to apply the non-selection read voltage to at least one unselected word line of the cell string a desired time period after the applying of the non-selection read voltage to the at least one selection line.
摘要翻译：提供一种垂直非易失性存储装置，其包括在与基板相交的方向上形成的多个单元串。垂直非易失性存储器件被配置为向多个单元串中的连接到单元串的至少一个选择线施加非选择读取电压。垂直非易失性存储器件被配置为在将非选择读取电压施加到至少一个选择线之后的所需时间周期内将非选择读取电压施加到单元串的至少一个未选择的字线。

9. 发明申请

US20150287479A1 NON-VOLATILE MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件，存储器系统和操作非易失性存储器件的方法
公开(公告)号：US20150287479A1
公开(公告)日：2015-10-08
申请号：US14616281
申请日：2015-02-06
申请人： Sang-wan NAM , Byung-gil JEON , Dae-seok BYEON
发明人： Sang-wan NAM , Byung-gil JEON , Dae-seok BYEON
IPC分类号： G11C29/38 , G11C29/12
CPC分类号： G11C29/025 , G11C2029/1202 , G11C2029/5006
摘要： Provided are a non-volatile memory device, a memory system, and a method of operating the non-volatile memory device. The method includes: performing a user operation according to at least one mode selected from among a writing mode, a reading mode, and an erasing mode with respect to a memory cell array; setting up voltages of a plurality of word lines; floating at least one word line from among the plurality of word lines, the voltages of which are set up, according to the at least one selected mode; and detecting whether the at least one word line has a progressive defect, according to a result of detecting a voltage level of the at least one floated word line.
摘要翻译：提供了非易失性存储器件，存储器系统和操作非易失性存储器件的方法。该方法包括：根据从存储单元阵列的写入模式，读取模式和擦除模式中选择的至少一种模式执行用户操作; 设置多个字线的电压; 根据所述至少一个选择的模式，从所述多个字线中的至少一个字线漂移其电压被设置; 以及根据检测所述至少一个浮动字线的电压电平的结果来检测所述至少一个字线是否具有渐进缺陷。

10. 发明申请

US20150221381A1 MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY DEVICE AN ERASE METHOD THEREOF 有权
标题翻译：包括非易失性存储器件的存储器系统及其擦除方法
公开(公告)号：US20150221381A1
公开(公告)日：2015-08-06
申请号：US14534200
申请日：2014-11-06
申请人： SANG-WAN NAM
发明人： SANG-WAN NAM
IPC分类号： G11C16/14 , G11C16/34 , G11C16/04
CPC分类号： G11C16/14 , G11C16/0483 , G11C16/3445
摘要： An erase method of a three-dimensional nonvolatile memory device may include receiving an erase command, applying an erase voltage to perform an erase operation to a selected memory region in response to the erase command, suspending the erase operation by cutting off the erase voltage after a specific time has elapsed from when the erase voltage is applied, receiving a resume command after a reference time has elapsed from when the erase operation is suspended, and applying the erase voltage to the memory region for the specific time according to the resume command.
摘要翻译：三维非易失性存储器件的擦除方法可以包括接收擦除命令，施加擦除电压以对擦除指令执行擦除操作到所选择的存储区域，通过在擦除指令之后切断擦除电压来暂停擦除操作从施加擦除电压起经过了特定的时间，在从擦除操作中断起经过基准时间之后接收恢复命令，并根据恢复命令将该擦除电压施加到特定时间的存储器区域。

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