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    • 5. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US07160816B2
    • 2007-01-09
    • US10735729
    • 2003-12-16
    • Seong-Wook Lee
    • Seong-Wook Lee
    • H01L21/302
    • H01L27/10894H01L21/0274H01L21/31111H01L21/31144H01L27/1052
    • The present invention relates to a method for fabricating a semiconductor device. In more detail of the aforementioned method, a first mask layer covering a cell region is formed on an insulation layer in the cell region. Meanwhile, a second mask layer is formed in a peripheral circuit region with a predetermined distance from the first mask layer. The insulation layer is then etched with use of the first and the second mask layers as an etch mask to form a spacer at both sidewalls of each gate line pattern in the peripheral region and simultaneously form a guard beneath the second mask layer. The first and the second mask layers are removed thereafter. Next, a third mask layer opening the cell region but covering the whole regions including a guard region in the peripheral circuit region is formed. A wet etching process is performed to the insulation layer remaining in the cell region by using the third mask layer as an etch mask.
    • 本发明涉及半导体器件的制造方法。 更详细地说,在单元区域的绝缘层上形成覆盖单元区域的第一掩模层。 同时,在距离第一掩模层预定距离的外围电路区域中形成第二掩模层。 然后使用第一和第二掩模层作为蚀刻掩模来蚀刻绝缘层,以在外围区域中的每个栅极线图案的两个侧壁处形成间隔物,同时在第二掩模层下方形成保护层。 此后除去第一和第二掩模层。 接下来,形成开口单元区域但覆盖包括外围电路区域中的保护区域的整个区域的第三掩模层。 通过使用第三掩模层作为蚀刻掩模,对残留在单元区域中的绝缘层进行湿蚀刻处理。