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1. 发明授权

US4289928A Tone control arrangement for use in sound reproducing instruments 失效
标题翻译：用于声音再现乐器的音调控制装置
公开(公告)号：US4289928A
公开(公告)日：1981-09-15
申请号：US817649
申请日：1977-07-21
申请人： Saburo Takaoka , Ryozi Higashi
发明人： Saburo Takaoka , Ryozi Higashi
IPC分类号： H03G3/12 , H03G5/02 , H03G5/04 , H03G5/10 , H04M1/00
CPC分类号： H03G5/04 , H03G5/10
摘要： A tone control arrangement is disclosed which is suitable for use in various sound reproducing instruments and in which the signal-to-noise ratio of the reproduced sound can be improved by controlling the frequency response of the audible signal with a variable d.c. voltage source. Frequency response control by a single d.c. control voltage is achieved by connecting in series and in order a first mixer, passive circuit network having a signal transmission characteristic determined by the desired frequency response of the output sound signal to be reproduced, a multiplier and a second mixer. The inverting inputs of the first and second mixers both receive the output of the multiplier, while the non-inverting input of the first mixer receives the input audio signal. The non-inverting input of the second mixer receives either the output of the first mixer or the input audio signal. Finally, the second input to the multiplier is provided by a variable d.c. voltage source. Tone control is achieved through a single control member even in the case of multi-channel systems by either using a single potentiometer wiper in common as the second input to each of the multipliers in the respective channels, or by ganging together a plurality of potentiometer wipers for control by a single member.
摘要翻译：公开了一种适用于各种声音再现装置的音调控制装置，其中可以通过以可变直流电流控制可听信号的频率响应来改善再现声音的信噪比。电压源。频率响应控制由单个直流控制电压通过串联连接，并且按照第一混频器，具有由要再现的输出声音信号的期望频率响应确定的信号传输特性的无源电路网络，乘法器和第二混频器来实现。第一和第二混频器的反相输入都接收乘法器的输出，而第一混频器的同相输入接收输入音频信号。第二混频器的同相输入接收第一混频器的输出或输入音频信号。最后，乘法器的第二个输入由变量d.c. 电压源。即使在多通道系统的情况下也可以通过使用单个电位器刮水器作为相应通道中的每个乘法器的第二输入，或通过将多个电位计擦拭器组合在一起而实现音调控制由单一成员控制。

2. 发明授权

US4210828A Device for improving output waveform of manually controllable pulse generator for use in preset electronic tuning control device 失效
标题翻译：用于改善用于预设电子调谐控制装置的手动可控脉冲发生器的输出波形的装置
公开(公告)号：US4210828A
公开(公告)日：1980-07-01
申请号：US912143
申请日：1978-06-02
申请人： Saburo Takaoka , Youichiro Tsuda
发明人： Saburo Takaoka , Youichiro Tsuda
IPC分类号： H03L7/18 , H03J5/02 , H03L7/183 , H04B1/26 , H03K5/153
CPC分类号： H03J5/0245 , H03J5/0263
摘要： An output waveform of a manually operable tuning pulse generator of an electronic preset type tuning control device of a tuner using varactor diodes for a multi-band radio receiver is improved by using Schmitt trigger circuit means which may be provided with a trigger level checking circuit, both being provided as IC.
摘要翻译：使用施密特触发电路装置，可以提供触发电平检查电路，改善使用用于多频带无线电接收机的变容二极管的调谐器的电子预置型调谐控制装置的可手动调谐脉冲发生器的输出波形，两者均作为IC提供。

3. 发明授权

US4177411A Speed-and-phase control circuit for a rotary machine 失效
标题翻译：旋转机的速相相位控制电路
公开(公告)号：US4177411A
公开(公告)日：1979-12-04
申请号：US929053
申请日：1978-07-28
申请人： Saburo Takaoka
发明人： Saburo Takaoka
IPC分类号： G05D13/62 , H02P23/00 , H02P29/00
CPC分类号： H02P23/186 , Y10S388/902 , Y10S388/915
摘要： A speed-and-phase control circuit for a rotary machine. A frequency divider is responsive to an input signal whose frequency is proportional to the revolution number of the rotary machine. The frequency divider provides as a first output signal a frequency-divided version of the input signal. A logical circuit is responsive to the input signal and to the first output signal. The logical circuit provides in timed relationship first, second and third timing pulses. The pulse width of the first timing pulse and of the second timing pulse is equal to a half period of the input signal. The pulse width of the second timing pulse is equal to one period of the input signal. The rising edge of the first timing pulse is substantially coincident with the falling edge of the input signal, the rising edge of the second timing pulse is substantially coincident with the falling edge of the first timing pulse, and the rising edge of the third timing pulse is substantially coincident with the falling edge of the second timing pulse. A charging circuit charges a first capacitor to a predetermined voltage level in response to the first timing pulse. A discharge circuit discharges according to the constant current mode the first capacitor circuit in response to the second timing pulse. A first gate circuit transfers the charge present on the first capacitor circuit to a second capacitor circuit in response to the second timing pulse. A second gate circuit transfer the charge present on the first capacitor circuit to a third capacitor circuit in response to a reference pulse having a reference phase. The speed and phase of the rotary machine is selectively controlled in accordance with the voltages present on the second and third capacitor circuits.
摘要翻译：一种用于旋转机器的速相相位控制电路。分频器响应于其频率与旋转机器的转数成比例的输入信号。分频器提供输入信号的分频版本作为第一输出信号。逻辑电路响应于输入信号和第一输出信号。逻辑电路以定时关系提供第一，第二和第三定时脉冲。第一定时脉冲和第二定时脉冲的脉冲宽度等于输入信号的半周期。第二定时脉冲的脉冲宽度等于输入信号的一个周期。第一定时脉冲的上升沿基本上与输入信号的下降沿一致，第二定时脉冲的上升沿基本上与第一定时脉冲的下降沿一致，并且第三定时脉冲的上升沿基本上与第二定时脉冲的下降沿一致。充电电路响应于第一定时脉冲将第一电容器充电至预定电压电平。放电电路响应于第二定时脉冲，根据恒流模式对第一电容器电路进行放电。第一门电路响应于第二定时脉冲将第一电容器电路上存在的电荷传送到第二电容器电路。第二门电路响应于具有参考相位的参考脉冲将第一电容器电路上存在的电荷传送到第三电容器电路。根据存在于第二和第三电容器电路上的电压来选择性地控制旋转机器的速度和相位。

4. 发明授权

US4890170A Waveform equalization circuit for a magnetic reproducing device 失效
标题翻译：用于磁再现装置的波形均衡电路
公开(公告)号：US4890170A
公开(公告)日：1989-12-26
申请号：US234863
申请日：1988-08-22
申请人： Haruyuki Inohana , Saburo Takaoka , Hideaki Takada
发明人： Haruyuki Inohana , Saburo Takaoka , Hideaki Takada
IPC分类号： H03H11/04 , G11B5/035 , G11B20/10 , H04B3/04
CPC分类号： G11B5/035 , G11B20/10009
摘要： In a waveform equalization circuit, a digital signal is applied through a first network having a transfer function defined by four angular frequencies to one of the inversion and non-inversion input terminals of an amplifier and through a second network having a transfer function made up of a constant to the other input terminal, so that the digital signal subjected to waveform equalization is provided at the output terminal, whereby according to the transfer characteristic of the recording or reproducing system, the most suitable waveform equalization characteristic can be obtained with ease.
摘要翻译：在波形均衡电路中，数字信号通过具有由四个角频率定义的传递函数的第一网络施加到放大器的反相和非反相输入端之一，并通过具有由使得在输出端提供经受波形均衡的数字信号，由此根据记录或再现系统的传送特性，可以容易地获得最合适的波形均衡特性。

5. 发明授权

US4328465A Tone control circuit utilizing variable gain amplifier 失效
标题翻译：音调控制电路利用可变增益放大器
公开(公告)号：US4328465A
公开(公告)日：1982-05-04
申请号：US78269
申请日：1979-09-24
申请人： Saburo Takaoka , Ryozi Higashi , Hiroyuki Hirano
发明人： Saburo Takaoka , Ryozi Higashi , Hiroyuki Hirano
IPC分类号： H03G3/00 , H03G3/04 , H03G5/00
CPC分类号： H03G3/00 , H03G3/04 , H03G5/00
摘要： A tone control circuit includes a variable gain amplifier circuit, a first mixer combining the variable gain amplifier output with a tone control circuit input and providing its output signal to the variable gain amplifier input, and a second mixer combining the outputs of the first mixer and variable gain amplifier. The mixers may be either adders or subtractors as long as the natural logarithm of the overall gain of the tone control circuit varies substantially linearly with changes in the feedback ratio of the variable gain amplifier.
摘要翻译：音调控制电路包括可变增益放大器电路，将可变增益放大器输出与音调控制电路输入组合并将其输出信号提供给可变增益放大器输入的第一混频器，以及将第一混频器和可变增益放大器。混音器可以是加法器或减法器，只要音调控制电路的总体增益的自然对数随着可变增益放大器的反馈比的变化而基本线性地变化。

6. 发明授权

US4145664A Audio signal compression and expansion system 失效
标题翻译：音频信号压缩和扩展系统
公开(公告)号：US4145664A
公开(公告)日：1979-03-20
申请号：US892356
申请日：1978-03-31
申请人： Saburo Takaoka , Fumihiko Yokogawa , Tadahiro Yamaguchi
发明人： Saburo Takaoka , Fumihiko Yokogawa , Tadahiro Yamaguchi
IPC分类号： H04B1/62 , G11B20/04 , H03G7/00 , H03G9/02 , H04B1/64 , H03G7/08
CPC分类号： H04B1/64 , H03G9/025
摘要： The auxilliary signal path in a compander system includes, in series, a first amplifier 7, a weighting function amplifier 8, and a detection circuit 9. The output of the latter controls the gain of a voltage-controlled variable gain circuit 11 also connected to the first amplifier output, and the integrated output of the variable gain circuit is fed back to the input of the first amplifier via a subtraction circuit 13 also supplied with the auxilliary signal path input. Alternatively, the first amplifier may comprise an operational amplifier, in which case the integrated signal is directly coupled to one of its inputs.
摘要翻译：压缩扩展器系统中的辅助信号路径包括串联的第一放大器7，加权函数放大器8和检测电路9.后者的输出控制也连接到的控制可变增益电路11的增益第一放大器输出和可变增益电路的积分输出经由还具有辅助信号路径输入的减法电路13反馈到第一放大器的输入端。或者，第一放大器可以包括运算放大器，在这种情况下，集成信号直接耦合到其输入之一。

7. 发明授权

US4066935A Stator winding control circuit for a brushless d.c. motor 失效
标题翻译：无刷直流定子绕组控制电路发动机
公开(公告)号：US4066935A
公开(公告)日：1978-01-03
申请号：US728325
申请日：1976-09-30
申请人： Saburo Takaoka , Norikazu Fujie
发明人： Saburo Takaoka , Norikazu Fujie
IPC分类号： H02P6/22 , H02P6/00 , H02K29/00
CPC分类号： H02P6/30
摘要： A brushless d.c. motor includes a plurality of Hall elements 1-3 for detecting the relative positions of the rotor and stator poles, a comparator circuit 103 responsive to a bipolar input control signal A for generating an output signal B proportional to the absolute magnitude of signal A and an output signal D as a function of the polarity of signal A, a timing signal generator 104 for generating output signals E timed in relation to the Hall element outputs F and having a phase sequence in response to signal D, and a reversible current supply circuit 105 for driving a set of Y-connected stator windings 101 with currents C having a magnitude proportional to signal B and a phase sequence in accordance with signal E.
摘要翻译：无刷直流马达包括用于检测转子和定子极的相对位置的多个霍尔元件1-3，响应于双极性输入控制信号A的比较器电路103，用于产生与信号A的绝对幅度成比例的输出信号B和输出信号D作为信号A的极性的函数;定时信号发生器104，用于产生相对于霍尔元件输出F定时的并具有响应于信号D的相序的输出信号E，以及可逆电流供应电路105 用于驱动具有与信号B成比例的电流C和根据信号E的相位序列的一组Y连接的定子绕组101。

8. 发明授权

US4540897A Digital modulation signal reading device 失效
标题翻译：数字调制信号读取装置
公开(公告)号：US4540897A
公开(公告)日：1985-09-10
申请号：US507645
申请日：1983-06-27
申请人： Saburo Takaoka , Ryuichi Naito , Fumihiko Yokogawa , Youichi Ogawa
发明人： Saburo Takaoka , Ryuichi Naito , Fumihiko Yokogawa , Youichi Ogawa
IPC分类号： G11B20/14 , G11B5/09 , G11B20/10 , H03K5/08 , H04L25/03 , H04L27/00 , H04L27/14
CPC分类号： G11B20/10009 , G11B20/10527
摘要： A data reading device for reading out data modulated according to a system wherein the time ratio of low to high level signals is substantially unity employs a time ratio detector and an intermediate level detector. A comparator compares the reproduced output level with a synthesized signal which may represent a combination of the outputs of the time ratio detector and the intermediate level detector.
摘要翻译：一种用于读出根据其中低电平信号的时间比基本上为单位的系统调制的数据的数据读取装置，其使用时间比率检测器和中间电平检测器。比较器将再现的输出电平与可以表示时间比率检测器和中间电平检测器的输出的组合的合成信号进行比较。

9. 发明授权

US4245245A Interactive CATV system 失效
标题翻译：交互式CATV系统
公开(公告)号：US4245245A
公开(公告)日：1981-01-13
申请号：US654721
申请日：1976-02-02
申请人： Katsuaki Matsumoto , Yoshifumi Saeki , Osamu Tazawa , Minoru Kosaka , Masaki Saito , Hiroki Uemura , Tetuo Kanazashi , Seiji Hashimoto , Tsuyoshi Fujiwara , Tsutomu Fukui , Saburo Takaoka , Tsutomu Suzuki , Shozo Nakamuta , Toshihiko Hosaka , Kuniaki Shiratori , Youichiro Tsuda , Takashi Morii , Sumitaka Matsumura , Morihisa Oka
发明人： Katsuaki Matsumoto , Yoshifumi Saeki , Osamu Tazawa , Minoru Kosaka , Masaki Saito , Hiroki Uemura , Tetuo Kanazashi , Seiji Hashimoto , Tsuyoshi Fujiwara , Tsutomu Fukui , Saburo Takaoka , Tsutomu Suzuki , Shozo Nakamuta , Toshihiko Hosaka , Kuniaki Shiratori , Youichiro Tsuda , Takashi Morii , Sumitaka Matsumura , Morihisa Oka
IPC分类号： H04N7/167 , H04N7/171 , H04N7/173 , H04N7/16 , H04N7/00
CPC分类号： H04N7/17309 , H04N7/17363 , H04N2007/17372
摘要： A two-way CATV system having a substantial number of terminals incorporates a central processor and transmitter system which continually interrogates the terminals at high speed, monitoring changes of usage of premium programs and other data while also permitting central control of access to restricted premium programs. For inexpensive but reliable intercommunication, short, fixed word length digital messages are frequency multiplexed onto the cable in both upstream and downstream directions, and subscriber groups are controllably selected in turn, with each subscriber being scanned in what may be an arbitrary order by transmission of unique private messages which are recognized at the terminal and in response to which previously prepared fixed length messages are immediately transmitted in return. By employing both upstream and downstream messages which are initiated by a series of synchronizing bits and non-ambiguously related subsequent data sequences, and by the provision of means to initiate both downstream and upstream messages of short length without delay, rapid but reliable data interchange is effected despite differences in transmission and response times with different subscribers. Concurrently, terminal status and various special conditions including security alarms are remotely processed at each terminal, and short upstream messages are assembled containing priority selected data to be transmitted in response to an interrogation. The system incorporates additional means for monitoring power status, program selection and authorization and other operating conditions at each terminal effectively to provide accurate and reliable accounting information while preventing unauthorized or improper usage of restricted premium programs.
摘要翻译：具有大量终端的双向CATV系统包括中央处理器和发射机系统，其以高速度连续询问终端，监视高级节目和其他数据的使用的改变，同时还允许对受限优惠节目的访问的中央控制。对于廉价但可靠的互通，短，固定字长数字消息在上行和下行两个方向上被频率复用到电缆上，并且用户组可以依次可控地选择，每个用户以任意顺序扫描可以通过传输在终端被识别并且响应于先前准备好的固定长度的消息被立即发送的唯一私人消息。通过采用由一系列同步位和非相关相关的后续数据序列发起的上行和下行消息，并且通过提供无延迟地启动短长度的下行和上行消息的装置，快速但可靠的数据交换是尽管与不同用户的传输和响应时间有差异。同时，终端状态和包括安全警报在内的各种特殊条件在每个终端进行远程处理，并且组合短的上游消息，其中包含响应于询问要发送的优先选择数据。该系统包括用于监控每个终端的电源状态，程序选择和授权以及其他操作条件的其他手段，有效地提供准确可靠的会计信息，同时防止未经授权或不正确使用限制性溢价程序。

10. 发明授权

US4197508A Period-to-voltage converting device 失效
标题翻译：周期电压转换装置
公开(公告)号：US4197508A
公开(公告)日：1980-04-08
申请号：US874085
申请日：1978-02-01
申请人： Saburo Takaoka
发明人： Saburo Takaoka
IPC分类号： G01R23/09 , H02M7/48 , H02P29/00 , H03K9/06 , H03K5/00
CPC分类号： H03K9/06
摘要： A period-to-voltage converting device for producing an output voltage corresponding to the varying period of an input signal. The input signal is applied to a frequency divider and a simple logic circuit to control the charging and discharging of first and second capacitors. A charging circuit responsive to a first timing pulse having a width equal to half a period of an input signal charges the first capacitor to a predetermined voltage. A discharging circuit responsive to a second timing pulse having a width equal to the period of the input signal discharges the first capacitor at a constant rate. Another charging circuit responsive to a third timing pulse having a width equal to half a period of the input signal charges the second capacitor to the same voltage across the first capacitor, this voltage being the output voltage proportional to the period of the input signal.
摘要翻译：一种用于产生对应于输入信号的变化周期的输出电压的周期到电压转换装置。输入信号被施加到分频器和简单的逻辑电路以控制第一和第二电容器的充电和放电。响应于具有等于输入信号的一半周期的宽度的第一定时脉冲的充电电路将第一电容器充电至预定电压。响应于具有等于输入信号的周期的宽度的第二定时脉冲的放电电路以恒定速率放电第一电容器。响应于具有等于输入信号的一半周期的宽度的第三定时脉冲的另一个充电电路将第二电容器充电到第一电容器两端的相同电压，该电压是与输入信号周期成比例的输出电压。

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