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    • 1. 发明申请
    • HARDWARE PLATFORM VALIDATION
    • 硬件平台验证
    • US20130326275A1
    • 2013-12-05
    • US13909426
    • 2013-06-04
    • Karthick GururajSandeep PendharkarParag NaikRagesh Thottathil RamachandranDeepanjan Kar
    • Karthick GururajSandeep PendharkarParag NaikRagesh Thottathil RamachandranDeepanjan Kar
    • G06F11/263
    • G06F11/263G06F11/2635
    • A system for validating a hardware platform is provided. The system includes a database that stores one or more test specifications, a compiler that generates a target image based on (i) a device driver obtained from a device driver generator, (ii) a platform independent target application code, (iii) a kernel source, and (iv) a run time environment, and a software driven validation generator that analyses the run time specification and the device programming specification and generates (i) one or more test cases based on (a) the one or more test specifications, and (b) the device programming specification, and (ii) a control software based on the test cases. The test cases include configurations that are specific to the hardware platform. The hardware platform is validated based on (i) an execution of the target image and the control software on the hardware platform, and (ii) the one or more test cases.
    • 提供了一个验证硬件平台的系统。 该系统包括存储一个或多个测试规范的数据库,一个基于(i)从设备驱动器生成器获得的设备驱动程序生成目标图像的编译器,(ii)与平台无关的目标应用程序代码,(iii)内核 来源和(iv)运行时环境以及软件驱动的验证生成器,其分析运行时规范和设备编程规范,并且基于(a)一个或多个测试规范生成(i)一个或多个测试用例, 和(b)设备编程规范,以及(ii)基于测试用例的控制软件。 测试用例包括特定于硬件平台的配置。 基于(i)在硬件平台上执行目标图像和控制软件,以及(ii)一个或多个测试用例来验证硬件平台。
    • 2. 发明授权
    • Hardware platform validation
    • 硬件平台验证
    • US09372770B2
    • 2016-06-21
    • US13909426
    • 2013-06-04
    • Karthick GururajSandeep PendharkarParag NaikRagesh Thottathil RamachandranDeepanjan Kar
    • Karthick GururajSandeep PendharkarParag NaikRagesh Thottathil RamachandranDeepanjan Kar
    • G06F11/263
    • G06F11/263G06F11/2635
    • A system for validating a hardware platform is provided. The system includes a database that stores one or more test specifications, a compiler that generates a target image based on (i) a device driver obtained from a device driver generator, (ii) a platform independent target application code, (iii) a kernel source, and (iv) a run time environment, and a software driven validation generator that analyzes the run time specification and the device programming specification and generates (i) one or more test cases based on (a) the one or more test specifications, and (b) the device programming specification, and (ii) a control software based on the test cases. The test cases include configurations that are specific to the hardware platform. The hardware platform is validated based on (i) an execution of the target image and the control software on the hardware platform, and (ii) the one or more test cases.
    • 提供了一个验证硬件平台的系统。 该系统包括存储一个或多个测试规范的数据库,一个基于(i)从设备驱动器生成器获得的设备驱动程序生成目标图像的编译器,(ii)与平台无关的目标应用程序代码,(iii)内核 来源和(iv)运行时环境以及软件驱动的验证生成器,其分析运行时规范和设备编程规范,并且基于(a)一个或多个测试规范生成(i)一个或多个测试用例, 和(b)设备编程规范,以及(ii)基于测试用例的控制软件。 测试用例包括特定于硬件平台的配置。 基于(i)在硬件平台上执行目标图像和控制软件,以及(ii)一个或多个测试用例来验证硬件平台。
    • 4. 发明授权
    • Passivation of oxide-compound semiconductor interfaces
    • 氧化物半导体界面钝化
    • US6025281A
    • 2000-02-15
    • US993603
    • 1997-12-18
    • Matthias PasslackJonathan K. AbrokwahSandeep PendharkarStephen B. ClemensJimmy Z. YuBrian Bowers
    • Matthias PasslackJonathan K. AbrokwahSandeep PendharkarStephen B. ClemensJimmy Z. YuBrian Bowers
    • H01L21/28H01L21/30H01L21/3105H01L21/316
    • H01L21/28264H01L21/3006H01L21/3105
    • A method of passivating interface states of oxide-compound semiconductor interfaces using molecular, atomic, or isotopic species wherein said species are applied before oxide deposition in ultra-high vacuum, or during interruption of oxide deposition in ultra-high vacuum (preferentially after oxide surface coverage of a submonolayer, a monolayer, or a few monolayers), or during oxide deposition in ultra-high vacuum, or after completion of oxide deposition, or before or after any processing steps of the as deposited interface structure. In a preferred embodiment, hydrogen or deuterium atoms are applied to a Ga.sub.2 O.sub.3 --GaAs interface at some point before, during, or after oxide deposition in ultra-high vacuum, or before or after any processing steps of the as deposited interface structure, at any given and useful substrate temperature wherein the atomic species can be provided by any one of RF discharge, microwave plasma discharge, or thermal dissociation.
    • 使用分子,原子或同位素物质钝化氧化物 - 化合物半导体界面的界面状态的方法,其中所述物质在超高真空中的氧化物沉积之前或在超高真空(优选氧化物表面之后) 亚单层,单层或几个单层的覆盖),或者在超高真空中的氧化物沉积期间,或在氧化物沉积完成之后,或在作为沉积的界面结构的任何处理步骤之前或之后。 在一个优选的实施方案中,在超高真空中的氧化物沉积之前,期间或之后的某个时刻,或者在作为沉积的界面结构的任何处理步骤之前或之后,在任何时候,在任何时候,将氢或氘原子施加到Ga 2 O 3 -GaAs- 给定和有用的衬底温度,其中可以通过RF放电,微波等离子体放电或热解离中的任何一种来提供原子种类。