会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Semiconductor memory devices and method for preventing mismatch of reference signals in data sending
    • 半导体存储器件和用于防止参考信号在数据发送中失配的方法
    • US07724579B2
    • 2010-05-25
    • US11892461
    • 2007-08-23
    • Sang-Kug ParkDae-Han Kim
    • Sang-Kug ParkDae-Han Kim
    • G11C11/34
    • G11C16/28G11C7/08G11C7/14
    • Semiconductor memory devices and a method thereof are provided. An example semiconductor memory device may include a control signal generation unit configured to generate a plurality of control signals in response to a bias current, a reference current generation unit configured to generate a reference current in response to the plurality of control signals and a sense amplifier configured to sense and amplify data stored in a given memory cell based on the reference current and a current on a bit line connected to the memory cell. Another example semiconductor memory device may include a memory bank including a plurality of memory cells and a sense amplifier bank including a plurality of sense amplifier units sharing a common line, each of the sense amplifier units including a current source configured to form a current path between the common line and a first voltage supply in response to an enable signal and a gating signal and a sense amplifier configured to sense and amplify data stored in a corresponding memory cell among the plurality of memory cells based on a signal on a bit line connected with the corresponding memory cell and a signal on the common line.
    • 提供半导体存储器件及其方法。 示例性半导体存储器件可以包括:控制信号生成单元,被配置为响应于偏置电流产生多个控制信号;参考电流产生单元,被配置为响应于所述多个控制信号产生参考电流;以及读出放大器 被配置为基于所述参考电流和连接到所述存储器单元的位线上的电流来感测和放大存储在给定存储器单元中的数据。 另一示例性半导体存储器件可以包括存储器组,其包括多个存储器单元和包括共享公共线的多个读出放大器单元的读出放大器组,每个读出放大器单元包括被配置为形成电流源 所述公共线路和第一电压电源响应于使能信号和门控信号,以及读出放大器,被配置为基于与所述多个存储器单元中的位线相关联的信号来感测和放大存储在所述多个存储器单元中的相应存储器单元中的数据 相应的存储单元和公共线上的信号。
    • 4. 发明申请
    • Semiconductor memory devices and a method thereof
    • 半导体存储器件及其方法
    • US20080151635A1
    • 2008-06-26
    • US11892461
    • 2007-08-23
    • Sang-Kug ParkDae-Han Kim
    • Sang-Kug ParkDae-Han Kim
    • G11C16/06
    • G11C16/28G11C7/08G11C7/14
    • Semiconductor memory devices and a method thereof are provided. An example semiconductor memory device may include a control signal generation unit configured to generate a plurality of control signals in response to a bias current, a reference current generation unit configured to generate a reference current in response to the plurality of control signals and a sense amplifier configured to sense and amplify data stored in a given memory cell based on the reference current and a current on a bit line connected to the memory cell. Another example semiconductor memory device may include a memory bank including a plurality of memory cells and a sense amplifier bank including a plurality of sense amplifier units sharing a common line, each of the sense amplifier units including a current source configured to form a current path between the common line and a first voltage supply in response to an enable signal and a gating signal and a sense amplifier configured to sense and amplify data stored in a corresponding memory cell among the plurality of memory cells based on a signal on a bit line connected with the corresponding memory cell and a signal on the common line.
    • 提供半导体存储器件及其方法。 示例性半导体存储器件可以包括:控制信号生成单元,被配置为响应于偏置电流产生多个控制信号;参考电流产生单元,被配置为响应于所述多个控制信号产生参考电流;以及读出放大器 被配置为基于所述参考电流和连接到所述存储器单元的位线上的电流来感测和放大存储在给定存储器单元中的数据。 另一示例性半导体存储器件可以包括存储器组,其包括多个存储器单元和包括共享公共线的多个读出放大器单元的读出放大器组,每个读出放大器单元包括被配置为形成电流源 所述公共线路和第一电压电源响应于使能信号和门控信号,以及读出放大器,被配置为基于与所述多个存储器单元中的位线相关联的信号来感测和放大存储在所述多个存储器单元中的相应存储器单元中的数据 相应的存储单元和公共线上的信号。
    • 6. 发明授权
    • Voltage regulator for use in nonvolatile semiconductor memory
    • 用于非易失性半导体存储器的稳压器
    • US07791320B2
    • 2010-09-07
    • US11844508
    • 2007-08-24
    • Sang-kug ParkDae-Han Kim
    • Sang-kug ParkDae-Han Kim
    • G05F1/59
    • G11C16/30G11C5/147
    • The invention relates to a voltage regulator for operation of a semiconductor memory device. In embodiments, the voltage regulator includes a standby regulator unit and an active regulating unit. Embodiments of the invention decouple the operation of the standby regulating unit and the active regulating unit of a voltage regulator so that both can operate simultaneously, for example during a read operation. In embodiments of the invention, the standby regulating unit includes a short pulse generator and a feedback loop to disable the standby regulating unit for a predetermined amount of time.
    • 本发明涉及用于半导体存储器件操作的电压调节器。 在实施例中,电压调节器包括备用调节器单元和主动调节单元。 本发明的实施例解除了电压调节器的待机调节单元和有源调节单元的操作,使得两者可以同时操作,例如在读取操作期间。 在本发明的实施例中,待机调节单元包括短脉冲发生器和反馈回路,以使待机调节单元停止预定的时间量。