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1. 发明申请

US20140144782A1 METHOD FOR PRODUCING ELECTRICALLY-CONDUCTING MATERIAL WITH MODIFIED SURFACE 有权
标题翻译：用改性表面生产导电材料的方法
公开(公告)号：US20140144782A1
公开(公告)日：2014-05-29
申请号：US13819121
申请日：2011-08-26
申请人： Masayasu Nagoshi , Kaoru Sato , Seiichi Watanabe , Souki Yoshida
发明人： Masayasu Nagoshi , Kaoru Sato , Seiichi Watanabe , Souki Yoshida
IPC分类号： C25D5/16
CPC分类号： C25D5/16 , C23C26/00 , C25F1/00 , C25F3/00
摘要： A method to inexpensively and efficiently produce conductive materials on the surface of which a nano-level fine structure is formed includes surface modification including immersing a stable anode electrode and a workpiece as a cathode electrode, the workpiece including a conductive material with a work surface, in an electrolytic solution, then applying a voltage not less than a first voltage and less than a second voltage between the stable anode electrode and the workpiece as the cathode electrode immersed in the electrolytic solution, thereby modifying the work surface, the first voltage being a voltage corresponding to a current value that is ½ of the sum of a first maximum current value appearing first in a positive voltage region and a first minimum current value appearing first in the positive voltage region with respect to voltage-current characteristics of a surface modification treatment system, the second voltage exhibiting a complete-state plasma.
摘要翻译：在其上形成纳米级精细结构的表面上廉价有效地制造导电材料的方法包括表面改性，包括浸渍稳定的阳极电极和工件作为阴极，工件包括具有工作表面的导电材料，在电解液中，在浸渍在电解液中的阴极电极之间施加稳定的阳极和工件之间的不小于第一电压和小于第二电压的电压，从而改变工作表面，第一电压为对应于相对于表面改性处理的电压 - 电流特性，正电压区域中首先出现的第一最大电流值和正电压区域中首先出现的第一最小电流值之和的电流值的1/2的电压系统，第二电压呈现完全状态的等离子体。

2. 发明授权

US08497213B2 Plasma processing method 有权
标题翻译：等离子体处理方法
公开(公告)号：US08497213B2
公开(公告)日：2013-07-30
申请号：US12013537
申请日：2008-01-14
申请人： Naoki Yasui , Seiichi Watanabe
发明人： Naoki Yasui , Seiichi Watanabe
IPC分类号： H01L21/302
CPC分类号： H01L21/32139 , H01L21/0273 , H01L21/28035
摘要： The invention provides a method for subjecting laminated thin films disposed below a photoresist mask pattern to plasma processing, wherein the roughness on the side walls of the formed pattern is reduced, and the LER and LWR are reduced. When etching a material to be processed to form a gate electrode including thin films such as a gate insulating film 205, a conducting layer 204, a mask layer 203 and an antireflection film 202 laminated on a semiconductor substrate 206 and a photoresist mask pattern 201 disposed on the antireflection film, prior to etching the mask pattern 201, plasma is generated from nitrogen gas or a mixed gas including nitrogen gas and deposition gas to subject the mask pattern 201 to a plasma curing process so as to reduce the roughness on the surface and side walls of the mask pattern 201, and then the laminated thin films 202, 203 and 204 disposed below the mask pattern 201 are subjected to a plasma etching process.
摘要翻译：本发明提供了一种用于对设置在光致抗蚀剂掩模图案下方的层叠薄膜进行等离子体处理的方法，其中形成图案的侧壁上的粗糙度减小，并且LER和LWR减小。当蚀刻待处理的材料以形成包括诸如栅极绝缘膜205，导电层204，掩模层203和层叠在半导体衬底206上的抗反射膜202和设置的光刻胶掩模图案201的薄膜的栅电极时在防反射膜上，在蚀刻掩模图案201之前，从氮气或包括氮气和沉积气体的混合气体产生等离子体，以使掩模图案201进行等离子体固化处理，以减少表面上的粗糙度，掩模图案201的侧壁，然后设置在掩模图案201下方的层叠薄膜202,203和204进行等离子体蚀刻处理。

3. 发明申请

US20120285733A1 ELECTRONIC COMPONENT PROVIDED WITH CU-AL-CO-BASED ALLOY ELECTRODE OR WIRING 有权
标题翻译：电子元件提供基于铜合金的电极或接线
公开(公告)号：US20120285733A1
公开(公告)日：2012-11-15
申请号：US13263359
申请日：2010-04-08
申请人： Takahiko Kato , Takashi Naito , Hiroki Yamamoto , Takuya Aoyagi , Seiichi Watanabe , Seiji Miura , Norihito Sakaguchi , Kazuki Aoshima , Kenji Ohkubo
发明人： Takahiko Kato , Takashi Naito , Hiroki Yamamoto , Takuya Aoyagi , Seiichi Watanabe , Seiji Miura , Norihito Sakaguchi , Kazuki Aoshima , Kenji Ohkubo
IPC分类号： H01B1/02 , H05K1/09 , H01B5/00
CPC分类号： C22C9/01 , C22C9/06 , H01J1/02 , H01J2211/225 , H01L31/022425 , H05K1/092 , Y02E10/50
摘要： An object of the present invention is to provide an electronic component using a Cu-based conductive material that can suppress oxidization even in a heat treatment in an oxidizing atmosphere and that can suppress an increase in an electrical resistance. In an electronic component having an electrode or a wiring, a ternary alloy made from three elements consisting of Cu, Al, and Co is used as a Cu-based wiring material that can prevent oxidization of the electrode or the wiring. Specifically, part or the whole of the electrode or the wiring has a chemical composition in which an Al content is 10 at % to 25 at %, a Co content is 5 at % to 20 at %, and the balance is composed of Cu and unavoidable impurities, and the chemical composition represents a ternary alloy in which two phases of a Cu solid solution formed by Al and Co being dissolved into Cu and a CoAl intermetallic compound coexist together.
摘要翻译：本发明的目的是提供一种使用Cu基导电材料的电子部件，即使在氧化气氛中的热处理中也能够抑制氧化，并且能够抑制电阻的增加。在具有电极或布线的电子部件中，使用由Cu，Al和Co组成的三个元素制成的三元合金作为能够防止电极或布线的氧化的Cu系布线材料。具体地说，电极或布线的一部分或全部具有Al含量为10原子％至25原子％的Co化学组成，Co含量为5原子％至20原子％，余量由Cu和不可避免的杂质，化学组成表示三元合金，其中由Al和Co形成的Cu固溶体中的两相溶解于Cu和CoAl金属间化合物共存。

4. 发明申请

US20120145323A1 Plasma Processing Apparatus and Plasma Processing Method 审中-公开
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US20120145323A1
公开(公告)日：2012-06-14
申请号：US13399465
申请日：2012-02-17
申请人： Hitoshi Tamura , Naoki Yasui , Seiichi Watanabe
发明人： Hitoshi Tamura , Naoki Yasui , Seiichi Watanabe
IPC分类号： B05C11/00
CPC分类号： H01L21/6833 , H01J37/32706
摘要： A plasma processing apparatus for subjecting a substrate to be processed to plasma processing includes a processing chamber, a substrate electrode having an electrostatic chuck mechanism, a plasma generator, a high-frequency bias power supply which applies a high-frequency bias voltage to the substrate electrode, a voltage monitor which monitors the high-frequency bias voltage, a current monitor which monitors a high-frequency bias current, a measurement storage unit which stores a resistance component, an induction component and a capacity component of the electrostatic chuck mechanism, which have been calculated beforehand as fitting parameters of an expression V w = V esc - R esc  I esc - L esc   I esc  t - 1 C esc  ∫ I esc   t + A , ( A ) that is an approximate curve of a correlation among a voltage of the substrate, a computing unit which estimates the voltage of the substrate according to the expression, and a control unit that generates a control signal for the high-frequency bias power supply based on the voltage of the substrate.
摘要翻译：用于对待处理的基板进行等离子体处理的等离子体处理装置包括处理室，具有静电卡盘机构的基板电极，等离子体发生器，向基板施加高频偏置电压的高频偏置电源电极，监视高频偏置电压的电压监视器，监视高频偏置电流的电流监视器，存储电阻分量的测量存储单元，静电卡盘机构的感应部件和电容分量，其中预先计算出的表达式的拟合参数V w = V esc - R esc I I I - - - - - - - （ - 衬底的电压，根据表达式估计衬底的电压的计算单元和产生t的控制信号的控制单元之间的相关性的近似曲线他基于基板电压的高频偏置电源。

5. 发明申请

US20120077233A1 DNA ENCODING NOVEL ENZYME HAVING D-SERINE SYNTHASE ACTIVITY, METHOD OF PRODUCING THE ENZYME AND METHOD OF PRODUCING D-SERINE BY USING THE SAME 审中-公开
标题翻译：编码具有D-丝氨酸合成酶活性的新型酶的DNA，生产酶的方法和使用该酶的方法生产D-丝氨酸
公开(公告)号：US20120077233A1
公开(公告)日：2012-03-29
申请号：US13034098
申请日：2011-02-24
申请人： Tadashi Araki , Tomonori Hidesaki , Seiichi Watanabe , Keita Nishida , Kiyoteru Nagahara , Mitsuo Koito
发明人： Tadashi Araki , Tomonori Hidesaki , Seiichi Watanabe , Keita Nishida , Kiyoteru Nagahara , Mitsuo Koito
IPC分类号： C12P13/06
CPC分类号： C12P13/06 , C12N9/1014
摘要： This invention relates to DNA encoding a novel enzyme having activity of synthesizing D-serine from formaldehyde and glycine, recombinant DNA constructed by integrating such DNA into a vector, a transformant transformed with the recombinant DNA, and a method for producing D-serine from formaldehyde and glycine with the use of the enzyme.
摘要翻译：本发明涉及编码具有从甲醛和甘氨酸合成D-丝氨酸的新型酶的DNA，通过将这种DNA整合到载体中构建的重组DNA，用重组DNA转化的转化体和从甲醛生产D-丝氨酸的方法和甘氨酸与酶的使用。

6. 发明授权

US07955409B2 Method of smelting copper 有权
标题翻译：冶炼铜的方法
公开(公告)号：US07955409B2
公开(公告)日：2011-06-07
申请号：US12502780
申请日：2009-07-14
申请人： Kenta Nakakado , Makoto Hamamoto , Seiichi Watanabe
发明人： Kenta Nakakado , Makoto Hamamoto , Seiichi Watanabe
IPC分类号： C22B7/04 , C22B15/00
CPC分类号： C22B15/006 , C22B15/0047 , C22B15/005 , C22B15/0052 , C22B15/0054
摘要： A method of smelting copper includes: a generating step of generating blister and slag from copper matte by charging the copper matte into a smelting furnace and oxidizing the copper matte; a first refining step of refining another blister from the slag by reduction in an electrical furnace; and a charging step of charging the slag into one of the smelting furnace or another smelting furnace for treating copper concentrate and generating matte as repeating flux if copper grade of slag generated in the first refining step is higher than 0.8 weight %.
摘要翻译：一种熔炼铜的方法包括：通过将铜锍装入冶炼炉中并氧化铜锍而产生铜锍产生气泡和炉渣的产生步骤; 第一精炼步骤，通过在电炉中的还原从炉渣中除去另一个气泡; 以及在第一精炼步骤中产生的铜等级的渣高于0.8重量％的情况下，将炉渣装入冶炼炉或另一熔炼炉中的处理铜精矿并产生锍作为重复焊剂的充电步骤。

7. 发明申请

US20100311135A1 ISOPROPYL ALCOHOL- PRODUCING BACTERIUM AND METHOD OF PRODUCING ISOPROPYL ALCOHOL USING THE SAME 有权
标题翻译：异丙醇生产细菌和使用其生产异丙醇的方法
公开(公告)号：US20100311135A1
公开(公告)日：2010-12-09
申请号：US12452564
申请日：2008-07-04
申请人： Nozomi Takebayashi , Mitsufumi Wada , Daisuke Mochizuki , Fuminobu Yoshimi , Seiichi Watanabe , Hitoshi Takahashi , Takashi Morishige
发明人： Nozomi Takebayashi , Mitsufumi Wada , Daisuke Mochizuki , Fuminobu Yoshimi , Seiichi Watanabe , Hitoshi Takahashi , Takashi Morishige
IPC分类号： C12P7/04 , C12N1/20 , C12M1/107
CPC分类号： C12P7/04 , C12M21/12 , C12M47/10 , C12M47/20 , C12N9/0006 , C12N9/1029 , C12N9/13 , C12N9/88
摘要： The invention provides: an isopropyl alcohol-producing bacterium which has an acetoacetate decarboxylase activity, an isopropyl alcohol dehydrogenase activity, a CoA transferase activity and a thiolase activity having been imparted thereto and is capable of producing isopropyl alcohol from a plant-derived material; a method of producing isopropyl alcohol whereby isopropyl alcohol is produced from a plant-derived material by using this isopropyl alcohol-producing bacterium; and an apparatus therefor.
摘要翻译：本发明提供：具有乙酰乙酸脱羧酶活性，异丙醇脱氢酶活性，CoA转移酶活性和硫硫酸酶活性的异丙醇生产细菌，并且能够从植物来源的材料生产异丙醇; 通过使用该异丙醇生产菌从植物来源的材料制造异丙醇的方法; 及其装置。

8. 发明授权

US07807581B2 Plasma processing apparatus and plasma processing method 有权
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US07807581B2
公开(公告)日：2010-10-05
申请号：US11683014
申请日：2007-03-07
申请人： Susumu Tauchi , Akitaka Makino , Seiichi Watanabe , Naoki Yasui
发明人： Susumu Tauchi , Akitaka Makino , Seiichi Watanabe , Naoki Yasui
IPC分类号： H01L21/302
CPC分类号： C23F4/00 , G03F1/80 , H01J37/32522 , H01L21/67017 , H01L21/67109 , H01L21/6831
摘要： The present invention provides a plasma processing apparatus or a plasma processing method that can etch a multilayer film structure for constituting a gate structure with high accuracy and high efficiency. A plasma processing method of, on processing a sample on a sample stage 112 in a depressurized discharge room 117, etching a multilayer film (including a high-k and a metal gate) at 0.1 Pa or less and with the sample stage 112 temperature-regulated by using a pressure gauge 133 to be used for pressure regulation and connected to the processing room and a main pump for exhaustion 130.
摘要翻译：本发明提供等离子体处理装置或等离子体处理方法，其可以以高精度和高效率蚀刻用于构成栅极结构的多层膜结构。一种等离子体处理方法，在对减压排出室117中的样品台112上的样品进行处理时，蚀刻0.1Pa以下的多层膜（包括高k和金属栅极），并且在样品台112中，通过使用用于压力调节并连接到处理室的压力计133和用于耗尽的主泵130进行调节。

9. 发明申请

US20100104855A1 PREFORM MANUFACTURING METHOD, PREFORM MANUFACTURING APPARATUS, PREFORM AND OPTICAL MEMBER 审中-公开
标题翻译：预制件制造方法，预制件制造设备，预制件和光学构件
公开(公告)号：US20100104855A1
公开(公告)日：2010-04-29
申请号：US12528930
申请日：2008-03-28
申请人： Masato Yoshioka , Noriko Eiha , Seiichi Watanabe
发明人： Masato Yoshioka , Noriko Eiha , Seiichi Watanabe
IPC分类号： B29D11/00 , B29C33/42 , B32B5/22
CPC分类号： B29C43/021 , B29B11/12 , B29C41/14 , B29D11/00346 , B29D11/00442 , B29K2105/0002 , B29L2011/0016 , Y10T428/25
摘要： A method for manufacturing a preform from a nano composite resin that includes a thermoplastic resin containing inorganic fine particles, the preform being a pre-finish product of an optical member having an optical surface formed by press molding, is provided. The method includes: supplying a solution including the nano composite resin and a solvent into a mold which has an approximate optical surface closely resembling the optical surface and an opening to an atmosphere; and evaporating the solvent while a shape of the approximate optical surface is kept, to solidify the solution.
摘要翻译：提供了一种由纳米复合树脂制造预成型体的方法，所述纳米复合树脂包括含有无机细颗粒的热塑性树脂，所述预成型体是具有通过压制成型形成的光学表面的光学部件的预成品。该方法包括：将包含纳米复合树脂和溶剂的溶液供给到具有与光学表面非常相似的大致光学表面和对大气的开口的模具中; 并蒸发溶剂，同时保持近似光学表面的形状，使溶液固化。

10. 发明申请

US20080182419A1 PLASMA PROCESSING METHOD 有权
标题翻译：等离子体处理方法
公开(公告)号：US20080182419A1
公开(公告)日：2008-07-31
申请号：US12013537
申请日：2008-01-14
申请人： Naoki Yasui , Seiichi Watanabe
发明人： Naoki Yasui , Seiichi Watanabe
IPC分类号： H01L21/3065
CPC分类号： H01L21/32139 , H01L21/0273 , H01L21/28035
摘要： The invention provides a method for subjecting laminated thin films disposed below a photoresist mask pattern to plasma processing, wherein the roughness on the side walls of the formed pattern is reduced, and the LER and LWR are reduced. When etching a material to be processed to form a gate electrode including thin films such as a gate insulating film 205, a conducting layer 204, a mask layer 203 and an antireflection film 202 laminated on a semiconductor substrate 206 and a photoresist mask pattern 201 disposed on the antireflection film, prior to etching the mask pattern 201, plasma is generated from nitrogen gas or a mixed gas including nitrogen gas and deposition gas to subject the mask pattern 201 to a plasma curing process so as to reduce the roughness on the surface and side walls of the mask pattern 201, and then the laminated thin films 202, 203 and 204 disposed below the mask pattern 201 are subjected to a plasma etching process.
摘要翻译：本发明提供了一种用于对设置在光致抗蚀剂掩模图案下方的层叠薄膜进行等离子体处理的方法，其中形成图案的侧壁上的粗糙度减小，并且LER和LWR减小。当蚀刻待处理的材料以形成包括诸如栅极绝缘膜205，导电层204，掩模层203和层叠在半导体衬底206上的抗反射膜202和设置的光刻胶掩模图案201的薄膜的栅电极时在防反射膜上，在蚀刻掩模图案201之前，从氮气或包括氮气和沉积气体的混合气体产生等离子体，以使掩模图案201进行等离子体固化处理，以减少表面上的粗糙度，掩模图案201的侧壁，然后设置在掩模图案201下方的层叠薄膜202,203和204进行等离子体蚀刻处理。

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