专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08509353B2 Digital receiver 有权
标题翻译：数字接收机
公开(公告)号：US08509353B2
公开(公告)日：2013-08-13
申请号：US12818510
申请日：2010-06-18
申请人： Seon-Ho Han , Hyun Kyu Yu
发明人： Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H03K9/00
CPC分类号： H04B1/0025 , H04B1/001
摘要： In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs subsampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.
摘要翻译：在数字接收机中，噪声衰减和信号幅度映射可变放大单元包括滤波器和放大器，对模拟信号进行放大和频带滤波，并衰减白噪声和除频带信号之外的干扰信号。 ADC在期望信号的载波频率上执行子采样，并通过使用采样频率对已经通过噪声衰减和信号幅度映射可变放大单元的模拟信号进行数字信号的期望信号的频带上的过采样，的直接转换频带或中频带。 ADC具有用于处理期望信号和与期望信号相邻的不期望信号的动态范围。数字信号处理单元转换数字信号的信号频率或数字滤波数字信号内的不需要的信号，并通过数字调节增益来处理数字信号。

2. 发明申请

US20130064148A1 SINGLE FREQUENCY SYNTHESIZER BASED FDD TRANSCEIVER 有权
标题翻译：单频合成器FDD收发器
公开(公告)号：US20130064148A1
公开(公告)日：2013-03-14
申请号：US13608677
申请日：2012-09-10
申请人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
发明人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04J1/02
CPC分类号： H04L27/3836 , H04B1/0007 , H04L27/206 , H04L27/2092 , H04L27/2332 , H04L27/362 , H04L27/3854
摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.
摘要翻译：本发明涉及一种基于单频合成器的FDD收发器。单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

3. 发明申请

US20130063199A1 PROGRAMMABLE COMPLEX MIXER 审中-公开
标题翻译：可编程复合混合器
公开(公告)号：US20130063199A1
公开(公告)日：2013-03-14
申请号：US13615423
申请日：2012-09-13
申请人： Seon-Ho HAN , Hyun Ho Boo , Mun Yang Park , Jang Hong Choi , Hyun Kyu Yu
发明人： Seon-Ho HAN , Hyun Ho Boo , Mun Yang Park , Jang Hong Choi , Hyun Kyu Yu
IPC分类号： G06G7/14
CPC分类号： H03D7/165
摘要： Disclosed is a programmable complex mixer. In accordance with the embodiments of the present invention, it is possible to control an output by programming paths and signs of internal signals in a complex mixer to reduce a processing bandwidth, power consumption, and a chip area in a transceiver, thereby improving performance of a transceiver.
摘要翻译：公开了一种可编程复合混合器。根据本发明的实施例，可以通过在复合混频器中编程内部信号的路径和符号来控制输出，以减少收发器中的处理带宽，功耗和芯片面积，从而提高收发器

4. 发明申请

US20080042771A1 Variable capacitor circuit having linear capacitance variation and voltage controlled oscillator using the same 失效
标题翻译：具有线性电容变化的可变电容电路和使用其的压控振荡器
公开(公告)号：US20080042771A1
公开(公告)日：2008-02-21
申请号：US11645893
申请日：2006-12-27
申请人： Seon-Ho Han , Cheon-Soo Kim
发明人： Seon-Ho Han , Cheon-Soo Kim
IPC分类号： H03B5/12
CPC分类号： H03B5/1243 , H03B5/1293
摘要： Provided is an apparatus having a variable capacitor circuit which is capable of obtaining a constant gain with respect to a whole control voltage by using a linear variable frequency characteristic for a variation of the control voltages, to thereby attain a wide variable frequency range. For this, a variable capacitor circuit includes a plurality of variable capacitors being connected in parallel with each other and having different capacitances with respect to an input control voltage, wherein the sum of the variable capacitances of the plurality of variable capacitors at a same voltage level of the control voltage varied within the whole control voltage range has linearity.
摘要翻译：提供一种具有可变电容器电路的装置，其可以通过使用用于控制电压的变化的线性可变频率特性来获得相对于整个控制电压的恒定增益，从而获得宽的可变频率范围。为此，可变电容电路包括彼此并联连接并且相对于输入控制电压具有不同电容的多个可变电容器，其中在相同电压电平下的多个可变电容器的可变电容之和的控制电压在整个控制电压范围内变化具有线性关系。

5. 发明授权

US07323939B2 Low noise amplifier for wideband tunable matching 有权
标题翻译：低噪声放大器，用于宽带可调谐匹配
公开(公告)号：US07323939B2
公开(公告)日：2008-01-29
申请号：US11241128
申请日：2005-09-29
申请人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
发明人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/223 , H03F1/26 , H03F1/42 , H03F1/56 , H03F2200/168 , H03F2200/36 , H03F2200/372 , H03F2200/489
摘要： Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.
摘要翻译：提供了具有共同源极和源极退化的低噪声放大器，其具有线性度，功率增益，噪声因数和无损输入匹配。低噪声放大器包括：第一电感器，其一端连接到接收信号的输入端; 第二电感器，其一端连接到地; MOS晶体管，具有连接到第一电感器的栅极，连接到第二电感器的另一个端子的源极和发射信号的漏极; 以及可变电容器，其连接在MOS晶体管的源极和栅极之间并改变输入端子处的输入匹配频率。

6. 发明授权

US08532238B2 Subsampling based receiver using frequency selective noise canceller 有权
标题翻译：基于采样的接收机使用频率选择性噪声消除器
公开(公告)号：US08532238B2
公开(公告)日：2013-09-10
申请号：US13023248
申请日：2011-02-08
申请人： Seon-Ho Han
发明人： Seon-Ho Han
IPC分类号： H03D1/04
CPC分类号： H04B1/10
摘要： Provided is a frequency selective noise canceller including: a frequency selective single to differential converter having a band pass filter function, converting a received single input signal into a differential signal in a wanted signal pass frequency band and into a common mode signal in an unwanted signal frequency band; and a common mode rejector functioning as a load having an arbitrary impedance with respect to the differential signal outputted from the frequency selective single to differential converter and functioning as a filter with respect to the common mode signal.
摘要翻译：提供了一种频率选择性噪声消除器，包括：具有带通滤波器功能的频率选择性单差分转换器，将接收的单个输入信号转换成有用信号通过频带中的差分信号，并将其转换成不需要的信号的共模信号频带; 以及作为相对于从频率选择性单差分转换器输出的差分信号具有任意阻抗并且用作相对于共模信号的滤波器的负载的共模降压器。

7. 发明授权

US08344772B2 Time-to-digital converter and all digital phase-locked loop including the same 有权
标题翻译：时间到数字转换器和所有数字锁相环包括相同的
公开(公告)号：US08344772B2
公开(公告)日：2013-01-01
申请号：US12956498
申请日：2010-11-30
申请人： Ja Yol Lee , Seon Ho Han , Mi Jeong Park , Jang Hong Choi , Seong Do Kim , Hyun Kyu Yu
发明人： Ja Yol Lee , Seon Ho Han , Mi Jeong Park , Jang Hong Choi , Seong Do Kim , Hyun Kyu Yu
IPC分类号： H03L7/06
CPC分类号： H03L7/095 , G04F10/005 , H03L7/085 , H03L7/103 , H03L2207/50
摘要： An all digital phase-locked loop (ADPLL) includes: a phase counter accumulating a frequency setting word value and the phase of a digitally controlled oscillator (DCO) clock and detecting a fine phase difference between a reference clock and a retimed clock; a phase detector detecting a digital phase error value compensating for a phase difference between the frequency setting word value and the DCO clock according to the fine phase difference to detect a digital phase error value; a digital loop filter filtering the digital phase error value and controlling PLL operational characteristics; a lock detector generating a lock indication signal according an output of the digital loop filter; a digitally controlled oscillator varying the frequency of the DCO clock according to the output from the digital loop filter; and a retimed clock generator generating the retimed clock by retiming the DCO clock at a low frequency.
摘要翻译：全数字锁相环（ADPLL）包括：相位计数器累积频率设定字值和数字控制振荡器（DCO）时钟的相位，并检测参考时钟和重新定时钟之间的精细相位差; 相位检测器，根据所述精细相位差检测补偿所述频率设定字值与所述DCO时钟之间的相位差的数字相位误差值，以检测数字相位误差值; 数字环路滤波器滤除数字相位误差值并控制PLL的操作特性; 锁定检测器，根据数字环路滤波器的输出产生锁定指示信号; 数字控制振荡器根据数字环路滤波器的输出改变DCO时钟的频率; 以及重新计时的时钟发生器，通过以低频再定时DCO时钟产生重定时钟。

8. 发明授权

US07884673B2 Wideband low-noise amplifier 有权
标题翻译：宽带低噪声放大器
公开(公告)号：US07884673B2
公开(公告)日：2011-02-08
申请号：US12423764
申请日：2009-04-14
申请人： Seon Ho Han , Cheon Soo Kim , Jae Young Kim , Hyun Kyu Yu
发明人： Seon Ho Han , Cheon Soo Kim , Jae Young Kim , Hyun Kyu Yu
IPC分类号： H03F3/04
CPC分类号： H03F1/26 , H03F1/565 , H03F3/195 , H03F2200/222 , H03F2200/294 , H03F2200/36 , H03F2200/451
摘要： A wideband low-noise amplifier includes a source-degenerated common-source amplifier, a common-gate amplifier, and a matching frequency band determiner. The source-degenerated common-source amplifier is configured to amplify an input signal to output a first signal that is opposite in phase to the input signal. The common-gate amplifier is connected in parallel to the source-degenerated common-source amplifier to amplify the input signal to output a second signal that has the same phase as the input signal. The matching frequency band determiner is configured to isolate an input terminal of the source-degenerated common-source amplifier and an input terminal of the common-gate amplifier and determine a matching frequency band.
摘要翻译：宽带低噪声放大器包括源极退化的共源放大器，共栅放大器和匹配的频带确定器。源极退化的共源放大器被配置为放大输入信号以输出与输入信号相位相反的第一信号。共栅放大器与源极简并公共源放大器并联连接，以放大输入信号以输出与输入信号具有相同相位的第二信号。匹配频带确定器被配置为隔离源极退化的共源极放大器的输入端和公共栅极放大器的输入端，并确定匹配的频带。

9. 发明申请

US20110026571A1 AUTOMATIC GAIN CONTROLLER, TRANSCEIVER AND AUTOMATIC GAIN-CONTROL METHOD THEREOF 审中-公开
标题翻译：自动增益控制器，收发器和自动增益控制方法
公开(公告)号：US20110026571A1
公开(公告)日：2011-02-03
申请号：US12935569
申请日：2008-08-08
申请人： Seon-Ho Han , Mun-Yang Park , Cheon-Soo Kim , Jae-Young Kim
发明人： Seon-Ho Han , Mun-Yang Park , Cheon-Soo Kim , Jae-Young Kim
IPC分类号： H04B3/46 , H03G3/20
CPC分类号： H03G3/3052 , H03G3/3042
摘要： An automatic gain-control method for a communication system is comprised of determining a communication distance between the first and second transceivers and controlling gain values of transception stages of the first and second transceivers in correspondence with the communication distance.
摘要翻译：一种用于通信系统的自动增益控制方法包括：确定第一和第二收发器之间的通信距离，并根据通信距离控制第一和第二收发器的收发阶段的增益值。

10. 发明申请

US20100135446A1 DIGITAL-INTENSIVE RF RECEIVER 审中-公开
标题翻译：数字强度射频接收机
公开(公告)号：US20100135446A1
公开(公告)日：2010-06-03
申请号：US12629684
申请日：2009-12-02
申请人： Seon Ho Han , Jae Hoon Shim , Hyun Kyu Yu
发明人： Seon Ho Han , Jae Hoon Shim , Hyun Kyu Yu
IPC分类号： H04B1/10
CPC分类号： H04B1/001 , H04B1/0025
摘要： A digital-intensive RF receiver including: a first filter unit configured to allow an RF signal of a pre-set frequency band among RF signals to pass therethrough; a low noise amplifier (LNA) configured to amplify the RF signal from the first filter unit such that the RF signal has a pre-set magnitude; a second filter unit configured to allow an RF signal of a pre-set frequency band among RF signals from the LNA to pass therethrough; a clock generation unit configured to generate a pre-set reference frequency signal and generate a sub-sampling clock having a pre-set frequency lower than an RF carrier frequency by using the reference frequency signal; a sub-sampling A/D conversion unit configured to A/D-convert the RF signal from the second filter unit into a digital signal according to the sub-sampling clock from the clock generation unit, divide the RF signal into a plurality of frequency bands and sub-sample them during the A/D conversion process and perform noise shaping by the sub-channels included in the RF signal; and a digital processing unit configured to process a digital signal from the sub-sampling A/D conversion unit according to a system clock generated by using the reference frequency signal from the clock generation unit.
摘要翻译：一种数字密集RF接收机，包括：第一滤波器单元，被配置为允许RF信号中的预设频带的RF信号通过; 低噪声放大器（LNA），被配置为放大来自第一滤波器单元的RF信号，使得RF信号具有预设的幅度; 第二滤波器单元，被配置为允许来自所述LNA的RF信号中的预设频带的RF信号通过; 时钟生成单元，被配置为通过使用所述参考频率信号来生成预设参考频率信号并生成具有低于RF载波频率的预置频率的子采样时钟; 子采样A / D转换单元，被配置为根据来自时钟生成单元的子采样时钟将来自第二滤波器单元的RF信号进行A / D转换为数字信号，将RF信号分成多个频率在A / D转换过程中对它们进行子采样，并通过RF信号中包含的子信道进行噪声整形; 以及数字处理单元，被配置为根据通过使用来自时钟生成单元的参考频率信号产生的系统时钟来处理来自子采样A / D转换单元的数字信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式