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1. 发明授权

US09698151B2 Vertical memory devices 有权
公开(公告)号：US09698151B2
公开(公告)日：2017-07-04
申请号：US15179068
申请日：2016-06-10
申请人： Seung-Min Lee , Hoo-Sung Cho , Jeong-Seok Nam , Jong-Min Lee , Yong-Joon Choi
发明人： Seung-Min Lee , Hoo-Sung Cho , Jeong-Seok Nam , Jong-Min Lee , Yong-Joon Choi
IPC分类号： H01L27/115 , H01L27/11565 , H01L27/1157 , H01L27/11582 , H01L23/528 , H01L23/522 , H01L21/768
CPC分类号： H01L27/11565 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/544 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L2223/5442 , H01L2223/54433 , H01L2223/54453
摘要： A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that is vertical to a top surface of the substrate, a plurality of gate lines stacked on top of each other on the substrate, a plurality of wiring over the gate lines and electrically connected to the gate lines, and an identification pattern on the substrate at the same level as a level of at least one of the wirings. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction.

2. 发明申请

US20170148848A1 MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开
公开(公告)号：US20170148848A1
公开(公告)日：2017-05-25
申请号：US15213706
申请日：2016-07-19
申请人： Sung-Min AHN , Ji-Su RYU , Seung-Min LEE
发明人： Sung-Min AHN , Ji-Su RYU , Seung-Min LEE
IPC分类号： H01L27/22 , H01L43/10 , H01L43/02
CPC分类号： H01L27/222 , H01L27/228 , H01L43/02 , H01L43/08 , H01L43/10 , H01L43/12
摘要： An MRAM device includes a lower electrode on a substrate, an MTJ structure on the lower electrode, a metal oxide pattern on the MTJ structure, a conductive pattern on at least a portion of a sidewall of the metal oxide pattern, and an upper electrode on the metal oxide pattern and the conductive pattern. The conductive pattern has a thickness varying along the sidewall of the metal oxide pattern in a plan view.

3. 发明申请

US20170103993A1 VERTICAL MEMORY DEVICES 有权
公开(公告)号：US20170103993A1
公开(公告)日：2017-04-13
申请号：US15179068
申请日：2016-06-10
申请人： Seung-Min LEE , Hoo-Sung CHO , Jeong-Seok NAM , Jong-Min LEE , Yong-Joon CHOI
发明人： Seung-Min LEE , Hoo-Sung CHO , Jeong-Seok NAM , Jong-Min LEE , Yong-Joon CHOI
IPC分类号： H01L27/115 , H01L23/522 , H01L21/768 , H01L23/528
CPC分类号： H01L27/11565 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/544 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L2223/5442 , H01L2223/54433 , H01L2223/54453
摘要： A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that is vertical to a top surface of the substrate, a plurality of gate lines stacked on top of each other on the substrate, a plurality of wiring over the gate lines and electrically connected to the gate lines, and an identification pattern on the substrate at the same level as a level of at least one of the wirings. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction.

4. 发明申请

US20120312652A1 METHOD OF CONTROLLING TRANSMISSION OF VEHICLE 有权
标题翻译：控制车辆传动的方法
公开(公告)号：US20120312652A1
公开(公告)日：2012-12-13
申请号：US13303992
申请日：2011-11-23
申请人： Sung Yeol Kim , Seung Min Lee , Choung Wan Son , Seok Young Shin , Ju Hyun Nam , Sung Yop Lee , Kwang Min Won
发明人： Sung Yeol Kim , Seung Min Lee , Choung Wan Son , Seok Young Shin , Ju Hyun Nam , Sung Yop Lee , Kwang Min Won
IPC分类号： B60W10/02 , B60W10/10
CPC分类号： F16H61/28 , F16H61/0403 , F16H61/0437 , F16H2059/186 , F16H2059/462 , F16H2061/0474
摘要： A method of controlling a transmission of a vehicle may include generating a first synchronization force between a shift gear of a target gear and an output shaft to shift gears from a current gear to a lower gear set as the target gear in response to deceleration of the vehicle, so as to form a first synchronization, removing the first synchronization force between the shift gear and the output shaft after the generating of the first synchronization force, and generating a second synchronization force between the shift gear of the target gear and the output shaft after the removing of the first synchronization force, so as to form a second synchronization.
摘要翻译：一种控制车辆变速器的方法可以包括在目标齿轮的变速齿轮和输出轴之间产生第一同步力，以响应于减速而将齿轮从当前齿轮转换到作为目标齿轮的下齿轮车辆，以形成第一同步，在产生第一同步力之后消除变速齿轮与输出轴之间的第一同步力，并且在目标齿轮的变速齿轮与输出轴之间产生第二同步力在去除第一同步力之后，形成第二同步。

5. 发明申请

US20100265646A1 PORTABLE COMPUTER 有权
标题翻译：便携式计算机
公开(公告)号：US20100265646A1
公开(公告)日：2010-10-21
申请号：US12427116
申请日：2009-04-21
申请人： Seung Min Lee , Hyun Chung
发明人： Seung Min Lee , Hyun Chung
IPC分类号： G06F1/16
CPC分类号： G06F1/1654 , G06F1/1616 , G06F1/1628 , G06F1/1647
摘要： The present invention relates to a portable computer comprising a main body unit which forms an image signal by reading and processing data; and a display unit which is plurally provided and has a plate surface displaying an image thereon and overlapping each other to rotate with respect to the main body casing, is detachably mounted in the display supporter, displays an image only on a most front plate surface when mounted in the display supporter, receives an image signal of the most front plate surface and selectively displays a same or different images thereon if it is separated from the display supporter.Accordingly, applicability and convenience of the portable computer may improve.
摘要翻译：便携式计算机技术领域本发明涉及一种便携式计算机，包括通过读取和处理数据形成图像信号的主体单元; 并且具有多个设置并具有显示其上相对于主体壳体相互重叠的图像的显示单元可拆卸地安装在显示器支撑件中，仅在最前面板表面上显示图像，当安装在显示器支撑件中，如果与显示器支撑件分离，则接收最前面板表面的图像信号并且选择性地在其上显示相同或不同的图像。因此，便携式计算机的适用性和便利性可以提高。

6. 发明授权

US07733560B2 Flexible electrophoretic display and method of fabricating the same 有权
标题翻译：柔性电泳显示器及其制造方法
公开(公告)号：US07733560B2
公开(公告)日：2010-06-08
申请号：US12021613
申请日：2008-01-29
申请人： Hyun Jae Kim , Tae Hun Jung , Seung Min Lee
发明人： Hyun Jae Kim , Tae Hun Jung , Seung Min Lee
IPC分类号： G02B26/00 , G09G3/34
CPC分类号： G02F1/167 , B82Y20/00 , G02F1/133305 , G02F1/133514 , G02F2001/1676 , G02F2202/36
摘要： Provided is a flexible electrophoretic display. The flexible electrophoretic display includes a grayscale representation unit for representing grayscales in unit areas using reflection and transmission; upper and lower electrodes for applying a voltage to the grayscale representation unit; and a plurality of colored particles formed on the upper electrode for representing color. The upper electrode is formed of a transparent conductive material. External incident light is reflected by the colored particles formed on the upper electrode for color implementation by the flexible electrophoretic display. Thus, a compact, flexible electrophoretic display capable of displaying a high-definition image with multi-color and multi-gradation can be implemented by using multi-colored particle layers formed of metallic nano-particles.
摘要翻译：提供了一种柔性电泳显示器。柔性电泳显示器包括灰度表示单元，用于使用反射和透射表示在单位区域中的灰度级; 用于向灰度表示单元施加电压的上下电极; 以及形成在上电极上用于表示颜色的多个着色颗粒。上部电极由透明导电材料形成。外部入射光被形成在上电极上的着色颗粒反射，用于通过柔性电泳显示器进行颜色实现。因此，可以通过使用由金属纳米颗粒形成的多色颗粒层来实现能够显示具有多色和多层次的高清晰度图像的紧凑，柔性的电泳显示器。

7. 发明申请

US20060048807A1 Thin film thermoelectric module 审中-公开
标题翻译：薄膜热电模块
公开(公告)号：US20060048807A1
公开(公告)日：2006-03-09
申请号：US11223284
申请日：2005-09-08
申请人： Seung-Min Lee , Jeong-Il Kye
发明人： Seung-Min Lee , Jeong-Il Kye
IPC分类号： H01L35/30 , H01L35/28
CPC分类号： H01L35/32
摘要： Disclosed herein is a thin film thermoelectric module. the module includes high and low temperature part module substrates, unit thermoelectric devices, and lead wires. The high and low temperature part module substrates are arranged to face each other. The unit thermoelectric devices are located between the modules to transfer heat between the modules. The lead wires are connected to the electrodes of the unit thermoelectric devices. Each of the unit thermoelectric devices includes a pair of lower and upper substrates, electrodes, and a thermoelectric material. The pair of lower and upper substrates are arranged to face each other. The electrodes are formed on the upper surface of the lower substrate and the lower surface of the upper substrate. The thermoelectric material is disposed between the electrodes.
摘要翻译：这里公开了一种薄膜热电模块。该模块包括高低温部件模块基板，单元热电装置和引线。高低温部件模块基板被布置成彼此面对。单元热电装置位于模块之间，以在模块之间传递热量。引线连接到单元热电装置的电极。每个单元热电装置包括一对下基板和上基板，电极和热电材料。一对下基板和上基板布置成彼此面对。电极形成在下基板的上表面和上基板的下表面上。热电材料设置在电极之间。

8. 发明授权

US06958947B2 Semiconductor memory device with internal voltage generators for testing a memory array and peripheral circuits 有权
标题翻译：具有用于测试存储器阵列和外围电路的内部电压发生器的半导体存储器件
公开(公告)号：US06958947B2
公开(公告)日：2005-10-25
申请号：US10359075
申请日：2003-02-06
申请人： Chul-Sung Park , Hyang-Ja Yang , Seung-Min Lee , Yong-Hwan Noh
发明人： Chul-Sung Park , Hyang-Ja Yang , Seung-Min Lee , Yong-Hwan Noh
IPC分类号： G11C5/14 , G11C29/12 , G11C29/50
CPC分类号： G11C29/12005 , G11C5/147 , G11C11/41 , G11C29/12 , G11C29/50 , G11C2207/2254
摘要： A semiconductor memory device which includes an internal voltage generator circuit for adjusting an external power supply voltage and generating first and second internal power supply voltages. The first internal power supply voltage is supplied to a memory cell array via a first power supply line, and the second internal power supply voltage is supplied to a peripheral circuit via a second power supply line. A control circuit controls the internal voltage generator circuit so that the levels of the first and second internal power supply voltages vary depending on a mode of operation.
摘要翻译：一种半导体存储器件，包括用于调节外部电源电压并产生第一和第二内部电源电压的内部电压发生器电路。第一内部电源电压经由第一电源线提供给存储单元阵列，并且第二内部电源电压经由第二电源线提供给外围电路。控制电路控制内部电压发生器电路，使得第一和第二内部电源电压的电平根据操作模式而变化。

9. 发明授权

US06744096B2 Non-volatile memory device having a bit line contact pad and method for manufacturing the same 有权
标题翻译：具有位线接触焊盘的非易失性存储器件及其制造方法
公开(公告)号：US06744096B2
公开(公告)日：2004-06-01
申请号：US10453943
申请日：2003-06-04
申请人： Seung-Min Lee , Byung-Hong Chung
发明人： Seung-Min Lee , Byung-Hong Chung
IPC分类号： H01L29788
CPC分类号： H01L21/76895 , H01L27/115 , H01L27/11521
摘要： A non-volatile memory device and a method for manufacturing the same are disclosed. A non-volatile memory device comprises a semiconductor substrate having active areas which extend in a first direction and are repeatedly arranged in a second direction orthogonal to the first direction, a plurality of word lines formed on the semiconductor substrate which extending in the second direction while being repeatedly arranged in the first direction, string select lines adjacent to a first word line and extending in the second direction, ground select lines adjacent to a last word line and extending in the second direction, a first insulating interlayer formed on the resultant structure and comprising a first opening exposing the active area between the ground select lines and a second opening exposing the active area between the string select lines, a bit line contact pad formed in the second opening. A sidewall of the contact pad comprises a negative slope in the first direction and a positive slope in the second direction. A hard mask layer pattern, having the same pattern size as the active area, is formed on the contact pad and the first insulating interlayer. A second insulating interlayer is formed on the hard mask layer pattern and the first insulating interlayer. The second insulating interlayer has a bit line contact hole on the contact pad and thus the process margin is sufficiently achieved.
摘要翻译：公开了一种非易失性存储器件及其制造方法。一种非易失性存储器件包括：半导体衬底，其具有沿第一方向延伸并且沿与第一方向正交的第二方向重复布置的有源区;多个字线，形成在半导体衬底上，沿第二方向延伸，同时沿着第一方向重复地布置，与第一字线相邻并且在第二方向上延伸的串选择线，与最后字线相邻并在第二方向上延伸的接地选择线，在所得结构上形成的第一绝缘夹层，包括暴露所述接地选择线之间的有源区域的第一开口和暴露所述串选择线之间的有源区域的第二开口，形成在所述第二开口中的位线接触焊盘。接触垫的侧壁包括在第一方向上的负斜率和在第二方向上的正斜率。在接触焊盘和第一绝缘中间层上形成具有与有源区相同的图案尺寸的硬掩模层图案。在硬掩模层图案和第一绝缘中间层上形成第二绝缘中间层。第二绝缘中间层在接触焊盘上具有位线接触孔，因此充分实现了工艺余量。

10. 发明授权

US10090314B2 Vertical memory devices and methods of manufacturing the same 有权
公开(公告)号：US10090314B2
公开(公告)日：2018-10-02
申请号：US15612229
申请日：2017-06-02
申请人： Seung-Min Lee , Hoo-Sung Cho , Jeong-Seok Nam , Jong-Min Lee , Yong-Joon Choi
发明人： Seung-Min Lee , Hoo-Sung Cho , Jeong-Seok Nam , Jong-Min Lee , Yong-Joon Choi
IPC分类号： H01L27/115 , H01L27/11565 , H01L27/11582 , H01L21/768 , H01L23/544 , H01L27/11573 , H01L27/11575 , H01L23/522 , H01L23/528 , H01L27/1157
摘要： A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that is vertical to a top surface of the substrate, a plurality of gate lines stacked on top of each other on the substrate, a plurality of wiring over the gate lines and electrically connected to the gate lines, and an identification pattern on the substrate at the same level as a level of at least one of the wirings. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction.

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