会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Non-volatile memory device manufacturing process testing systems and methods thereof
    • 非易失性存储器件制造工艺测试系统及其方法
    • US07802155B2
    • 2010-09-21
    • US12042316
    • 2008-03-04
    • Siew Sin HiewCharles C. LeeI-Kang YuAbraham Chih-Kang MaMing-Shiang Shen
    • Siew Sin HiewCharles C. LeeI-Kang YuAbraham Chih-Kang MaMing-Shiang Shen
    • G11C29/00
    • G11C29/56G11C5/04G11C16/04G11C2029/0409
    • Systems and methods of manufacturing and testing non-volatile memory (NVM) devices are described. According to one exemplary embodiment, a function test during manufacturing of the NVM modules is conducted with a system comprises a computer and a NVM tester coupling to the computer via an external bus. The NVM tester comprises a plurality of slots. Each of the slots is configured to accommodate respective one of the NVM modules to be tested. The NVM tester is configured to include an input/output interface, a microcontroller with associated RAM and ROM, a data generator, an address generator, a comparator, a comparison status storage space, a test result indicator and a NVM module detector. The data generator generates a repeatable sequence of data bits as a test vector. The known test vector is written to NVM of the NVM module under test. The known test vector is then compared with the data retrieved from the NVM module.
    • 描述了制造和测试非易失性存储器(NVM)器件的系统和方法。 根据一个示例性实施例,在制造NVM模块期间的功能测试是通过包括计算机和经由外部总线耦合到计算机的NVM测试仪的系统进行的。 NVM测试仪包括多个槽。 每个插槽被配置为容纳待测试的相应的一个NVM模块。 NVM测试器被配置为包括输入/​​输出接口,具有相关联的RAM和ROM的微控制器,数据发生器,地址发生器,比较器,比较状态存储空间,测试结果指示器和NVM模块检测器。 数据发生器产生可重复的数据位序列作为测试向量。 已知的测试向量写入被测NVM模块的NVM。 然后将已知的测试向量与从NVM模块检索的数据进行比较。
    • 2. 发明授权
    • High integration of intelligent non-volatile memory device
    • 高集成智能非易失性存储器件
    • US07877542B2
    • 2011-01-25
    • US12054310
    • 2008-03-24
    • David Q. ChowI-Kang YuSiew Sin HiewAbraham Chih-Kang MaMing-Shiang Shen
    • David Q. ChowI-Kang YuSiew Sin HiewAbraham Chih-Kang MaMing-Shiang Shen
    • G06F12/00
    • G06F12/0246G11C13/0004
    • High integration of a non-volatile memory device (NVMD) is disclosed. According to one aspect of the present invention, a non-volatile memory device comprises an intelligent non-volatile memory (NVM) controller and an intelligent non-volatile memory module. The NVM controller includes a central processing unit (CPU) configured to handle data transfer operations to the NVM module to ensure source synchronous interface, interleaved data operations and block abstracted addressing. The intelligent NVM module includes an interface logic, a block address manager and at least one non-volatile memory array. The interface logic is configured to handle physical block management. The block address manager is configured to ensure a physical address is converted to a transformed address that is accessible to the CPU of the intelligent NVM controller. The transformed address may be an address in blocks, pages, sectors or bytes either logically or physically.
    • 公开了非易失性存储器件(NVMD)的高集成度。 根据本发明的一个方面,非易失性存储器件包括智能非易失性存储器(NVM)控制器和智能非易失性存储器模块。 NVM控制器包括一个中央处理单元(CPU),用于处理对NVM模块的数据传输操作,以确保源同步接口,交错数据操作和块抽象寻址。 智能NVM模块包括接口逻辑,块地址管理器和至少一个非易失性存储器阵列。 接口逻辑被配置为处理物理块管理。 块地址管理器被配置为确保将物理地址转换为智能NVM控制器的CPU可访问的转换地址。 变换后的地址可以是逻辑上或物理上的块,页,扇区或字节中的地址。
    • 3. 发明申请
    • Non-Volatile Memory Device Manufacturing Process Testing Systems and Methods Thereof
    • 非易失性存储器件制造工艺测试系统及其方法
    • US20080201622A1
    • 2008-08-21
    • US12042316
    • 2008-03-04
    • Siew Sin HiewCharles C. LeeI-Kang YuAbraham Chih-Kang MaMing-Shiang Shen
    • Siew Sin HiewCharles C. LeeI-Kang YuAbraham Chih-Kang MaMing-Shiang Shen
    • G11C29/08G06F11/26
    • G11C29/56G11C5/04G11C16/04G11C2029/0409
    • Systems and methods of manufacturing and testing non-volatile memory (NVM) devices are described. According to one exemplary embodiment, a function test during manufacturing of the NVM modules is conducted with a system comprises a computer and a NVM tester coupling to the computer via an external bus. The NVM tester comprises a plurality of slots. Each of the slots is configured to accommodate respective one of the NVM modules to be tested. The NVM tester is configured to include an input/output interface, a microcontroller with associated RAM and ROM, a data generator, an address generator, a comparator, a comparison status storage space, a test result indicator and a NVM module detector. The data generator generates a repeatable sequence of data bits as a test vector. The known test vector is written to NVM of the NVM module under test. The known test vector is then compared with the data retrieved from the NVM module.
    • 描述了制造和测试非易失性存储器(NVM)器件的系统和方法。 根据一个示例性实施例,在制造NVM模块期间的功能测试是通过包括计算机和经由外部总线耦合到计算机的NVM测试仪的系统进行的。 NVM测试仪包括多个槽。 每个插槽被配置为容纳待测试的相应的一个NVM模块。 NVM测试器被配置为包括输入/​​输出接口,具有相关联的RAM和ROM的微控制器,数据发生器,地址发生器,比较器,比较状态存储空间,测试结果指示器和NVM模块检测器。 数据发生器产生可重复的数据位序列作为测试向量。 已知的测试向量写入被测NVM模块的NVM。 然后将已知的测试向量与从NVM模块检索的数据进行比较。
    • 6. 发明授权
    • Plug and cap for a universal-serial-bus (USB) device
    • 用于通用串行总线(USB)设备的插头和盖
    • US07547218B2
    • 2009-06-16
    • US11901604
    • 2007-09-17
    • Siew Sin HiewJim NiAbraham C. MaDavid Nguyen
    • Siew Sin HiewJim NiAbraham C. MaDavid Nguyen
    • H01R13/44
    • H01R13/6395H01R24/62Y10T29/49838
    • Embodiments of a plug and cap of a Universal-Serial-Bus (USB) device have been presented. In one embodiment, a USB device includes a main body, a piece of string, and a cap. The main body has a printed circuit board assembly (PCBA) and a casing, wherein the PCBA is partially housed in the casing, and the PCBA further includes a USB connector protruding out of the casing at a first end of the casing. The piece of string is coupled to the main body and the cap. The cap is detachably coupled to the first end of the casing of the main body to cover the USB connector, wherein the cap remains indirectly coupled to the casing via the piece of string when the cap is detached from the first end of the casing to expose the USB connector.
    • 已经提出了通用串行总线(USB)设备的插头和盖的实施例。 在一个实施例中,USB设备包括主体,弦线和盖。 主体具有印刷电路板组件(PCBA)和壳体,其中PCBA部分地容纳在壳体中,并且PCBA还包括在壳体的第一端处从壳体突出的USB连接器。 琴弦连接到主体和帽上。 盖可拆卸地联接到主体的壳体的第一端以覆盖USB连接器,其中当帽从壳体的第一端分离以暴露时,盖保持通过弦线间接地联接到壳体 USB连接器。
    • 9. 发明授权
    • Thin solid state drive housing structures
    • 薄型固态驱动器外壳结构
    • US07517252B2
    • 2009-04-14
    • US11966827
    • 2007-12-28
    • Jim Chin-Nan NiSiew Sin HiewAbraham Chih-Kang MaMing-Shiang Shen
    • Jim Chin-Nan NiSiew Sin HiewAbraham Chih-Kang MaMing-Shiang Shen
    • H01R24/00
    • H05K5/0256
    • Thin solid state drive (SSD) housing structures are described. According to one embodiment of the invention, a structure for housing an SSD includes a pair of brackets configured to support a PCBA of the SSD at either side of the PCBA via one or more ledges with corresponding fastener holes pre-configured thereon. The ledges are attached to inside surface of the brackets. Each of the brackets has a slab shape with a length and a height. The length is parallel to horizontal direction, while the height parallel to vertical. The ledges are located at mid-height and orientated substantially perpendicular to the brackets such that the PCBA is supported horizontally. In order to securely connect the PCBA with the brackets, a plurality of metal fasteners is used. The fasteners are placed through the fastener holes on the ledges and through corresponding alignment holes pre-configured on the PCBA.
    • 描述了薄的固态驱动器(SSD)外壳结构。 根据本发明的一个实施例,用于容纳SSD的结构包括一对支架,其被配置为经由一个或多个突出部支撑在PCBA的任一侧的SSD的PCBA,其中预定配置有相应的紧固件孔。 凸缘连接到支架的内表面。 每个托架具有长度和高度的板形。 长度平行于水平方向,高度平行于垂直方向。 凸缘位于中间高度并且基本上垂直于支架定向,使得PCBA水平地支撑。 为了将PCBA与支架牢固连接,使用多个金属紧固件。 紧固件通过凸缘上的紧固件孔并通过预先配置在PCBA上的相应对准孔放置。
    • 10. 发明申请
    • High Integration of Intelligent Non-volatile Memory Device
    • 智能非易失性存储设备的高集成度
    • US20080215802A1
    • 2008-09-04
    • US12054310
    • 2008-03-24
    • David Q. ChowI-Kang YuSiew Sin HiewAbraham Chih-Kang MaMing-Shiang Shen
    • David Q. ChowI-Kang YuSiew Sin HiewAbraham Chih-Kang MaMing-Shiang Shen
    • G06F12/02
    • G06F12/0246G11C13/0004
    • High integration of a non-volatile memory device (NVMD) is disclosed. According to one aspect of the present invention, a non-volatile memory device comprises an intelligent non-volatile memory (NVM) controller and an intelligent non-volatile memory module. The NVM controller includes a central processing unit (CPU) configured to handle data transfer operations to the NVM module to ensure source synchronous interface, interleaved data operations and block abstracted addressing. The intelligent NVM module includes an interface logic, a block address manager and at least one non-volatile memory array. The interface logic is configured to handle physical block management. The block address manager is configured to ensure a physical address is converted to a transformed address that is accessible to the CPU of the intelligent NVM controller. The transformed address may be an address in blocks, pages, sectors or bytes either logically or physically.
    • 公开了非易失性存储器件(NVMD)的高集成度。 根据本发明的一个方面,非易失性存储器件包括智能非易失性存储器(NVM)控制器和智能非易失性存储器模块。 NVM控制器包括一个中央处理单元(CPU),用于处理对NVM模块的数据传输操作,以确保源同步接口,交错数据操作和块抽象寻址。 智能NVM模块包括接口逻辑,块地址管理器和至少一个非易失性存储器阵列。 接口逻辑被配置为处理物理块管理。 块地址管理器被配置为确保将物理地址转换为智能NVM控制器的CPU可访问的转换地址。 变换后的地址可以是逻辑上或物理上的块,页,扇区或字节中的地址。