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1. 发明申请

US20090174586A1 ANALOG TO DIGITAL CONVERTER WITH DYNAMICALLY RECONFIGURABLE CONVERSION RESOLUTION 有权
标题翻译：具有动态可重构转换分辨率的数字转换器模拟
公开(公告)号：US20090174586A1
公开(公告)日：2009-07-09
申请号：US11968917
申请日：2008-01-03
申请人： Steven Edward Muenter , Kenneth J. Carrillo
发明人： Steven Edward Muenter , Kenneth J. Carrillo
IPC分类号： H03M1/20
CPC分类号： H03M1/007 , H03M1/40
摘要： A method and apparatus for an analog to digital converter with dynamically reconfigurable conversion resolution. The analog to digital converter comprises a sample and hold circuit, a controller, and a single, one-bit converter stage. The sample and hold circuit holds an input analog signal to form a captured analog signal. The controller determines a number of digital output bits required to generate digital output at a user defined conversion resolution. The one-bit converter stage processes an instance of a captured analog signal to generate an output bit. The controller iteratively processes a residue voltage through the one-bit converter stage a number of times required to generate the number of digital output bits to form a digital output with the user defined conversion resolution.
摘要翻译：一种具有动态可重构转换分辨率的模数转换器的方法和装置。模数转换器包括采样保持电路，控制器和单个1位转换器级。采样和保持电路保持输入模拟信号以形成捕获的模拟信号。控制器确定以用户定义的转换分辨率生成数字输出所需的数字输出位数。一位转换器级处理捕获的模拟信号的实例以产生输出位。控制器通过一位转换器级迭代地处理剩余电压，以产生数字输出位数来形成具有用户定义的转换分辨率的数字输出所需的次数。

2. 发明授权

US08270058B1 Coherence length controller 有权
标题翻译：相干长度控制器
公开(公告)号：US08270058B1
公开(公告)日：2012-09-18
申请号：US13277835
申请日：2011-10-20
申请人： Steven Edward Muenter , Todd Harding Tomkinson
发明人： Steven Edward Muenter , Todd Harding Tomkinson
IPC分类号： G02B26/00 , A61B3/00 , G01B9/02 , G02F1/01
CPC分类号： G01B9/0209 , G01B9/02009
摘要： Techniques for producing higher fidelity interferometer measurements by reducing sensitivity to spurious sources include reducing the coherence length of an electromagnetic beam. In addition, multiple surfaces within an optical system may be measured by electronically tuning the position of a coherence plane along the optical paths of an interferometer. A phase modulator is used in conjunction with a long coherence length electromagnetic source to generate beams for each leg of an interferometer. Providing a controlled broadband RF signal to the phase modulator increases the bandwidth of the beam and thereby reduces the coherence length of the beam. This reduces the spurious contributions to the output interference fringes from undesired surfaces along the beam path.
摘要翻译：通过降低对杂散源的灵敏度来产生更高保真干涉仪测量的技术包括降低电磁波束的相干长度。此外，光学系统中的多个表面可以通过电子调谐沿着干涉仪的光路的相干平面的位置来测量。相位调制器与长相干长度电磁源结合使用，以产生干涉仪每个支路的光束。向相位调制器提供受控的宽带RF信号增加了光束的带宽，从而降低了光束的相干长度。这减少了对沿着光束路径的不期望的表面的输出干涉条纹的杂散贡献。

3. 发明授权

US08045251B2 Coherence length controller 有权
标题翻译：相干长度控制器
公开(公告)号：US08045251B2
公开(公告)日：2011-10-25
申请号：US11951399
申请日：2007-12-06
申请人： Steven Edward Muenter , Todd Harding Tomkinson
发明人： Steven Edward Muenter , Todd Harding Tomkinson
IPC分类号： G02B26/00 , A61B3/00 , G01B9/02 , G02F1/01
CPC分类号： G01B9/0209 , G01B9/02009
摘要： Techniques for producing higher fidelity interferometer measurements by reducing sensitivity to spurious sources include reducing the coherence length of an electromagnetic beam. In addition, multiple surfaces within an optical system may be measured by electronically tuning the position of a coherence plane along the optical paths of an interferometer. A phase modulator is used in conjunction with a long coherence length electromagnetic source to generate beams for each leg of an interferometer. Providing a controlled broadband RF signal to the phase modulator increases the bandwidth of the beam and thereby reduces the coherence length of the beam. This reduces the spurious contributions to the output interference fringes from undesired surfaces along the beam path.
摘要翻译：通过降低对杂散源的灵敏度来产生更高保真干涉仪测量的技术包括降低电磁波束的相干长度。此外，光学系统中的多个表面可以通过电子调谐沿着干涉仪的光路的相干平面的位置来测量。相位调制器与长相干长度电磁源结合使用，以产生干涉仪每个支路的光束。向相位调制器提供受控的宽带RF信号增加了光束的带宽，从而降低了光束的相干长度。这减少了对沿着光束路径的不期望的表面的输出干涉条纹的杂散贡献。

4. 发明申请

US20090147341A1 Coherence Length Controller 有权
标题翻译：相干长度控制器
公开(公告)号：US20090147341A1
公开(公告)日：2009-06-11
申请号：US11951399
申请日：2007-12-06
申请人： Steven Edward Muenter , Todd Harding Tomkinson
发明人： Steven Edward Muenter , Todd Harding Tomkinson
IPC分类号： G02F1/01
CPC分类号： G01B9/0209 , G01B9/02009
摘要： Techniques for producing higher fidelity interferometer measurements by reducing sensitivity to spurious sources include reducing the coherence length of an electromagnetic beam. In addition, multiple surfaces within an optical system may be measured by electronically tuning the position of a coherence plane along the optical paths of an interferometer. A phase modulator is used in conjunction with a long coherence length electromagnetic source to generate beams for each leg of an interferometer. Providing a controlled broadband RF signal to the phase modulator increases the bandwidth of the beam and thereby reduces the coherence length of the beam. This reduces the spurious contributions to the output interference fringes from undesired surfaces along the beam path.
摘要翻译：通过降低对杂散源的灵敏度来产生更高保真干涉仪测量的技术包括降低电磁波束的相干长度。此外，光学系统中的多个表面可以通过电子调谐沿着干涉仪的光路的相干平面的位置来测量。相位调制器与长相干长度电磁源结合使用，以产生干涉仪每个支路的光束。向相位调制器提供受控的宽带RF信号增加了光束的带宽，从而降低了光束的相干长度。这减少了对沿着光束路径的不期望的表面的输出干涉条纹的杂散贡献。

5. 发明授权

US07561090B1 Focal plane array with serial, variable bit width analog to digital converter 有权
标题翻译：具有串行可变位宽模数转换器的焦平面阵列
公开(公告)号：US07561090B1
公开(公告)日：2009-07-14
申请号：US11968782
申请日：2008-01-03
申请人： Steven Edward Muenter , Richard H. Burns
发明人： Steven Edward Muenter , Richard H. Burns
IPC分类号： H03M1/12
CPC分类号： H03M1/007 , H03M1/40 , H04N5/378
摘要： A method and apparatus for a focal plane array with serial, variable bit width analog to digital converter. The focal plane array includes a plurality of pixels and a dynamically reconfigurable analog to digital converter. The controller determines a number of digital output bits required to generate digital output at a selected conversion resolution. A sample and hold circuit holds an analog voltage from a pixel to form a captured analog signal. A one-bit converter stage processes an instance of a captured analog signal to generate an output bit. The controller iteratively processes a residue voltage through the one-bit converter stage a number of times required to generate the number of digital output bits to form a digital output with the user defined conversion resolution.
摘要翻译：一种具有串行可变位宽模数转换器的焦平面阵列的方法和装置。焦平面阵列包括多个像素和动态可重构模数转换器。控制器以所选择的转换分辨率确定产生数字输出所需的数字输出位数。采样和保持电路保持来自像素的模拟电压以形成捕获的模拟信号。一位转换器级处理捕获的模拟信号的实例以产生输出位。控制器通过一位转换器级迭代地处理剩余电压，以产生数字输出位数来形成具有用户定义的转换分辨率的数字输出所需的次数。

6. 发明授权

US07561091B1 Analog to digital converter with dynamically reconfigurable conversion resolution 有权
标题翻译：具有动态可重构转换分辨率的模数转换器
公开(公告)号：US07561091B1
公开(公告)日：2009-07-14
申请号：US11968917
申请日：2008-01-03
申请人： Steven Edward Muenter , Kenneth J. Carrillo
发明人： Steven Edward Muenter , Kenneth J. Carrillo
IPC分类号： H03M1/66
CPC分类号： H03M1/007 , H03M1/40
摘要： A method and apparatus for an analog to digital converter with dynamically reconfigurable conversion resolution. The analog to digital converter comprises a sample and hold circuit, a controller, and a single, one-bit converter stage. The sample and hold circuit holds an input analog signal to form a captured analog signal. The controller determines a number of digital output bits required to generate digital output at a user defined conversion resolution. The one-bit converter stage processes an instance of a captured analog signal to generate an output bit. The controller iteratively processes a residue voltage through the one-bit converter stage a number of times required to generate the number of digital output bits to form a digital output with the user defined conversion resolution.
摘要翻译：一种具有动态可重构转换分辨率的模数转换器的方法和装置。模数转换器包括采样保持电路，控制器和单个1位转换器级。采样和保持电路保持输入模拟信号以形成捕获的模拟信号。控制器确定以用户定义的转换分辨率生成数字输出所需的数字输出位数。一位转换器级处理捕获的模拟信号的实例以产生输出位。控制器通过一位转换器级迭代地处理剩余电压，以产生数字输出位数来形成具有用户定义的转换分辨率的数字输出所需的次数。

7. 发明申请

US20090174588A1 FOCAL PLANE ARRAY WITH SERIAL, VARIABLE BIT WIDTH ANALOG TO DIGITAL CONVERTER 有权
标题翻译：具有串行，可变位宽模数转换器的FOCAL PLANE ARRAY
公开(公告)号：US20090174588A1
公开(公告)日：2009-07-09
申请号：US11968782
申请日：2008-01-03
申请人： Steven Edward Muenter , Richard H. Burns
发明人： Steven Edward Muenter , Richard H. Burns
IPC分类号： H03M1/12
CPC分类号： H03M1/007 , H03M1/40 , H04N5/378
摘要： A method and apparatus for a focal plane array with serial, variable bit width analog to digital converter. The focal plane array includes a plurality of pixels and a dynamically reconfigurable analog to digital converter. The controller determines a number of digital output bits required to generate digital output at a selected conversion resolution. A sample and hold circuit holds an analog voltage from a pixel to form a captured analog signal. A one-bit converter stage processes an instance of a captured analog signal to generate an output bit. The controller iteratively processes a residue voltage through the one-bit converter stage a number of times required to generate the number of digital output bits to form a digital output with the user defined conversion resolution.
摘要翻译：一种具有串行可变位宽模数转换器的焦平面阵列的方法和装置。焦平面阵列包括多个像素和动态可重构模数转换器。控制器以所选择的转换分辨率确定产生数字输出所需的数字输出位数。采样和保持电路保持来自像素的模拟电压以形成捕获的模拟信号。一位转换器级处理捕获的模拟信号的实例以产生输出位。控制器通过一位转换器级迭代地处理剩余电压，以产生数字输出位数来形成具有用户定义的转换分辨率的数字输出所需的次数。

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