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1. 发明申请

US20070011574A1 Memory device 有权
标题翻译：内存设备
公开(公告)号：US20070011574A1
公开(公告)日：2007-01-11
申请号：US11151650
申请日：2005-06-14
申请人： Christian Weiss , Sven Kalms , Hermann Ruckerbauer
发明人： Christian Weiss , Sven Kalms , Hermann Ruckerbauer
IPC分类号： G11C29/00
CPC分类号： G06F11/1008 , G11C5/04
摘要： A memory device includes at least two DRAM memory modules, at least one external ECC module, and a memory controller. The external ECC module provides the memory modules with ECC functionality. Each memory module is connected to the memory controller via a respective memory channel. The external ECC modules are connected to the memory controller via a common ECC channel. Each external ECC module is assigned to a group of the memory modules. The memory modules of one group with respective ECC modules are synchronously operated by the memory controller.
摘要翻译：存储器件包括至少两个DRAM存储器模块，至少一个外部ECC模块和存储器控制器。外部ECC模块为内存模块提供ECC功能。每个存储器模块通过相应的存储器通道连接到存储器控制器。外部ECC模块通过公共ECC通道连接到存储器控制器。每个外部ECC模块分配给一组内存模块。具有相应ECC模块的一组存储器模块由存储器控制器同步操作。

2. 发明申请

US20120314363A1 HEAT TRANSFER SYSTEM 有权
标题翻译：换热系统
公开(公告)号：US20120314363A1
公开(公告)日：2012-12-13
申请号：US13568968
申请日：2012-08-07
申请人： Sven Kalms , Christian Weiss
发明人： Sven Kalms , Christian Weiss
IPC分类号： G06F1/20
CPC分类号： H01L23/427 , G06F1/20 , H01L2924/0002 , H01L2924/00
摘要： The memory module comprises a circuit board with a first and a second side, wherein memory chips are arranged at least on the first side. A longitudinally extending module heat conductor is arranged on the first side. The module heat conductor comprises a contact surface configured to contact a heat transfer system.
摘要翻译：存储器模块包括具有第一和第二侧的电路板，其中存储器芯片至少布置在第一侧上。在第一侧上布置有纵向延伸的模块导热体。模块导热体包括接触表面，其被配置为接触传热系统。

3. 发明授权

US08238101B2 Heat transfer system for memory modules 有权
标题翻译：内存模块传热系统
公开(公告)号：US08238101B2
公开(公告)日：2012-08-07
申请号：US12201524
申请日：2008-08-29
申请人： Sven Kalms , Christian Weiss
发明人： Sven Kalms , Christian Weiss
IPC分类号： H05K7/20 , F28F7/00 , H01L23/34 , H01R13/62
CPC分类号： H01L23/427 , G06F1/20 , H01L2924/0002 , H01L2924/00
摘要： The memory module comprises a circuit board with a first and a second side, wherein memory chips are arranged at least on the first side. A longitudinally extending module heat conductor is arranged on the first side. The module heat conductor comprises a contact surface configured to contact a heat transfer system.
摘要翻译：存储器模块包括具有第一和第二侧的电路板，其中存储器芯片至少布置在第一侧上。第一侧布置有纵向延伸的模块导热体。模块导热体包括接触表面，其被配置为接触传热系统。

4. 发明申请

US20050027923A1 Hub chip for one or more memory modules 有权
标题翻译： Hub芯片用于一个或多个内存模块
公开(公告)号：US20050027923A1
公开(公告)日：2005-02-03
申请号：US10877139
申请日：2004-06-25
申请人： Sven Kalms , Helmut Kandolf
发明人： Sven Kalms , Helmut Kandolf
IPC分类号： G06F13/00 , G06F13/16
CPC分类号： G06F13/16
摘要： One embodiment of the invention provides a hub chip comprising: an address bus input for receiving a plurality of successively sent portions of address and/or command data, a shift register which has register elements and is connected to the address bus input to receive the plurality of portions of the address and/or command data, the shift register being connected to the address bus input so that, when the address and/or command data are received, the portions of the address and/or command data are successively written to the register elements, an address bus output for outputting the received address and/or command data, a memory module interface for connecting one or more memory modules, where the hub chip addresses none, one or a plurality of the connected memory modules, depending on the address and/or command data transferred, and a driver element provided to output the received portion of the address and/or command data to the address bus output before all of the portions of the address and/or command data have been received in full.
摘要翻译：本发明的一个实施例提供了一种集线器芯片，其包括：地址总线输入，用于接收地址和/或命令数据的多个连续发送的部分;移位寄存器，具有寄存器元件，并连接到地址总线输入端以接收多个地址和/或命令数据的一部分，移位寄存器连接到地址总线输入，使得当地址和/或命令数据被接收时，地址和/或命令数据的部分被连续写入到寄存器元件，用于输出接收到的地址和/或命令数据的地址总线输出，用于连接一个或多个存储器模块的存储器模块接口，其中集线器芯片不依赖于所连接的存储器模块，一个或多个连接的存储器模块，地址和/或命令数据，以及提供的驱动器元件，用于在地址总线输出的所有部分之前将地址和/或命令数据的接收部分输出到地址总线输出已收到地址和/或命令数据。

5. 发明申请

US20090080151A1 HEAT TRANSFER SYSTEM 有权
标题翻译：换热系统
公开(公告)号：US20090080151A1
公开(公告)日：2009-03-26
申请号：US12201524
申请日：2008-08-29
申请人： Sven Kalms , Christian Weiss
发明人： Sven Kalms , Christian Weiss
IPC分类号： H05K5/00 , H05K1/00
CPC分类号： H01L23/427 , G06F1/20 , H01L2924/0002 , H01L2924/00
摘要： The memory module comprises a circuit board with a first and a second side, wherein memory chips are arranged at least on the first side. A longitudinally extending module heat conductor is arranged on the first side. The module heat conductor comprises a contact surface configured to contact a heat transfer system.
摘要翻译：存储器模块包括具有第一和第二侧的电路板，其中存储器芯片至少布置在第一侧上。在第一侧上布置有纵向延伸的模块导热体。模块导热体包括接触表面，其被配置为接触传热系统。

6. 发明授权

US07362650B2 Memory arrangement having a plurality of RAM chips 有权
标题翻译：具有多个RAM芯片的存储装置
公开(公告)号：US07362650B2
公开(公告)日：2008-04-22
申请号：US11394142
申请日：2006-03-30
申请人： Helmut Kandolf , Sven Kalms , Maksim Kuzmenka , Michael Hausmann
发明人： Helmut Kandolf , Sven Kalms , Maksim Kuzmenka , Michael Hausmann
IPC分类号： G11C8/00
CPC分类号： G11C7/106 , G11C7/1006 , G11C7/1027 , G11C7/1051 , G11C7/1078 , G11C7/1087 , G11C8/12 , G11C11/4096
摘要： Embodiments of the invention provide a memory arrangement having an even number k=4 of physically spaced RAM chips, on each of which it is possible for m data items to be simultaneously written or read via an m-bit data bus, also having a register for buffer-storing and transmitting n respective parallel data bits as a packet between an n-bit parallel port and the data buses, and having a selection device which responds to selection bits in order to select a respective separate cell group within the plurality of the chips for each of the disjoint m-bit groups (d) of the n-bit packet. The k chips are classified into q=2 disjoint chip groups, each of which comprises k/q chips which differ as little as possible from one another in terms of their distance from the register. The number m is chosen to be equal to q*n/k, and the selection device is designed to select a respective separate chip from the same chip group and a cell group in this chip for each m-bit group of the same n-bit packet.
摘要翻译：本发明的实施例提供了具有物理间隔RAM芯片的偶数k = 4的存储器布置，其中每一个都可以经由m位数据总线同时写入或读取m个数据项，该m位数据总线也具有寄存器用于将n个相应的并行数据位作为n位并行端口和数据总线之间的分组进行缓冲存储和发送，并且具有响应于选择位的选择装置，以便选择多个 n位数据包的每个不相交的m位组（d）的芯片。 k个芯片被分类为q = 2个不相交的芯片组，每个芯片组包括在距离寄存器的距离方面彼此相差尽可能小的k / q个芯片组。数字m被选择为等于q * n / k，并且选择装置被设计为从相同芯片组中的每个m位组的该芯片中选择相应的单独芯片和单元组，位数据包。

7. 发明授权

US08094654B2 Information transfer in electronic modules 有权
标题翻译：电子模块中的信息传输
公开(公告)号：US08094654B2
公开(公告)日：2012-01-10
申请号：US11528988
申请日：2006-09-27
申请人： Sven Kalms , Christian Weiss
发明人： Sven Kalms , Christian Weiss
IPC分类号： H04L12/50
CPC分类号： H01L25/065 , H01L2924/0002 , H01L2924/00
摘要： An electronic assembly includes electronic modules connected in a series circuit such that a particular number of input connections of one of the electronic modules is connected with the particular number of output connections of another of the electronic modules. Each electronic module is configured to pass on an information which each electronic module receives on an input side at an nth of each electronic module's input connections to an nth of each electronic module's output connections. The input connections and output connections of each electronic module are arranged in a same geometric arrangement. Each electronic module is configured to receive, irrespective of a geometric orientation of the input connections of a given electronic module in relation to a geometric orientation of the output connections of a corresponding electronic module connected with the given electronic module on the input side of the given electronic module, at the same of the given electronic module's input connections, a particular information which is transmitted by the same output connections of the corresponding electronic module.
摘要翻译：电子组件包括以串联电路连接的电子模块，使得一个电子模块的特定数量的输入连接与另一个电子模块的特定数量的输出连接相连接。每个电子模块被配置为将每个电子模块在每个电子模块的输入连接的第n个的输入侧接收的信息传递到每个电子模块的输出连接的第n个。每个电子模块的输入连接和输出连接以相同的几何排列布置。每个电子模块被配置为接收与给定电子模块的输入连接相对于在给定的输入端上与给定电子模块连接的相应电子模块的输出连接的几何取向的几何取向电子模块，在给定的电子模块的输入连接相同的情况下，由相应电子模块的相同输出连接传输的特定信息。

8. 发明申请

US20070106837A1 Information transfer in electronic modules 有权
标题翻译：电子模块中的信息传输
公开(公告)号：US20070106837A1
公开(公告)日：2007-05-10
申请号：US11528988
申请日：2006-09-27
申请人： Sven Kalms , Christian Weiss
发明人： Sven Kalms , Christian Weiss
IPC分类号： G06F12/00
CPC分类号： H01L25/065 , H01L2924/0002 , H01L2924/00
摘要： An electronic assembly includes electronic modules connected in a series circuit such that a particular number of input connections of one of the electronic modules is connected with the particular number of output connections of another of the electronic modules. Each electronic module is configured to pass on an information which each electronic module receives on an input side at an nth of each electronic module's input connections to an nth of each electronic module's output connections. The input connections and output connections of each electronic module are arranged in a same geometric arrangement. Each electronic module is configured to receive, irrespective of a geometric orientation of the input connections of a given electronic module in relation to a geometric orientation of the output connections of a corresponding electronic module connected with the given electronic module on the input side of the given electronic module, at the same of the given electronic module's input connections, a particular information which is transmitted by the same output connections of the corresponding electronic module.
摘要翻译：电子组件包括以串联电路连接的电子模块，使得一个电子模块的特定数量的输入连接与另一个电子模块的特定数量的输出连接相连接。每个电子模块被配置为将每个电子模块在每个电子模块的输入连接的第n个的输入侧接收的信息传递到每个电子模块的输出连接的第n个。每个电子模块的输入连接和输出连接以相同的几何排列布置。每个电子模块被配置为接收与给定电子模块的输入连接相对于在给定的输入端上与给定电子模块连接的相应电子模块的输出连接的几何取向的几何取向电子模块，在给定的电子模块的输入连接相同的情况下，由相应电子模块的相同输出连接传输的特定信息。

9. 发明申请

US20060250881A1 Memory arrangement having a plurality of RAM chips 有权
标题翻译：具有多个RAM芯片的存储装置
公开(公告)号：US20060250881A1
公开(公告)日：2006-11-09
申请号：US11394142
申请日：2006-03-30
申请人： Helmut Kandolf , Sven Kalms , Maksim Kuzmenka , Michael Hausmann
发明人： Helmut Kandolf , Sven Kalms , Maksim Kuzmenka , Michael Hausmann
IPC分类号： G11C8/00
CPC分类号： G11C7/106 , G11C7/1006 , G11C7/1027 , G11C7/1051 , G11C7/1078 , G11C7/1087 , G11C8/12 , G11C11/4096
摘要： Embodiments of the invention provide a memory arrangement having an even number k=4 of physically spaced RAM chips, on each of which it is possible for m data items to be simultaneously written or read via an m-bit data bus, also having a register for buffer-storing and transmitting n respective parallel data bits as a packet between an n-bit parallel port and the data buses, and having a selection device which responds to selection bits in order to select a respective separate cell group within the plurality of the chips for each of the disjoint m-bit groups (d) of the n-bit packet. The k chips are classified into q=2 disjoint chip groups, each of which comprises k/q chips which differ as little as possible from one another in terms of their distance from the register. The number m is chosen to be equal to q*n/k, and the selection device is designed to select a respective separate chip from the same chip group and a cell group in this chip for each m-bit group of the same n-bit packet.
摘要翻译：本发明的实施例提供了具有物理间隔RAM芯片的偶数k = 4的存储器布置，其中每一个都可以经由m位数据总线同时写入或读取m个数据项，该m位数据总线也具有寄存器用于将n个相应的并行数据位作为n位并行端口和数据总线之间的分组进行缓冲存储和发送，并且具有响应于选择位的选择装置，以便选择多个 n位数据包的每个不相交的m位组（d）的芯片。 k个芯片被分类为q = 2个不相交的芯片组，每个芯片组包括在距离寄存器的距离方面彼此相差尽可能小的k / q个芯片组。数字m被选择为等于q * n / k，并且选择装置被设计为从相同芯片组中的每个m位组的该芯片中选择相应的单独芯片和单元组，位数据包。

10. 发明授权

US08879260B2 Heat transfer system 有权
标题翻译：传热系统
公开(公告)号：US08879260B2
公开(公告)日：2014-11-04
申请号：US13568968
申请日：2012-08-07
申请人： Sven Kalms , Christian Weiss
发明人： Sven Kalms , Christian Weiss
IPC分类号： H05K7/20 , G06F1/20 , H01L23/427 , F28F7/00 , H01L23/34 , H01R13/62
CPC分类号： H01L23/427 , G06F1/20 , H01L2924/0002 , H01L2924/00
摘要： The memory module comprises a circuit board with a first and a second side, wherein memory chips are arranged at least on the first side. A longitudinally extending module heat conductor is arranged on the first side. The module heat conductor comprises a contact surface configured to contact a heat transfer system.
摘要翻译：存储器模块包括具有第一和第二侧的电路板，其中存储器芯片至少布置在第一侧上。在第一侧上布置有纵向延伸的模块导热体。模块导热体包括接触表面，其被配置为接触传热系统。

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