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    • 5. 发明授权
    • Information transfer in electronic modules
    • 电子模块中的信息传输
    • US08094654B2
    • 2012-01-10
    • US11528988
    • 2006-09-27
    • Sven KalmsChristian Weiss
    • Sven KalmsChristian Weiss
    • H04L12/50
    • H01L25/065H01L2924/0002H01L2924/00
    • An electronic assembly includes electronic modules connected in a series circuit such that a particular number of input connections of one of the electronic modules is connected with the particular number of output connections of another of the electronic modules. Each electronic module is configured to pass on an information which each electronic module receives on an input side at an nth of each electronic module's input connections to an nth of each electronic module's output connections. The input connections and output connections of each electronic module are arranged in a same geometric arrangement. Each electronic module is configured to receive, irrespective of a geometric orientation of the input connections of a given electronic module in relation to a geometric orientation of the output connections of a corresponding electronic module connected with the given electronic module on the input side of the given electronic module, at the same of the given electronic module's input connections, a particular information which is transmitted by the same output connections of the corresponding electronic module.
    • 电子组件包括以串联电路连接的电子模块,使得一个电子模块的特定数量的输入连接与另一个电子模块的特定数量的输出连接相连接。 每个电子模块被配置为将每个电子模块在每个电子模块的输入连接的第n个的输入侧接收的信息传递到每个电子模块的输出连接的第n个。 每个电子模块的输入连接和输出连接以相同的几何排列布置。 每个电子模块被配置为接收与给定电子模块的输入连接相对于在给定的输入端上与给定电子模块连接的相应电子模块的输出连接的几何取向的几何取向 电子模块,在给定的电子模块的输入连接相同的情况下,由相应电子模块的相同输出连接传输的特定信息。
    • 6. 发明申请
    • Information transfer in electronic modules
    • 电子模块中的信息传输
    • US20070106837A1
    • 2007-05-10
    • US11528988
    • 2006-09-27
    • Sven KalmsChristian Weiss
    • Sven KalmsChristian Weiss
    • G06F12/00
    • H01L25/065H01L2924/0002H01L2924/00
    • An electronic assembly includes electronic modules connected in a series circuit such that a particular number of input connections of one of the electronic modules is connected with the particular number of output connections of another of the electronic modules. Each electronic module is configured to pass on an information which each electronic module receives on an input side at an nth of each electronic module's input connections to an nth of each electronic module's output connections. The input connections and output connections of each electronic module are arranged in a same geometric arrangement. Each electronic module is configured to receive, irrespective of a geometric orientation of the input connections of a given electronic module in relation to a geometric orientation of the output connections of a corresponding electronic module connected with the given electronic module on the input side of the given electronic module, at the same of the given electronic module's input connections, a particular information which is transmitted by the same output connections of the corresponding electronic module.
    • 电子组件包括以串联电路连接的电子模块,使得一个电子模块的特定数量的输入连接与另一个电子模块的特定数量的输出连接相连接。 每个电子模块被配置为将每个电子模块在每个电子模块的输入连接的第n个的输入侧接收的信息传递到每个电子模块的输出连接的第n个。 每个电子模块的输入连接和输出连接以相同的几何排列布置。 每个电子模块被配置为接收与给定电子模块的输入连接相对于在给定的输入端上与给定电子模块连接的相应电子模块的输出连接的几何取向的几何取向 电子模块,在给定的电子模块的输入连接相同的情况下,由相应电子模块的相同输出连接传输的特定信息。
    • 10. 发明授权
    • Re-driving CAwD and rD signal lines
    • 重新启动CAwD和rD信号线
    • US07414917B2
    • 2008-08-19
    • US11192335
    • 2005-07-29
    • Hermann RuckerbauerSimon MuffChristian WeissPeter Gregorius
    • Hermann RuckerbauerSimon MuffChristian WeissPeter Gregorius
    • G11C8/00
    • G11C5/04G11C5/06H05K1/142
    • Semiconductor memory modules and semiconductor memory systems using the same are described herein. The modules divide a conventional DIMM into a series of separate, smaller memory modules. Each memory module includes at least one semiconductor memory chip arranged on a substrate; CAwD signal input lines arranged on the substrate in a first predetermined line number and connecting one of the semiconductor memory chips to CAwD input signal pins on the substrate; and rD signal output lines arranged on the substrate in a second predetermined line number and connecting the one or a last semiconductor memory to a second number of rD output signal pins of the substrate. In a semiconductor memory system including the semiconductor memory modules, each memory module is separately connected to a memory controller by the CAwD signal input lines and the rD signal output lines in a respective point-to-point fashion.
    • 本文描述了使用其的半导体存储器模块和半导体存储器系统。 这些模块将常规DIMM分成一系列独立的较小内存模块。 每个存储器模块包括布置在衬底上的至少一个半导体存储器芯片; CAwD信号输入线,以第一预定行号排列在基板上,并将半导体存储器芯片之一连接到基板上的CAwD输入信号引脚; 和rD信号输出线,以第二预定行号排列在基板上,并将一个或最后一个半导体存储器连接到基板的第二数量的rD输出信号引脚。 在包括半导体存储器模块的半导体存储器系统中,每个存储器模块通过CAwD信号输入线和rD信号输出线分别以点对点的方式连接到存储器控制器。