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    • 1. 发明申请
    • INFORMATION DISTRIBUTION SYSTEM AND INFORMATION MANAGEMENT DEVICE
    • 信息分发系统和信息管理设备
    • US20130028112A1
    • 2013-01-31
    • US13494159
    • 2012-06-12
    • Masahiko MIZUTANITakayuki KANNO
    • Masahiko MIZUTANITakayuki KANNO
    • H04L12/24H04L12/26
    • H04L43/106
    • For a user signal (signal requesting for provision of services) input to a signal transport network, header information for transmission in the signal transport network is given at a portal edge of the signal transport network on the user side. The information given at this time includes a time stamp indicating the time of receiving the user signal by the edge. In a server on the service provider side, the time stamp is referred to, and services are provided for each user. Specifically, a response process schedule for each user is produced from the time stamp, and waiting time is reduced and a priority process is performed in accordance with the time of issuing the request by the user.
    • 对于输入到信号传输网络的用户信号(请求提供服务的信号),在用户侧的信号传输网络的门限边缘处给出信号传输网络中用于传输的头信息。 此时给出的信息包括指示边缘接收用户信号的时间的时间戳。 在服务提供商侧的服务器中,引用时间戳,并为每个用户提供服务。 具体地说,从时间标记产生每个用户的响应过程调度,并且根据用户发出请求的时间,等待时间减少并执行优先级处理。
    • 3. 发明授权
    • Buffer management method and packet communication apparatus
    • 缓冲管理方法和分组通信装置
    • US08243745B2
    • 2012-08-14
    • US12699221
    • 2010-02-03
    • Hideki EndoAkihiko TanakaTakayuki KannoMasayuki TakaseTaisuke Ueta
    • Hideki EndoAkihiko TanakaTakayuki KannoMasayuki TakaseTaisuke Ueta
    • H04L12/56G06F3/00
    • H04L49/9015H04L49/90
    • A packet communication apparatus includes a frame buffer of a linked list method and holds chain information and buffer size information, for structuring a linked list buffer for each user flow, in two areas consisting of an operation area and an update area. While usually in service, the buffer is structured by using the chain information in the operation area and the buffer size information in the same area such that the frame is read/written in the frame buffer. When the chain information in the update area and the buffer size information in the same area have been changed, a queue size is changed by reflecting the updated chain information and the updater buffer size information into the operation area, when both the read pointer and the write pointer respectively have gone around the buffer, or when there is no frame stored in the buffer.
    • 分组通信装置包括链表列表方法的帧缓冲器,并且在由操作区域和更新区域组成的两个区域中保存用于为每个用户流构造链接列表缓冲器的链信息和缓冲器大小信息。 通常在使用中,通过使用操作区域中的链接信息和相同区域中的缓冲器大小信息来构造缓冲器,使得帧被读取/写入帧缓冲器。 当更新区域中的链路信息和相同区域中的缓冲器大小信息已经改变时,当读取指针和读取指针都被读取时,通过将更新的链接信息和更新的缓冲器大小信息反映到操作区域来改变队列大小 写指针分别绕过缓冲区,或者当没有帧存储在缓冲区中时。
    • 4. 发明申请
    • BUFFER MANAGEMENT METHOD AND PACKET COMMUNICATION APPARATUS
    • 缓冲区管理方法和分组通信设备
    • US20100220743A1
    • 2010-09-02
    • US12699221
    • 2010-02-03
    • Hideki ENDOAkihiko TANAKATakayuki KANNOMasayuki TAKASETaisuke UETA
    • Hideki ENDOAkihiko TANAKATakayuki KANNOMasayuki TAKASETaisuke UETA
    • H04L12/54
    • H04L49/9015H04L49/90
    • A packet communication apparatus includes a frame buffer of a linked list method and holds chain information and buffer size information, for structuring a linked list buffer for each user flow, in two areas consisting of an operation area and an update area. While usually in service, the buffer is structured by using the chain information in the operation area and the buffer size information in the same area such that the frame is read/written in the frame buffer. When the chain information in the update area and the buffer size information in the same area have been changed, a queue size is changed by reflecting the updated chain information and the updater buffer size information into the operation area, when both the read pointer and the write pointer respectively have gone around the buffer, or when there is no frame stored in the buffer.
    • 分组通信装置包括链表列表方法的帧缓冲器,并且在由操作区域和更新区域组成的两个区域中保存用于为每个用户流构造链接列表缓冲器的链信息和缓冲器大小信息。 通常在使用中,通过使用操作区域中的链接信息和相同区域中的缓冲器大小信息来构造缓冲器,使得帧被读取/写入帧缓冲器。 当更新区域中的链路信息和相同区域中的缓冲器大小信息已经改变时,当读取指针和读取指针都被读取时,通过将更新的链接信息和更新的缓冲器大小信息反映到操作区域来改变队列大小 写指针分别绕过缓冲区,或者当没有帧存储在缓冲区中时。
    • 5. 发明申请
    • Packet transfer apparatus and packet transfer method
    • 分组传送装置和分组传送方法
    • US20090016366A1
    • 2009-01-15
    • US12073766
    • 2008-03-10
    • Hideki EndoMasayuki TakaseShikou MatsushimaAkihiko TanakaTakayuki KannoYoshihiro Ashi
    • Hideki EndoMasayuki TakaseShikou MatsushimaAkihiko TanakaTakayuki KannoYoshihiro Ashi
    • H04L12/56
    • H04L45/00H04L45/22H04L45/28
    • Disclosed herewith is a packet transfer apparatus that carries out 1+1 protection switching for traffics to be received variably in both length and cycle. The apparatus enables flows to be multiplexed and the link usage efficiency to be improved without generating any buffer overflow errors. The data transfer apparatus, upon receiving the third sequentially numbered data from the first communication route before receiving the preceding second sequentially numbered data, stores the received third data in a buffer. And upon receiving the second sequentially numbered data from the second communication route, the apparatus sends the second and third data sequentially. Then, upon receiving the third sequentially numbered data from the second communication route before receiving the second sequentially numbered data, the apparatus sends the third data when a predetermined waiting time expires.
    • 这里公开了一种分组传送装置,其执行1 + 1保护切换以便在长度和周期中可变地接收业务。 该装置能够使流复用,并且链路使用效率得到改善,而不产生任何缓冲器溢出错误。 数据传送装置在接收到先前的第二顺序编号数据之前从第一通信路由接收到第三顺序编号的数据后,将接收的第三数据存储在缓冲器中。 并且在从第二通信路由接收到第二顺序编号的数据时,装置依次发送第二和第三数据。 然后,在接收到第二顺序编号数据之前从第二通信路由接收到第三顺序编号的数据后,当预定的等待时间到期时,装置发送第三数据。
    • 7. 发明授权
    • High voltage supply having a voltage stabilizer
    • 具有稳压器的高压电源
    • US5043598A
    • 1991-08-27
    • US407825
    • 1989-09-15
    • Tsutomu MaedaKiyoshi MatsuiMichio IshikawaTakayuki KannoYasushi Iwata
    • Tsutomu MaedaKiyoshi MatsuiMichio IshikawaTakayuki KannoYasushi Iwata
    • H02M9/02H02M9/06H04N3/185
    • H04N3/185
    • A high voltage generating circuit which includes a switching circuit for switching a DC input, a fly-back transformer whose input coil is driven by pulses delivered from the switching actuation of the switching actuation of the circuit, a rectifier circuit for rectifying the fly-back voltage generated in the output coil of the fly-back transformer, a capacitor for smoothing the rectified output, and a voltage stabilizing circuit. A diode is electrically connected to one terminal of the output coil of the fly-back transformer on the low-voltage side thereof as compared with the ground, the diode being so determined as to position in the forward direction to the direction of rectification. The voltage stabilizing circuit is formed by a voltage sensing circuit for sensing a DC high voltage output, comparing it with a reference voltage applied from a reference voltage source and generating an output of a result of comparison and a control circuit connected between the anode of the diode and the ground terminal. The control circuit is formed of a plurality of transistors including transistors controlled in response to the output from the voltage sensing circuit and a protective circuit for each of the transistors.
    • 一种高压发生电路,包括用于切换直流输入的开关电路,其反相变压器,其输入线圈由从电路的开关致动的切换致动传递的脉冲驱动;整流电路,用于整流回扫 在回扫变压器的输出线圈中产生的电压,用于平滑整流输出的电容器和稳压电路。 与地电位相比,二极管在低压侧与反激式变压器的输出线圈的一个端子电连接,二极管被确定为朝向整流方向的正向位置。 电压稳定电路由用于感测直流高压输出的电压感测电路形成,将其与从参考电压源施加的参考电压进行比较,并产生比较结果的输出和连接在比较电路的阳极之间的控制电路 二极管和接地端子。 控制电路由多个晶体管构成,晶体管包括响应于来自电压感测电路的输出而被控制的晶体管,以及每个晶体管的保护电路。
    • 10. 发明申请
    • PACKET TRANSFER DEVICE AND PACKET TRANSFER METHOD
    • 分组传输设备和分组传输方法
    • US20120127877A1
    • 2012-05-24
    • US13301878
    • 2011-11-22
    • Kazuhiro WATANABEYoshihiro ASHITakayuki KANNOMasayuki TAKASE
    • Kazuhiro WATANABEYoshihiro ASHITakayuki KANNOMasayuki TAKASE
    • H04L12/26
    • H04L47/22H04L47/28H04L47/31
    • Packet transfer device and method have both a processing procedure for uninterruptible-switching desiring packets and a processing procedure for low-delay desiring packets, and process each user packet according to a desired one of the processing procedures. The uninterruptible-switching desiring packets are set to be in phase by a delay unit and written into an uninterruptible-switching memory. The low-delay desiring packets are written into a low-delay memory without passing trough the delay unit, that is, without being delayed. A read-out controller reads out a packet from the uninterruptible-switching memory. When the read-out packet is an uninterruptible-switching desiring packet, the packet is directly output, and when the read-out packet is a low-delay desiring packet, the packet is discarded, and a low-delay desiring packet is read out from the low-delay memory and output.
    • 分组传送装置和方法具有用于不间断切换期望分组的处理过程和用于低延迟期望分组的处理过程,并且根据所需的处理过程来处理每个用户分组。 不间断切换期望分组被设置为与延迟单元同相并写入不间断切换存储器。 低延迟期望分组被写入低延迟存储器,而不经过延迟单元,即不被延迟。 读出控制器从不间断切换存储器读出数据包。 当读出的分组是不间断切换需求分组时,直接输出分组,当读出的分组是低延迟期望分组时,丢弃分组,并且读出低延迟期望分组 从低延迟存储器和输出。