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1. 发明申请

US20150100741A1 TRANSACTIONAL MEMORY MANAGEMENT TECHNIQUES 有权
标题翻译：交易记忆管理技术
公开(公告)号：US20150100741A1
公开(公告)日：2015-04-09
申请号：US14129936
申请日：2013-07-15
申请人： Irina Calciu , Justin E. Gottschlich , Tatiana Shpeisman
发明人： Irina Calciu , Justin E. Gottschlich , Tatiana Shpeisman
IPC分类号： G06F9/46
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/067 , G06F3/0673 , G06F9/44 , G06F9/466 , G06F9/467 , G06F12/0813
摘要： Techniques for improved transactional memory management are described. In one embodiment, for example, an apparatus may comprise a processor element, an execution component for execution by the processor element to concurrently execute a software transaction and a hardware transaction according to a transactional memory process, a tracking component for execution by the processor element to activate a global lock to indicate that the software transaction is undergoing execution, and a finalization component for execution by the processor element to commit the software transaction and deactivate the global lock when execution of the software transaction completes, the finalization component to abort the hardware transaction when the global lock is active when execution of the hardware transaction completes. Other embodiments are described and claimed.
摘要翻译：描述了改进的事务性内存管理技术。在一个实施例中，例如，设备可以包括处理器元件，用于由处理器元件执行以根据事务存储器进程同时执行软件事务和硬件事务的执行部件，用于由处理器元件执行的跟踪部件激活全局锁以指示软件事务正在执行;以及最终化组件，用于由处理器元件执行以提交软件事务，并且在执行软件事务完成时停用全局锁定，终止组件中止硬件当执行硬件事务完成时，全局锁活动时的事务。描述和要求保护其他实施例。

2. 发明申请

US20140071144A1 METHOD AND APPARATUS TO FACILITATE SHARED POINTERS IN A HETEROGENEOUS PLATFORM 有权
标题翻译：在异位平台上配置共享点的方法和装置
公开(公告)号：US20140071144A1
公开(公告)日：2014-03-13
申请号：US14020616
申请日：2013-09-06
申请人： Yang Ni , Rajkishore Barik , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Jayanth N. Rao , Ben J. Ashbaugh , Tomasz Janczak
发明人： Yang Ni , Rajkishore Barik , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Jayanth N. Rao , Ben J. Ashbaugh , Tomasz Janczak
IPC分类号： G06T1/60
CPC分类号： G06F12/0806 , G06F15/167 , G06T1/60
摘要： A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.
摘要翻译：一种促进异构平台中的共享指针的方法和装置。在本发明的一个实施例中，异构或非均匀平台包括但不限于中央处理核心或单元，图形处理核心或单元，数字信号处理器，接口模块和任何其他形式的处理核心。异构平台具有促进共享指向CPU和GPU共享的存储器的位置的逻辑。通过在异构平台中共享指针，可以简化异构平台中不同核心之间的数据或信息共享。

3. 发明授权

US08065491B2 Efficient non-transactional write barriers for strong atomicity 有权
标题翻译：有效的非事务性写入障碍，用于强原子性
公开(公告)号：US08065491B2
公开(公告)日：2011-11-22
申请号：US11967232
申请日：2007-12-30
申请人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon , Bratin Saha
发明人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon , Bratin Saha
IPC分类号： G06F12/00
CPC分类号： G06F12/0804 , G06F9/3834 , G06F9/3863 , G06F9/466 , G06F9/52 , G06F9/522 , G06F12/0897 , G06F12/1027
摘要： A method and apparatus for providing optimized strong atomicity operations for non-transactional writes is herein described. Locks are acquired upon initial non-transactional writes to memory locations. The locks are maintained until an event is detected resulting in the release of the locks. As a result, in the intermediary period between acquiring and releasing the locks, any subsequent writes to memory locations that are locked are accelerated through non-execution of lock acquire operations.
摘要翻译：这里描述了用于为非事务写入提供优化的强原子性操作的方法和装置。在初始非事务写入到存储器位置时获取锁定。维护锁，直到检测到事件导致锁的释放。结果，在获取和释放锁之间的中间期，通过不执行锁获取操作来加速对被锁定的存储器位置的任何后续写入。

4. 发明申请

US20110271017A1 EFFICIENT NON-TRANSACTIONAL WRITE BARRIERS FOR STRONG ATOMICITY 有权
标题翻译：有效的非事务性写作障碍强大的原子性
公开(公告)号：US20110271017A1
公开(公告)日：2011-11-03
申请号：US13182162
申请日：2011-07-13
申请人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon , Bratin Saha
发明人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon , Bratin Saha
IPC分类号： G06F5/14
CPC分类号： G06F12/0804 , G06F9/3834 , G06F9/3863 , G06F9/466 , G06F9/52 , G06F9/522 , G06F12/0897 , G06F12/1027
摘要： A method and apparatus for providing optimized strong atomicity operations for non-transactional writes is herein described. Locks are acquired upon initial non-transactional writes to memory locations. The locks are maintained until an event is detected resulting in the release of the locks. As a result, in the intermediary period between acquiring and releasing the locks, any subsequent writes to memory locations that are locked are accelerated through non-execution of lock acquire operations.
摘要翻译：这里描述了用于为非事务写入提供优化的强原子性操作的方法和装置。在初始非事务写入到存储器位置时获取锁定。维护锁，直到检测到事件导致锁的释放。结果，在获取和释放锁之间的中间期，通过不执行锁获取操作来加速对锁定的存储器位置的任何后续写入。

5. 发明申请

US20100162249A1 OPTIMIZING QUIESCENCE IN A SOFTWARE TRANSACTIONAL MEMORY (STM) SYSTEM 审中-公开
标题翻译：优化软件交易存储器（STM）系统中的优势
公开(公告)号：US20100162249A1
公开(公告)日：2010-06-24
申请号：US12344144
申请日：2008-12-24
申请人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon
发明人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon
IPC分类号： G06F9/46
CPC分类号： G06F9/466
摘要： A method and apparatus for optimizing quiescence in a transactional memory system is herein described. Non-ordering transactions, such as read-only transactions, transactions that do not access non-transactional data, and write-buffering hardware transactions, are identified. Quiescence in weak atomicity software transactional memory (STM) systems is optimized through selective application of quiescence. As a result, transactions may be decoupled from dependency on quiescing/waiting on previous non-ordering transaction to increase parallelization and reduce inefficiency based on serialization of transactions.
摘要翻译：这里描述了用于优化事务存储器系统中的静止的方法和装置。标识非排序事务，例如只读事务，不访问非事务数据的事务和写缓冲硬件事务。弱原子软件事务存储（STM）系统中的静止通过选择性应用静态来优化。因此，事务可以与依赖于静态/等待以前的非排序事务相关联，以增加并行化并基于事务的序列化降低效率。

6. 发明授权

US07567963B2 Thread synchronization with lock inflation methods and apparatus for managed run-time environments 失效
标题翻译：用于管理运行时环境的锁定充电方法和设备的线程同步
公开(公告)号：US07567963B2
公开(公告)日：2009-07-28
申请号：US10878210
申请日：2004-06-28
申请人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Brian Murphy
发明人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Brian Murphy
IPC分类号： G06F7/00
CPC分类号： G06F9/528 , G06F9/3004 , G06F9/30087 , G06F9/52 , Y10S707/99938
摘要： Thread synchronization with lock inflation methods and apparatus for managed run-time environments are disclosed. An example method disclosed herein comprises determining a locking operation to perform on a lock corresponding to the object, performing an optimistically balanced synchronization of the lock if the locking operation is not unbalanced, and modifying a lock shape of the lock if the locking operation is unbalanced.
摘要翻译：公开了具有用于管理的运行时环境的锁定充气方法和装置的线程同步。本文公开的示例性方法包括确定对与对象相对应的锁执行的锁定操作，如果锁定操作不是不平衡则执行锁的乐观平衡的同步，以及如果锁定操作不平衡则修改锁的形状。

7. 发明授权

US10210018B2 Optimizing quiescence in a software transactional memory (STM) system 有权
公开(公告)号：US10210018B2
公开(公告)日：2019-02-19
申请号：US12344144
申请日：2008-12-24
申请人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon
发明人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai , Vijay Menon
IPC分类号： G06F9/46
摘要： A method and apparatus for optimizing quiescence in a transactional memory system is herein described. Non-ordering transactions, such as read-only transactions, transactions that do not access non-transactional data, and write-buffering hardware transactions, are identified. Quiescence in weak atomicity software transactional memory (STM) systems is optimized through selective application of quiescence. As a result, transactions may be decoupled from dependency on quiescing/waiting on previous non-ordering transaction to increase parallelization and reduce inefficiency based on serialization of transactions.

8. 发明申请

US20180308201A1 COMPUTE OPTIMIZATION MECHANISM 审中-公开
公开(公告)号：US20180308201A1
公开(公告)日：2018-10-25
申请号：US15494905
申请日：2017-04-24
申请人： Abhishek R. Appu , Altug Koker , Linda L. Hurd , Dukhwan Kim , Mike B. Macpherson , John C. Weast , Feng Chen , Farshad Akhbari , Narayan Srinivasa , Nadathur Rajagopalan Satish , Joydeep Ray , Ping T. Tang , Michael S. Strickland , Xiaoming Chen , Anbang Yao , Tatiana Shpeisman
发明人： Abhishek R. Appu , Altug Koker , Linda L. Hurd , Dukhwan Kim , Mike B. Macpherson , John C. Weast , Feng Chen , Farshad Akhbari , Narayan Srinivasa , Nadathur Rajagopalan Satish , Joydeep Ray , Ping T. Tang , Michael S. Strickland , Xiaoming Chen , Anbang Yao , Tatiana Shpeisman
IPC分类号： G06T1/20
CPC分类号： G06T1/20 , G06F9/3001 , G06F9/3017 , G06F9/3851 , G06F9/3887 , G06F9/3895 , G06F9/46 , G06N3/063 , G06T15/005 , G06T15/04 , G09G5/363
摘要： An apparatus to facilitate compute optimization is disclosed. The apparatus includes sorting logic to sort processing threads into thread groups based on bit depth of floating point thread operations.

9. 发明申请

US20180129970A1 FORWARD-LOOKING MACHINE LEARNING FOR DECISION SYSTEMS 审中-公开
公开(公告)号：US20180129970A1
公开(公告)日：2018-05-10
申请号：US15348678
申请日：2016-11-10
申请人： Justin E. Gottschlich , Thijs Metsch , Leonard Truong , Tatiana Shpeisman , Sara S. Baghsorkhi
发明人： Justin E. Gottschlich , Thijs Metsch , Leonard Truong , Tatiana Shpeisman , Sara S. Baghsorkhi
IPC分类号： G06N99/00 , G06N5/04
CPC分类号： G06N3/0427 , G06N3/0454 , G06N3/08
摘要： A machine-learning decision system includes an online decision system and an offline decision system. The online decision system produces a first time slice-specific decision output corresponding to a first time slice based on one or more situational inputs received in the first time slice. The offline decision system produces a second Lime slice-specific decision output corresponding to the first time slice based on one or more situational inputs received in the first time slice and in a plurality of subsequent time slices occurring after the first time slice. The system further includes an online training system that conducts negative-reinforcement training of the online decision system in response to a nonconvergence between the first and the second time slice-specific decision outputs.

10. 发明授权

US09274855B2 Optimization for safe elimination of weak atomicity overhead 有权
标题翻译：安全消除弱原子性开销的优化
公开(公告)号：US09274855B2
公开(公告)日：2016-03-01
申请号：US12344147
申请日：2008-12-24
申请人： Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Vijay Menon
发明人： Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Vijay Menon
IPC分类号： G06F9/44 , G06F13/00 , G06F9/52 , G06F9/46 , G06F12/08 , G06F12/10
CPC分类号： G06F9/52 , G06F9/466 , G06F12/0897 , G06F12/1027
摘要： A method and apparatus for optimizing weak atomicity overhead is herein described. A state table is maintained either during static or dynamic compilation of code to track data non-transactionally accessed. Within execution of a transaction, such as at transactional memory accesses or within a commit function, it is determined if data associated with memory access within the transaction is to be conflictingly accessed outside the transaction from the state table. If the data is not accessed outside the transaction, then the transaction potentially commits without weak atomicity safety mechanisms, such as privatization. Furthermore, even if data is accessed outside the transaction, optimized safety mechanisms may be performed to ensure isolation between the potentially conflicting accesses, while eliding the mechanisms for data not accessed outside the transaction.
摘要翻译：这里描述用于优化弱原子性开销的方法和装置。在静态或动态编译代码期间维护状态表以跟踪非事务性访问的数据。在事务的执行中，例如在事务存储器访问或提交功能中，确定与事务内的存储器访问相关联的数据是否将在事务之外从状态表冲突地访问。如果在事务之外没有访问数据，则交易可能没有弱原子安全机制，如私有化。此外，即使在事务之外访问数据，也可以执行优化的安全机制，以确保在潜在的冲突访问之间的隔离，同时查看在事务之外未被访问的数据的机制。

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