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1. 发明申请

US20100161942A1 INFORMATION HANDLING SYSTEM INCLUDING A PROCESSOR WITH A BIFURCATED ISSUE QUEUE 失效
标题翻译：信息处理系统，其中包括一个处理器与分歧问题队列
公开(公告)号：US20100161942A1
公开(公告)日：2010-06-24
申请号：US12342045
申请日：2008-12-22
申请人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
发明人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
IPC分类号： G06F9/30
CPC分类号： G06F9/30043 , G06F9/3838
摘要： An information handling system includes a processor with a bifurcated unified issue queue that may perform unified issue queue VSU store instruction dependency operations. The bifurcated unified issue queue BUIQ maintains VSU store instructions in the form of internal operations data. The BUIQ includes a unified issue queue UIQ 0 and a unified issue queue UIQ 1. The BUIQ may manage a particular VSU store instruction from one UIQ to determine data dependencies and employ the other UIQ to determine address dependencies of that particular VSU store instruction. The UIQs employ a dependency matrix including a dependency array. The dependency array data maintains both data and address dependency information. The particular VSU store instruction issues to execution units such as VSUs for data dependency information and load store units (LSUs) for address dependency information. A particular VSU store instruction may execute to provide data dependency information independent of address dependency information.
摘要翻译：信息处理系统包括具有分叉的统一发布队列的处理器，其可以执行统一的发布队列VSU存储指令依赖性操作。分叉统一问题队列BUIQ以内部操作数据的形式维护VSU存储指令。 BUIQ包括统一的问题队列UIQ 0和统一的问题队列UIQ 1. BUIQ可以管理来自一个UIQ的特定VSU存储指令以确定数据依赖性并且使用另一个UIQ来确定该特定VSU存储指令的地址依赖性。 UIQ采用包括依赖性数组的依赖矩阵。依赖性阵列数据维护数据和地址相关性信息。特定的VSU存储指令发送到执行单元，例如用于数据依赖性信息的VSU和用于地址依赖性信息的加载存储单元（LSU）。可以执行特定的VSU存储指令以提供独立于地址依赖性信息的数据依赖性信息。

2. 发明授权

US07401262B2 Method and apparatus for a low-level console 有权
标题翻译：低级控制台的方法和装置
公开(公告)号：US07401262B2
公开(公告)日：2008-07-15
申请号：US10912504
申请日：2004-08-05
申请人： Anton Blanchard , Milton Devon Miller, II , Todd Alan Venton
发明人： Anton Blanchard , Milton Devon Miller, II , Todd Alan Venton
IPC分类号： G06F11/00
CPC分类号： G06F11/2294
摘要： A method, apparatus and computer instructions for interfacing with an operating system on a data processing system. Registers in a processor are allocated for use in providing a low-level console interface to a remote data processing system, wherein the registers are accessed by the remote data processing system using the low-level console interface. Data is exchanged with the remote data processing system through the low-level console interface. Also, multiple channels may be multiplexed through this low-level console interface.
摘要翻译：一种用于与数据处理系统上的操作系统进行接口的方法，装置和计算机指令。分配处理器中的寄存器用于向远程数据处理系统提供低级控制台接口，其中由远程数据处理系统使用低级控制台接口访问寄存器。数据通过低级控制台界面与远程数据处理系统交换。此外，可以通过此低级控制台界面复用多个通道。

3. 发明申请

US20080109687A1 METHOD AND APPARATUS FOR CORRECTING DATA ERRORS 失效
标题翻译：用于校正数据错误的方法和装置
公开(公告)号：US20080109687A1
公开(公告)日：2008-05-08
申请号：US11552786
申请日：2006-10-25
申请人： Christopher Michael Abernathy , Todd Alan Venton
发明人： Christopher Michael Abernathy , Todd Alan Venton
IPC分类号： G06F11/00
CPC分类号： G06F11/1008
摘要： The illustrative embodiments provide a computer implemented method and an apparatus for correcting data errors. An error correction unit receives data from a register. Responsive to receiving the data from the register, the error correction unit determines whether an error is present in the data. Responsive to identifying the error in the data, the error correction unit corrects the data to form corrected data. Responsive to correcting the error in the data, the error correction unit notifies a counter in the register to update.
摘要翻译：说明性实施例提供了一种用于校正数据错误的计算机实现的方法和装置。误差校正单元从寄存器接收数据。响应于从寄存器接收数据，纠错单元确定数据中是否存在错误。响应于识别数据中的错误，纠错单元校正数据以形成校正数据。响应于纠正数据中的错误，纠错单元通知寄存器中的计数器进行更新。

4. 发明授权

US08296739B2 Testing soft error rate of an application program 失效
标题翻译：测试应用程序的软错误率
公开(公告)号：US08296739B2
公开(公告)日：2012-10-23
申请号：US12059897
申请日：2008-03-31
申请人： Ronald Nick Kalla , Jeffrey William Kellington , Naoko Pia Sanda , Todd Alan Venton
发明人： Ronald Nick Kalla , Jeffrey William Kellington , Naoko Pia Sanda , Todd Alan Venton
IPC分类号： G06F9/44
CPC分类号： G06F11/3668
摘要： Techniques are provided for determining consequences of an injected fault on a system running a given application program or operating system, in order to measure the software impact of a hardware soft error on the application program/operating system. The application program software is emulated instruction-by-instruction, where source operands are randomly modified before an instruction is executed, and destination operands are randomly modified after an instruction is executed, in order to mimic hardware soft errors. In addition, a program counter is randomly modified after execution of a branch instruction. The resulting consequences of such modifications are monitored such that a fault of an instruction being executed is modeled in order to determine a soft error rate (SER) for a software application program or operating system.
摘要翻译：提供了用于确定注入的故障对运行给定应用程序或操作系统的系统的后果的技术，以便测量硬件软错误对应用程序/操作系统的软件影响。应用程序软件被仿真逐个指令，其中在执行指令之前对源操作数进行随机修改，并且在执行指令之后随机修改目的地操作数，以模拟硬件软错误。此外，在执行分支指令之后，程序计数器被随机地修改。监视这种修改产生的后果，以便对所执行的指令的故障进行建模，以确定软件应用程序或操作系统的软错误率（SER）。

5. 发明授权

US07272759B2 Method and apparatus for system monitoring with reduced function cores 有权
标题翻译：减少功能核心的系统监控方法和装置
公开(公告)号：US07272759B2
公开(公告)日：2007-09-18
申请号：US10912506
申请日：2004-08-05
申请人： Anton Blanchard , Milton Devon Miller, II , Todd Alan Venton
发明人： Anton Blanchard , Milton Devon Miller, II , Todd Alan Venton
IPC分类号： G01R31/28
CPC分类号： G06F11/3041 , G06F11/3024 , G06F11/3058
摘要： A method, apparatus, and computer instructions for monitoring a device in a data processing system. A register associated with the device is accessed from a reduced function processor core through a connection between the register for the device and the reduced function processor core. The device is monitored using the value of the register.
摘要翻译：一种用于监视数据处理系统中的设备的方法，装置和计算机指令。通过设备寄存器和还原功能处理器核心之间的连接，从减少功能的处理器核心访问与设备相关联的寄存器。使用寄存器的值监视器件。

6. 发明授权

US08108655B2 Selecting fixed-point instructions to issue on load-store unit 失效
标题翻译：选择在加载存储单元上发出的定点指令
公开(公告)号：US08108655B2
公开(公告)日：2012-01-31
申请号：US12410073
申请日：2009-03-24
申请人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
发明人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
IPC分类号： G06F9/302 , G06F9/312
CPC分类号： G06F9/3836 , G06F9/3838 , G06F9/3885
摘要： Issue logic identifies a simple fixed point instruction, included in a unified payload, which is ready to issue. The simple fixed point instruction is a type of instruction that is executable by both a fixed point execution unit and a load-store execution unit. In turn, the issue logic determines that the unified payload does not include a load-store instruction that is ready to issue. As a result, the issue logic issues the simple fixed point instruction to the load-store execution unit in response to determining that the simple fixed point instruction is ready to issue and determining that the unified payload does not include a load-store instruction that is ready to issue.
摘要翻译：问题逻辑标识一个简单的固定点指令，包含在一个准备发布的统一有效载荷中。简单的固定点指令是一种可由固定点执行单元和加载存储执行单元执行的指令。反过来，问题逻辑确定统一有效载荷不包括准备发布的加载存储指令。结果，响应于确定简单的固定点指令准备发出并且确定统一的有效载荷不包括加载存储指令，问题逻辑将简单的固定点指令发布到加载存储执行单元准备发行。

7. 发明授权

US08020072B2 Method and apparatus for correcting data errors 失效
标题翻译：用于校正数据错误的方法和装置
公开(公告)号：US08020072B2
公开(公告)日：2011-09-13
申请号：US11552786
申请日：2006-10-25
申请人： Christopher Michael Abernathy , Todd Alan Venton
发明人： Christopher Michael Abernathy , Todd Alan Venton
IPC分类号： H03M13/00
CPC分类号： G06F11/1008
摘要： The illustrative embodiments provide a computer implemented method and an apparatus for correcting data errors. An error correction unit receives data from a register. Responsive to receiving the data from the register, the error correction unit determines whether an error is present in the data. Responsive to identifying the error in the data, the error correction unit corrects the data to form corrected data. Responsive to correcting the error in the data, the error correction unit notifies a counter in the register to update.
摘要翻译：说明性实施例提供了一种用于校正数据错误的计算机实现的方法和装置。误差校正单元从寄存器接收数据。响应于从寄存器接收数据，纠错单元确定数据中是否存在错误。响应于识别数据中的错误，纠错单元校正数据以形成校正数据。响应于纠正数据中的错误，纠错单元通知寄存器中的计数器进行更新。

8. 发明授权

US07823028B2 Low-level console interface 有权
标题翻译：低级控制台界面
公开(公告)号：US07823028B2
公开(公告)日：2010-10-26
申请号：US11969712
申请日：2008-01-04
申请人： Anton Blanchard , Milton Devon Miller, II , Todd Alan Venton
发明人： Anton Blanchard , Milton Devon Miller, II , Todd Alan Venton
IPC分类号： G06F11/00
CPC分类号： G06F11/2294
摘要： An apparatus and computer instructions for interfacing with an operating system on a data processing system. Registers in a processor are allocated for use in providing a low-level console interface to a remote data processing system, wherein the registers are accessed by the remote data processing system using the low-level console interface. Data is exchanged with the remote data processing system through the low-level console interface. Also, multiple channels may be multiplexed through this low-level console interface.
摘要翻译：一种用于与数据处理系统上的操作系统进行接口的装置和计算机指令。分配处理器中的寄存器用于向远程数据处理系统提供低级控制台接口，其中由远程数据处理系统使用低级控制台接口访问寄存器。数据通过低级控制台界面与远程数据处理系统交换。此外，可以通过此低级控制台界面复用多个通道。

9. 发明申请

US20100250901A1 Selecting Fixed-Point Instructions to Issue on Load-Store Unit 失效
标题翻译：选择加载存储单元发出的定点指令
公开(公告)号：US20100250901A1
公开(公告)日：2010-09-30
申请号：US12410073
申请日：2009-03-24
申请人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
发明人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
IPC分类号： G06F9/30
CPC分类号： G06F9/3836 , G06F9/3838 , G06F9/3885
摘要： Issue logic identifies a simple fixed point instruction, included in a unified payload, which is ready to issue. The simple fixed point instruction is a type of instruction that is executable by both a fixed point execution unit and a load-store execution unit. In turn, the issue logic determines that the unified payload does not include a load-store instruction that is ready to issue. As a result, the issue logic issues the simple fixed point instruction to the load-store execution unit in response to determining that the simple fixed point instruction is ready to issue and determining that the unified payload does not include a load-store instruction that is ready to issue.
摘要翻译：问题逻辑标识一个简单的固定点指令，包含在一个准备发布的统一有效载荷中。简单的固定点指令是一种可由固定点执行单元和加载存储执行单元执行的指令。反过来，问题逻辑确定统一有效载荷不包括准备发布的加载存储指令。结果，响应于确定简单的固定点指令准备发出并且确定统一的有效载荷不包括加载存储指令，问题逻辑将简单的固定点指令发布到加载存储执行单元准备发行。

10. 发明授权

US08103852B2 Information handling system including a processor with a bifurcated issue queue 失效
标题翻译：信息处理系统包括具有分叉问题队列的处理器
公开(公告)号：US08103852B2
公开(公告)日：2012-01-24
申请号：US12342045
申请日：2008-12-22
申请人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
发明人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
IPC分类号： G06F15/76
CPC分类号： G06F9/30043 , G06F9/3838
摘要： An information handling system includes a processor with a bifurcated unified issue queue that may perform unified issue queue VSU store instruction dependency operations. The bifurcated unified issue queue BUIQ maintains VSU store instructions in the form of internal operations data. The BUIQ includes a unified issue queue UIQ 0 and a unified issue queue UIQ 1. The BUIQ may manage a particular VSU store instruction from one UIQ to determine data dependencies and employ the other UIQ to determine address dependencies of that particular VSU store instruction. The UIQs employ a dependency matrix including a dependency array. The dependency array data maintains both data and address dependency information. The particular VSU store instruction issues to execution units such as VSUs for data dependency information and load store units (LSUs) for address dependency information. A particular VSU store instruction may execute to provide data dependency information independent of address dependency information.
摘要翻译：信息处理系统包括具有分叉的统一发布队列的处理器，其可以执行统一的发布队列VSU存储指令依赖性操作。分叉统一问题队列BUIQ以内部操作数据的形式维护VSU存储指令。 BUIQ包括统一的问题队列UIQ 0和统一的问题队列UIQ 1. BUIQ可以管理来自一个UIQ的特定VSU存储指令以确定数据依赖性并且使用另一个UIQ来确定该特定VSU存储指令的地址依赖性。 UIQ采用包括依赖性数组的依赖矩阵。依赖性阵列数据维护数据和地址相关性信息。特定的VSU存储指令发送到执行单元，例如用于数据依赖性信息的VSU和用于地址依赖性信息的加载存储单元（LSU）。可以执行特定的VSU存储指令以提供独立于地址依赖性信息的数据依赖性信息。

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