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1. 发明授权

US08103852B2 Information handling system including a processor with a bifurcated issue queue 失效
标题翻译：信息处理系统包括具有分叉问题队列的处理器
公开(公告)号：US08103852B2
公开(公告)日：2012-01-24
申请号：US12342045
申请日：2008-12-22
申请人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
发明人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
IPC分类号： G06F15/76
CPC分类号： G06F9/30043 , G06F9/3838
摘要： An information handling system includes a processor with a bifurcated unified issue queue that may perform unified issue queue VSU store instruction dependency operations. The bifurcated unified issue queue BUIQ maintains VSU store instructions in the form of internal operations data. The BUIQ includes a unified issue queue UIQ 0 and a unified issue queue UIQ 1. The BUIQ may manage a particular VSU store instruction from one UIQ to determine data dependencies and employ the other UIQ to determine address dependencies of that particular VSU store instruction. The UIQs employ a dependency matrix including a dependency array. The dependency array data maintains both data and address dependency information. The particular VSU store instruction issues to execution units such as VSUs for data dependency information and load store units (LSUs) for address dependency information. A particular VSU store instruction may execute to provide data dependency information independent of address dependency information.
摘要翻译：信息处理系统包括具有分叉的统一发布队列的处理器，其可以执行统一的发布队列VSU存储指令依赖性操作。分叉统一问题队列BUIQ以内部操作数据的形式维护VSU存储指令。 BUIQ包括统一的问题队列UIQ 0和统一的问题队列UIQ 1. BUIQ可以管理来自一个UIQ的特定VSU存储指令以确定数据依赖性并且使用另一个UIQ来确定该特定VSU存储指令的地址依赖性。 UIQ采用包括依赖性数组的依赖矩阵。依赖性阵列数据维护数据和地址相关性信息。特定的VSU存储指令发送到执行单元，例如用于数据依赖性信息的VSU和用于地址依赖性信息的加载存储单元（LSU）。可以执行特定的VSU存储指令以提供独立于地址依赖性信息的数据依赖性信息。

2. 发明申请

US20100161942A1 INFORMATION HANDLING SYSTEM INCLUDING A PROCESSOR WITH A BIFURCATED ISSUE QUEUE 失效
标题翻译：信息处理系统，其中包括一个处理器与分歧问题队列
公开(公告)号：US20100161942A1
公开(公告)日：2010-06-24
申请号：US12342045
申请日：2008-12-22
申请人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
发明人： James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Todd Alan Venton
IPC分类号： G06F9/30
CPC分类号： G06F9/30043 , G06F9/3838
摘要： An information handling system includes a processor with a bifurcated unified issue queue that may perform unified issue queue VSU store instruction dependency operations. The bifurcated unified issue queue BUIQ maintains VSU store instructions in the form of internal operations data. The BUIQ includes a unified issue queue UIQ 0 and a unified issue queue UIQ 1. The BUIQ may manage a particular VSU store instruction from one UIQ to determine data dependencies and employ the other UIQ to determine address dependencies of that particular VSU store instruction. The UIQs employ a dependency matrix including a dependency array. The dependency array data maintains both data and address dependency information. The particular VSU store instruction issues to execution units such as VSUs for data dependency information and load store units (LSUs) for address dependency information. A particular VSU store instruction may execute to provide data dependency information independent of address dependency information.
摘要翻译：信息处理系统包括具有分叉的统一发布队列的处理器，其可以执行统一的发布队列VSU存储指令依赖性操作。分叉统一问题队列BUIQ以内部操作数据的形式维护VSU存储指令。 BUIQ包括统一的问题队列UIQ 0和统一的问题队列UIQ 1. BUIQ可以管理来自一个UIQ的特定VSU存储指令以确定数据依赖性并且使用另一个UIQ来确定该特定VSU存储指令的地址依赖性。 UIQ采用包括依赖性数组的依赖矩阵。依赖性阵列数据维护数据和地址相关性信息。特定的VSU存储指令发送到执行单元，例如用于数据依赖性信息的VSU和用于地址依赖性信息的加载存储单元（LSU）。可以执行特定的VSU存储指令以提供独立于地址依赖性信息的数据依赖性信息。

3. 发明授权

US08108655B2 Selecting fixed-point instructions to issue on load-store unit 失效
标题翻译：选择在加载存储单元上发出的定点指令
公开(公告)号：US08108655B2
公开(公告)日：2012-01-31
申请号：US12410073
申请日：2009-03-24
申请人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
发明人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
IPC分类号： G06F9/302 , G06F9/312
CPC分类号： G06F9/3836 , G06F9/3838 , G06F9/3885
摘要： Issue logic identifies a simple fixed point instruction, included in a unified payload, which is ready to issue. The simple fixed point instruction is a type of instruction that is executable by both a fixed point execution unit and a load-store execution unit. In turn, the issue logic determines that the unified payload does not include a load-store instruction that is ready to issue. As a result, the issue logic issues the simple fixed point instruction to the load-store execution unit in response to determining that the simple fixed point instruction is ready to issue and determining that the unified payload does not include a load-store instruction that is ready to issue.
摘要翻译：问题逻辑标识一个简单的固定点指令，包含在一个准备发布的统一有效载荷中。简单的固定点指令是一种可由固定点执行单元和加载存储执行单元执行的指令。反过来，问题逻辑确定统一有效载荷不包括准备发布的加载存储指令。结果，响应于确定简单的固定点指令准备发出并且确定统一的有效载荷不包括加载存储指令，问题逻辑将简单的固定点指令发布到加载存储执行单元准备发行。

4. 发明申请

US20100250901A1 Selecting Fixed-Point Instructions to Issue on Load-Store Unit 失效
标题翻译：选择加载存储单元发出的定点指令
公开(公告)号：US20100250901A1
公开(公告)日：2010-09-30
申请号：US12410073
申请日：2009-03-24
申请人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
发明人： Christopher Michael Abernathy , James Wilson Bishop , Mary Douglass Brown , William Elton Burky , Robert Allen Cordes , Hung Qui Le , Dung Quoc Nguyen , Todd Alan Venton
IPC分类号： G06F9/30
CPC分类号： G06F9/3836 , G06F9/3838 , G06F9/3885
摘要： Issue logic identifies a simple fixed point instruction, included in a unified payload, which is ready to issue. The simple fixed point instruction is a type of instruction that is executable by both a fixed point execution unit and a load-store execution unit. In turn, the issue logic determines that the unified payload does not include a load-store instruction that is ready to issue. As a result, the issue logic issues the simple fixed point instruction to the load-store execution unit in response to determining that the simple fixed point instruction is ready to issue and determining that the unified payload does not include a load-store instruction that is ready to issue.
摘要翻译：问题逻辑标识一个简单的固定点指令，包含在一个准备发布的统一有效载荷中。简单的固定点指令是一种可由固定点执行单元和加载存储执行单元执行的指令。反过来，问题逻辑确定统一有效载荷不包括准备发布的加载存储指令。结果，响应于确定简单的固定点指令准备发出并且确定统一的有效载荷不包括加载存储指令，问题逻辑将简单的固定点指令发布到加载存储执行单元准备发行。

5. 发明申请

US20100250900A1 DEPENDENCY TRACKING FOR ENABLING SUCCESSIVE PROCESSOR INSTRUCTIONS TO ISSUE 有权
标题翻译：用于启用后续处理器指令的依赖跟踪
公开(公告)号：US20100250900A1
公开(公告)日：2010-09-30
申请号：US12409934
申请日：2009-03-24
申请人： Mary Douglass Brown , William Elton Burky , Dung Quoc Nguyen , Balaram Sinharoy
发明人： Mary Douglass Brown , William Elton Burky , Dung Quoc Nguyen , Balaram Sinharoy
IPC分类号： G06F9/30
CPC分类号： G06F9/3814 , G06F9/3838
摘要： An information handling system includes a processor with an issue unit (IU) that may perform instruction dependency tracking for successive instruction issue operations. The IU maintains non-shifting issue queue (NSIQ) and shifting issue queue (SIQ) instructions along with relative instruction to instruction dependency information. A mapper maps queue position data for instructions that dispatch to issue queue locations within the IU. The IU may test an issuing producer instruction against consumer instructions in the IU for queue position (QPOS) and register tag (RTAG) matches. A matching consumer instruction may issue in a successive manner in the case of a queue position match or in a next processor cycle in the case of a register tag match.
摘要翻译：信息处理系统包括具有发布单元（IU）的处理器，该单元可对连续指令发布操作执行指令依赖性跟踪。 IU保持非移位问题队列（NSIQ）和移位发送队列（SIQ）指令以及与指令依赖信息的相关指令。映射器映射队列位置数据，用于发送在IU内发出队列位置的指令。 IU可以根据IU中的消费者指令测试发出生产者指令的队列位置（QPOS）和注册标签（RTAG）匹配。在队列位置匹配的情况下，或者在注册标签匹配的情况下，在下一个处理器周期中，匹配的消费者指令可以以连续的方式发布。

6. 发明授权

US08086826B2 Dependency tracking for enabling successive processor instructions to issue 有权
标题翻译：用于启用连续处理器指令发布的依赖性跟踪
公开(公告)号：US08086826B2
公开(公告)日：2011-12-27
申请号：US12409934
申请日：2009-03-24
申请人： Mary Douglass Brown , William Elton Burky , Dung Quoc Nguyen , Balaram Sinharoy
发明人： Mary Douglass Brown , William Elton Burky , Dung Quoc Nguyen , Balaram Sinharoy
IPC分类号： G06F9/38 , G06F9/52
CPC分类号： G06F9/3814 , G06F9/3838
摘要： An information handling system includes a processor with an issue unit (IU) that may perform instruction dependency tracking for successive instruction issue operations. The IU maintains non-shifting issue queue (NSIQ) and shifting issue queue (SIQ) instructions along with relative instruction to instruction dependency information. A mapper maps queue position data for instructions that dispatch to issue queue locations within the IU. The IU may test an issuing producer instruction against consumer instructions in the IU for queue position (QPOS) and register tag (RTAG) matches. A matching consumer instruction may issue in a successive manner in the case of a queue position match or in a next processor cycle in the case of a register tag match.
摘要翻译：信息处理系统包括具有发布单元（IU）的处理器，该单元可对连续指令发布操作执行指令依赖性跟踪。 IU保持非移位问题队列（NSIQ）和移位发送队列（SIQ）指令以及与指令依赖信息的相关指令。映射器映射队列位置数据，用于发送在IU内发出队列位置的指令。 IU可以根据IU中的消费者指令测试发出生产者指令的队列位置（QPOS）和注册标签（RTAG）匹配。在队列位置匹配的情况下，或者在注册标签匹配的情况下，在下一个处理器周期中，匹配的消费者指令可以以连续的方式发布。

7. 发明授权

US08489863B2 Processor including age tracking of issue queue instructions 有权
标题翻译：处理器包括发布队列指令的年龄跟踪
公开(公告)号：US08489863B2
公开(公告)日：2013-07-16
申请号：US13451055
申请日：2012-04-19
申请人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
发明人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
IPC分类号： G06F15/00 , G06F9/30 , G06F9/40
CPC分类号： G06F9/3855
摘要： An information handling system includes a processor with an instruction issue queue (IQ) that may perform age tracking operations. The issue queue IQ maintains or stores instructions that may issue out-of-order in an internal data store (IDS). The IDS organizes instructions in a queue position (QPOS) addressing arrangement. An age matrix of the IQ maintains a record of relative instruction aging for those instructions within the IDS. The age matrix updates latches or other memory cell data to reflect the changes in IDS instruction ages during a dispatch operation into the IQ. During dispatch of one or more instructions, the age matrix may update only those latches that require data change to reflect changing IDS instruction ages. The age matrix employs row and column data and clock controls to individually update those latches requiring update.
摘要翻译：信息处理系统包括具有可执行年龄跟踪操作的指令发布队列（IQ）的处理器。问题队列IQ维护或存储可能在内部数据存储（IDS）中发出无序的指令。 IDS组织了队列位置（QPOS）寻址布置中的指令。 IQ的年龄矩阵维护IDS内的这些指令的相对指令老化记录。年龄矩阵更新锁存器或其他存储单元数据，以反映在IQ调度操作期间IDS指令年龄的变化。在发送一个或多个指令期间，年龄矩阵可以仅更新需要数据改变的锁存器以反映改变的IDS指令年龄。年龄矩阵采用行和列数据和时钟控制来单独更新需要更新的锁存器。

8. 发明申请

US20120260069A1 Processor Including Age Tracking of Issue Queue Instructions 有权
标题翻译：包括问题队列说明的年龄跟踪的处理器
公开(公告)号：US20120260069A1
公开(公告)日：2012-10-11
申请号：US13451055
申请日：2012-04-19
申请人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
发明人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
IPC分类号： G06F9/30
CPC分类号： G06F9/3855
摘要： An information handling system includes a processor with an instruction issue queue (IQ) that may perform age tracking operations. The issue queue IQ maintains or stores instructions that may issue out-of-order in an internal data store (IDS). The IDS organizes instructions in a queue position (QPOS) addressing arrangement. An age matrix of the IQ maintains a record of relative instruction aging for those instructions within the IDS. The age matrix updates latches or other memory cell data to reflect the changes in IDS instruction ages during a dispatch operation into the IQ. During dispatch of one or more instructions, the age matrix may update only those latches that require data change to reflect changing IDS instruction ages. The age matrix employs row and column data and clock controls to individually update those latches requiring update.
摘要翻译：信息处理系统包括具有可执行年龄跟踪操作的指令发布队列（IQ）的处理器。问题队列IQ维护或存储可能在内部数据存储（IDS）中发出无序的指令。 IDS组织了队列位置（QPOS）寻址布置中的指令。 IQ的年龄矩阵维护IDS内的这些指令的相对指令老化记录。年龄矩阵更新锁存器或其他存储单元数据，以反映在IQ调度操作期间IDS指令年龄的变化。在发送一个或多个指令期间，年龄矩阵可以仅更新需要数据改变的锁存器以反映改变的IDS指令年龄。年龄矩阵采用行和列数据和时钟控制来单独更新需要更新的锁存器。

9. 发明授权

US08380964B2 Processor including age tracking of issue queue instructions 有权
标题翻译：处理器包括发布队列指令的年龄跟踪
公开(公告)号：US08380964B2
公开(公告)日：2013-02-19
申请号：US12417878
申请日：2009-04-03
申请人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
发明人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
IPC分类号： G06F15/00 , G06F9/30 , G06F9/40
CPC分类号： G06F9/3855
摘要： An information handling system includes a processor with an instruction issue queue (IQ) that may perform age tracking operations. The issue queue IQ maintains or stores instructions that may issue out-of-order in an internal data store IDS. The IDS organizes instructions in a queue position (QPOS) addressing arrangement. An age matrix of the IQ maintains a record of relative instruction aging for those instructions within the IDS. The age matrix updates latches or other memory cell data to reflect the changes in IDS instruction ages during a dispatch operation into the IQ. During dispatch of one or more instructions, the age matrix may update only those latches that require data change to reflect changing IDS instruction ages. The age matrix employs row and column data and clock controls to individually update those latches requiring update. The issue queue may selectively clock a row and a column of cells of the age matrix that correspond to a dispatched instruction's queue position while leaving other cells unclocked to conserve power.
摘要翻译：信息处理系统包括具有可执行年龄跟踪操作的指令发布队列（IQ）的处理器。问题队列IQ维护或存储可能在内部数据存储IDS中发出无序的指令。 IDS组织了队列位置（QPOS）寻址布置中的指令。 IQ的年龄矩阵维护IDS内的这些指令的相对指令老化记录。年龄矩阵更新锁存器或其他存储单元数据，以反映在IQ调度操作期间IDS指令年龄的变化。在发送一个或多个指令期间，年龄矩阵可以仅更新需要数据改变的锁存器以反映改变的IDS指令年龄。年龄矩阵采用行和列数据和时钟控制来单独更新需要更新的锁存器。问题队列可以选择性地对与分派指令的队列位置相对应的年龄矩阵的一行和一列单元进行计时，同时使其他单元不被锁定以节省功率。

10. 发明申请

US20110185159A1 PROCESSOR INCLUDING AGE TRACKING OF ISSUE QUEUE INSTRUCTIONS 有权
标题翻译：处理器包括年龄跟踪问题的指令
公开(公告)号：US20110185159A1
公开(公告)日：2011-07-28
申请号：US12417878
申请日：2009-04-03
申请人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
发明人： James Wilson Bishop , Mary Douglass Brown , Jeffrey Carl Brownscheidle , Robert Allen Cordes , Maureen Anne Delaney , Jafar Nahidi , Dung Quoc Nguyen , Joel Abraham Silberman
IPC分类号： G06F9/312
CPC分类号： G06F9/3855
摘要： An information handling system includes a processor with an instruction issue queue (IQ) that may perform age tracking operations. The issue queue IQ maintains or stores instructions that may issue out-of-order in an internal data store IDS. The IDS organizes instructions in a queue position (QPOS) addressing arrangement. An age matrix of the IQ maintains a record of relative instruction aging for those instructions within the IDS. The age matrix updates latches or other memory cell data to reflect the changes in IDS instruction ages during a dispatch operation into the IQ. During dispatch of one or more instructions, the age matrix may update only those latches that require data change to reflect changing IDS instruction ages. The age matrix employs row and column data and clock controls to individually update those latches requiring update. The issue queue may selectively clock a row and a column of cells of the age matrix that correspond to a dispatched instruction's queue position while leaving other cells unclocked to conserve power.
摘要翻译：信息处理系统包括具有可执行年龄跟踪操作的指令发布队列（IQ）的处理器。问题队列IQ维护或存储可能在内部数据存储IDS中发出无序的指令。 IDS组织了队列位置（QPOS）寻址布置中的指令。 IQ的年龄矩阵维护IDS内的这些指令的相对指令老化记录。年龄矩阵更新锁存器或其他存储单元数据，以反映在IQ调度操作期间IDS指令年龄的变化。在发送一个或多个指令期间，年龄矩阵可以仅更新需要数据改变的锁存器以反映改变的IDS指令年龄。年龄矩阵采用行和列数据和时钟控制来单独更新需要更新的锁存器。问题队列可以选择性地对与分派指令的队列位置相对应的年龄矩阵的一行和一列单元进行计时，同时使其他单元不被锁定以节省功率。

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