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1. 发明授权

US09176515B2 Accelerator pedal reaction force control device 有权
标题翻译：加速踏板反作用力控制装置
公开(公告)号：US09176515B2
公开(公告)日：2015-11-03
申请号：US14130675
申请日：2012-06-13
申请人： Kohei Maruyama , Naoto Sen , Hideto Nebuya , Toshihiko Sato , Takayuki Yoshimura , Go Suzaki , Hirotaka Takiguchi , Masaru Kanda
发明人： Kohei Maruyama , Naoto Sen , Hideto Nebuya , Toshihiko Sato , Takayuki Yoshimura , Go Suzaki , Hirotaka Takiguchi , Masaru Kanda
IPC分类号： G06F7/70 , G05D1/00 , B60W10/04 , F16H59/48 , G05G1/40 , B60K26/02 , B60W50/16 , B60W30/14
CPC分类号： G05G1/40 , B60K26/021 , B60K2026/023 , B60W30/146 , B60W50/16 , Y10T74/20534
摘要： An accelerator pedal reaction force control device for controlling a depression reaction force of an accelerator pedal provided to a motor vehicle, the control device including: a reaction force actuator that provides the accelerator pedal with a depression reaction force; a target reaction force setting unit that sets a target depression reaction force; and a vehicle speed maintenance depression amount setting unit that sets an amount of depression of the accelerator pedal for maintaining a current vehicle speed as a vehicle speed maintenance depression amount, wherein, when a pedal depression amount exceeds the vehicle speed maintenance depression amount, the target reaction force setting unit performs a cruize assist whereby the target depression reaction force is set to a value of a cruize assist depression reaction force.
摘要翻译：一种加速踏板反作用力控制装置，用于控制设置在机动车辆上的加速器踏板的抑制反作用力，所述控制装置包括：反作用力致动器，其向加速踏板提供抑制反作用力; 目标反力设定单元，其设定目标抑制反作用力; 以及车速维持抑制量设定单元，其将用于维持当前车速的加速踏板的下压量设定为车速维持抑制量，其中，当踏板下压量超过车速维持抑制量时，所述目标反作用力设定单元进行冲击辅助，由此将目标抑制反作用力设定为冲击辅助抑制反作用力的值。

2. 发明授权

US08524534B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US08524534B2
公开(公告)日：2013-09-03
申请号：US13533779
申请日：2012-06-26
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/00
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

3. 发明申请

US20120264240A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120264240A1
公开(公告)日：2012-10-18
申请号：US13533779
申请日：2012-06-26
申请人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kirkuchi
发明人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kirkuchi
IPC分类号： H01L21/50 , H01L21/66
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

4. 发明授权

US08278147B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08278147B2
公开(公告)日：2012-10-02
申请号：US12565747
申请日：2009-09-23
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/00
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

5. 发明申请

US20110171780A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110171780A1
公开(公告)日：2011-07-14
申请号：US13053410
申请日：2011-03-22
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/50
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

6. 发明授权

US07859095B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07859095B2
公开(公告)日：2010-12-28
申请号：US12419357
申请日：2009-04-07
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L23/498
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

7. 发明申请

US20100015760A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100015760A1
公开(公告)日：2010-01-21
申请号：US12565747
申请日：2009-09-23
申请人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/50
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

8. 发明授权

US07627319B2 Mobile terminal 失效
标题翻译：移动终端
公开(公告)号：US07627319B2
公开(公告)日：2009-12-01
申请号：US10974609
申请日：2004-10-27
申请人： Toshihiko Sato
发明人： Toshihiko Sato
IPC分类号： H04W36/00 , H04W72/00 , H04B7/00 , H04W4/00
CPC分类号： H04W48/20 , H04W24/10 , H04W48/08 , Y02D70/164
摘要： The invention relates to a mobile terminal that intends to increase channel capacity and transmission quality properly within the confines of costs. The invention provides a mobile terminal including measuring section measuring a downstream transmission loss using a pilot signal transmitted from each radio base station; and selecting section comparing transmitting power of a pilot signal corresponding to the lowest measured transmission loss with transmitting power of pilot signals for each of which a difference between a corresponding measured transmission loss and a lowest measured transmission loss is smaller than a prescribed value, and selecting, as an origination destination or handover destination, a radio base station that transmits a pilot signal having a lowest transmitting power among those pilot signals, if a difference between the lowest measured transmission loss and a second lowest measured transmission loss is not larger than or equal to a prescribed value.
摘要翻译：本发明涉及一种旨在在成本范围内适当增加信道容量和传输质量的移动终端。本发明提供了一种移动终端，其包括使用从每个无线电基站发送的导频信号来测量下行传输损耗的测量部分; 以及选择部分，将与所测量的最低传输损耗相对应的导频信号的发射功率与导频信号的发射功率进行比较，其中相应测量的传输损耗和最低测量的传输损耗之间的差值小于规定值，并且选择作为起始目的地或切换目的地，如果最低测量传输损耗和第二低测量传输损耗之间的差异不大于或等于，则发送具有这些导频信号中具有最低发射功率的导频信号的无线电基站达到规定值。

9. 发明申请

US20060009211A1 Mobile terminal 失效
公开(公告)号：US20060009211A1
公开(公告)日：2006-01-12
申请号：US10974609
申请日：2004-10-27
申请人： Toshihiko Sato
发明人： Toshihiko Sato
IPC分类号： H04Q7/20
CPC分类号： H04W48/20 , H04W24/10 , H04W48/08 , Y02D70/164
摘要： The invention relates to a mobile terminal that intends to increase channel capacity and transmission quality properly within the confines of costs. The invention provides a mobile terminal including measuring section measuring a downstream transmission loss using a pilot signal transmitted from each radio base station; and selecting section comparing transmitting power of a pilot signal corresponding to the lowest measured transmission loss with transmitting power of pilot signals for each of which a difference between a corresponding measured transmission loss and a lowest measured transmission loss is smaller than a prescribed value, and selecting, as an origination destination or handover destination, a radio base station that transmits a pilot signal having a lowest transmitting power among those pilot signals, if a difference between the lowest measured transmission loss and a second lowest measured transmission loss is not larger than or equal to a prescribed value.

10. 发明授权

US06667854B2 Magnetic head having head element protected from electrostatic damage, and production method therefor 失效
公开(公告)号：US06667854B2
公开(公告)日：2003-12-23
申请号：US10369152
申请日：2003-02-18
申请人： Toshihiko Sato , Sadao Kawata , Masaharu Yokoyama
发明人： Toshihiko Sato , Sadao Kawata , Masaharu Yokoyama
IPC分类号： G11B560
CPC分类号： G11B5/4853 , G11B5/102 , G11B5/11 , G11B5/3163 , G11B5/40 , G11B5/48
摘要： In a magnetic head, a head element and bumps connected thereto are formed on one end face of a slider substrate, and an insulating film is formed on the other end face opposite from the one end face. Therefore, even when the slider is electrically charged, the other end face thereof does not contact bumps formed in another slider substrate, and charges of the slider substrate will not move into the bumps. This prevents the slider substrate from electrostatic damage.

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