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1. 发明授权

US06489181B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06489181B2
公开(公告)日：2002-12-03
申请号：US09897408
申请日：2001-07-03
申请人： Yoshiyuki Kado , Tsukio Funaki , Hiroshi Kikuchi , Ikuo Yoshida
发明人： Yoshiyuki Kado , Tsukio Funaki , Hiroshi Kikuchi , Ikuo Yoshida
IPC分类号： H01L2148
CPC分类号： H01L24/81 , H01L23/49838 , H01L23/528 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/73204 , H01L2224/81801 , H01L2224/83192 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/15311 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/351 , H01L2924/00
摘要： Silicon chip having narrow pitches of Au bumps are mounted on a module substrate in such a way that while taking into consideration a difference in coefficient of thermal expansion between the silicon chip and the module substrate, a total pitch of electrode pads of the silicon chip is made narrower than a total pitch of the Au bumps, thereby preventing misregistration between the Au bumps and the electrode pads in the course of heat treatment to ensure reliable contact therebetween.
摘要翻译：具有较小间距的Au凸块的硅芯片以这样的方式安装在模块基板上，同时考虑到硅芯片和模块基板之间的热膨胀系数的差异，硅芯片的电极焊盘的总间距为比Au凸块的总间距窄，从而防止在热处理过程中Au凸块和电极焊盘之间的不对准，以确保其间的可靠接触。

2. 发明申请

US20090189268A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090189268A1
公开(公告)日：2009-07-30
申请号：US12419357
申请日：2009-04-07
申请人： Yoshiyuki KADO , Takahiro Naito , Hikaru Ikegami , Takafumi Kikuchi , Toshihiko Sato
发明人： Yoshiyuki KADO , Takahiro Naito , Hikaru Ikegami , Takafumi Kikuchi , Toshihiko Sato
IPC分类号： H01L23/498
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

3. 发明授权

US07531441B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07531441B2
公开(公告)日：2009-05-12
申请号：US11399365
申请日：2006-04-07
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/44
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

4. 发明授权

US07042073B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US07042073B2
公开(公告)日：2006-05-09
申请号：US10479785
申请日：2002-04-05
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L23/02
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

5. 发明授权

US06787395B2 Method of manufacturing a multi-chip module 有权
标题翻译：制造多芯片模块的方法
公开(公告)号：US06787395B2
公开(公告)日：2004-09-07
申请号：US10269972
申请日：2002-10-15
申请人： Yoshiyuki Kado , Tsukio Funaki , Hiroshi Kikuchi , Ikuo Yoshida
发明人： Yoshiyuki Kado , Tsukio Funaki , Hiroshi Kikuchi , Ikuo Yoshida
IPC分类号： H01L2144
CPC分类号： H01L24/81 , H01L23/49838 , H01L23/528 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/73204 , H01L2224/81801 , H01L2224/83192 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/15311 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/351 , H01L2924/00
摘要： Silicon chip having narrow pitches of Au bumps are mounted on a module substrate in such a way that while taking into consideration a difference in coefficient of thermal expansion between the silicon chip and the module substrate, a total pitch of electrode pads of the silicon chip is made narrower than a total pitch of the Au bumps, thereby preventing misregistration between the Au bumps and the electrode pads in the course of heat treatment to ensure reliable contact therebetween.
摘要翻译：具有较小间距的Au凸块的硅芯片以这样的方式安装在模块基板上，同时考虑到硅芯片和模块基板之间的热膨胀系数的差异，硅芯片的电极焊盘的总间距为比Au凸块的总间距窄，从而防止在热处理过程中Au凸块和电极焊盘之间的不对准，以确保其间的可靠接触。

6. 发明授权

US06646350B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06646350B2
公开(公告)日：2003-11-11
申请号：US09922230
申请日：2001-08-03
申请人： Naotaka Tanaka , Hideo Miura , Yoshiyuki Kado , Ikuo Yoshida , Takahiro Naito
发明人： Naotaka Tanaka , Hideo Miura , Yoshiyuki Kado , Ikuo Yoshida , Takahiro Naito
IPC分类号： H01L2352
CPC分类号： H01L23/562 , H01L21/563 , H01L23/145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/12044 , H01L2924/00
摘要： In order to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric connection between each of bump pads formed on LSI chips and each of electrode pads formed on an interconnection substrate, within an guaranteed temperature range, a thermal expansion coefficient of an adhesive (3) is in the range of 20 to 60 ppm, and an elastic modulus of a build-up portion (6) is in the range of 5 to 10 GPa. Further, the build-up portion (6) is constituted by a multi-layer build-up substrate in which buid-up portion a peak value (a glass transition temperature) of a loss coefficient exists within a range of 100° C. to 250° C. and does not exist within a range of 0° C. to 100° C. By setting or selecting the physical properties in the manner disclosed above, it is possible to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric bonding between the bump pads (2) formed on the LSI chips (1) and the electrode pads (4) on the interconnection substrate (5) within an guaranteed temperature range.
摘要翻译：为了实现能够保持高可靠性的半导体器件及其制造方法，在形成在LSI芯片上的每个凸块焊盘和形成在互连基板上的每个电极焊盘之间的电连接在保证的温度范围内，粘合剂（3）的膨胀系数在20〜60ppm的范围内，积聚部（6）的弹性模量在5〜10GPa的范围内。此外，积存部（6）由多层积层基板构成，在该多层积层基板中，增益部分的损耗系数的峰值（玻璃化转变温度）存在于100℃〜 250℃，并且不存在于0℃至100℃的范围内。通过以上述方式设置或选择物理性质，可以实现可以保持的半导体器件及其制造方法在保证温度范围内，形成在LSI芯片（1）上的凸块焊盘（2）和互连基板（5）上的电极焊盘（4）之间的电连接具有高可靠性。

7. 发明授权

US08524534B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US08524534B2
公开(公告)日：2013-09-03
申请号：US13533779
申请日：2012-06-26
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/00
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

8. 发明申请

US20120264240A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120264240A1
公开(公告)日：2012-10-18
申请号：US13533779
申请日：2012-06-26
申请人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kirkuchi
发明人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kirkuchi
IPC分类号： H01L21/50 , H01L21/66
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

9. 发明授权

US08278147B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08278147B2
公开(公告)日：2012-10-02
申请号：US12565747
申请日：2009-09-23
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/00
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

10. 发明申请

US20110171780A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110171780A1
公开(公告)日：2011-07-14
申请号：US13053410
申请日：2011-03-22
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/50
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

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