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1. 发明授权

US06788506B1 Integrated circuit and method of operation 有权
标题翻译：集成电路和操作方法
公开(公告)号：US06788506B1
公开(公告)日：2004-09-07
申请号：US09711420
申请日：2000-11-13
申请人： Troy L. Stockstad
发明人： Troy L. Stockstad
IPC分类号： H02H900
CPC分类号： H03K5/08
摘要： An integrated circuit includes circuit nodes (111 and 131), a resistor (210) coupling together the nodes, a comparator (230) having two inputs and an output where a first one of the two inputs is coupled to the resistor and a first one of the nodes, and a three-terminal device (220) having a first terminal coupled to a second one of the nodes and the resistor and also having a second terminal coupled to the output of the comparator.
摘要翻译：集成电路包括电路节点（111和131），将节点耦合在一起的电阻器（210），具有两个输入的比较器（230）和两个输入端中的第一个耦合到电阻器的输出端和第一个以及具有耦合到所述节点中的第二节点和所述电阻器的第一端子并且还具有耦合到所述比较器的输出的第二端子的三端子装置（220）。

2. 发明授权

US5675268A Overcurrent detection circuit for a power MOSFET and method therefor 失效
标题翻译：功率MOSFET过电流检测电路及其方法
公开(公告)号：US5675268A
公开(公告)日：1997-10-07
申请号：US538522
申请日：1995-10-03
申请人： Thomas D. Petty , Troy L. Stockstad , Warren J. Schultz
发明人： Thomas D. Petty , Troy L. Stockstad , Warren J. Schultz
IPC分类号： H03K17/082 , H03K5/153 , H03K5/22
CPC分类号： H03K17/0822
摘要： An overcurrent detector circuit (21) for a power MOSFET (22) is described. The overcurrent detector circuit (21) generates a bias voltage corresponding to the drain to source voltage of the power MOSFET (22). The drain to source voltage correlates directly to the current being conducted by the power MOSFET (22). An overcurrent condition occurs when the power MOSFET (22) exceeds a predetermined current. The bias voltage is applied to a transistor (24) for generating a current. A current source (29) couples to the transistor (24). The current provided by the transistor equals the reference current of the current source (29) when the power MOSFET conducts the predetermined current. The overcurrent detector circuit (21) generates a signal indicating a overcurrent condition does not exist when the reference current is greater the current provided by the transistor. Conversely, the overcurrent detector circuit (21) generates a signal indicating the overcurrent condition when the current provided by the transistor exceeds the reference current.
摘要翻译：描述了用于功率MOSFET（22）的过电流检测器电路（21）。过电流检测器电路（21）产生对应于功率MOSFET（22）的漏极 - 源极电压的偏置电压。漏极到源极电压直接与由功率MOSFET（22）传导的电流相关。当功率MOSFET（22）超过预定电流时，发生过电流状况。偏置电压被施加到用于产生电流的晶体管（24）。电流源（29）耦合到晶体管（24）。当功率MOSFET导通预定电流时，由晶体管提供的电流等于电流源（29）的参考电流。过电流检测器电路（21）产生指示当晶体管提供的电流的参考电流大时，过电流状态不存在的信号。相反，当由晶体管提供的电流超过参考电流时，过电流检测器电路（21）产生指示过电流状况的信号。

3. 发明授权

US5471174A Amplifier having an output stage with bias current cancellation 失效
标题翻译：具有偏置电流消除的输出级的放大器
公开(公告)号：US5471174A
公开(公告)日：1995-11-28
申请号：US349578
申请日：1994-12-05
申请人： Thomas D. Petty , Troy L. Stockstad , Robert L. Vyne
发明人： Thomas D. Petty , Troy L. Stockstad , Robert L. Vyne
IPC分类号： H03F1/56 , H03F3/343 , H03F3/45
CPC分类号： H03F3/343 , H03F1/56
摘要： An amplifier circuit (10) receives a differential input signal and provides an amplified differential signal. A converter circuit (14) is responsive to the amplified differential signal and provides a single-ended signal. An output stage (16) is responsive to the single-ended signal for providing an output signal of the amplifier circuit. The output stage provides bias cancellation for the single-ended signal by injecting a current equal to the bias requirement of the input transistors (20, 38). The bias cancellation maintains a high input impedance and high gain and output drive for the output stage.
摘要翻译：放大器电路（10）接收差分输入信号并提供放大的差分信号。 A转换器电路（14）响应放大的差分信号并提供单端信号。输出级（16）响应于单端信号以提供放大器电路的输出信号。输出级通过注入等于输入晶体管（20,38）的偏置要求的电流来为单端信号提供偏置消除。偏置消除在输出级保持高输入阻抗和高增益和输出驱动。

4. 发明授权

US06870422B2 Low voltage rail-to-rail CMOS input stage 有权
标题翻译：低电压轨至轨CMOS输入级
公开(公告)号：US06870422B2
公开(公告)日：2005-03-22
申请号：US10013581
申请日：2001-12-10
申请人： Troy L. Stockstad
发明人： Troy L. Stockstad
IPC分类号： H03K19/0175 , H03F3/45
CPC分类号： H03F3/45192 , H03F2203/45342 , H03F2203/45612
摘要： The present invention discloses a low voltage rail-to-rail CMOS input stage. The input stage includes a differential pail of P-channel metal oxide semiconductor field effect (PMOS) transistors, which produces differential output current signal. The input stage further includes a pair of N-channel depletion-mode metal oxide semiconductor field effect (NMOS) transistors, coupled to the bulk terminals of the differential pair of PMOS transistors, for receiving an input signal. The depletion-mode NMOS transistors further act as source follower devices to drive the bulk terminals of the differential pair of PMOS transistors.
摘要翻译：本发明公开了一种低电压轨至轨CMOS输入级。输入级包括产生差分输出电流信号的P沟道金属氧化物半导体场效应（PMOS）晶体管的差分桶。输入级还包括耦合到PMOS晶体管的差分对的体电极的一对N沟道耗尽型金属氧化物半导体场效应（NMOS）晶体管，用于接收输入信号。耗尽型NMOS晶体管还用作源极跟随器件来驱动差分PMOS晶体管的体端子。

5. 发明授权

US5422600A Amplifier input stage with charge pump supplying a differential transistor pair 失效
标题翻译：具有电荷泵的放大器输入级提供差分晶体管对
公开(公告)号：US5422600A
公开(公告)日：1995-06-06
申请号：US264290
申请日：1994-06-23
申请人： Thomas D. Petty , Robert L. Vyne , Troy L. Stockstad
发明人： Thomas D. Petty , Robert L. Vyne , Troy L. Stockstad
IPC分类号： H03F3/45
CPC分类号： H03F3/45094 , H03F2203/45028 , H03F2203/45124 , H03F2203/45476 , H03F2203/45648 , H03F2203/45674
摘要： An input stage to an amplifier circuit (10) operating with a one volt power supply potential (32) receives a differential input signal. A charge pump (36) increases the one volt power supply potential to 1.8 volts for providing additional head-room for the differential input signal. A current source (44) controls a current mirror (40-42) to draw a predetermined current from the charge pump to supply the active conduction path of a differential transistor pair (12-14). An output stage (34) of the amplifier circuit operates off the one volt power supply potential. Since the charge pump drives only the differential transistor pair through the current mirror, it may be made small to fit on the same integrated circuit as the amplifier including any necessary pump capacitors.
摘要翻译：用一伏电源电位（32）工作的放大器电路（10）的输入级接收差分输入信号。电荷泵（36）将一伏特电源电位增加到1.8伏，为差分输入信号提供额外的头部空间。电流源（44）控制电流镜（40-42）从电荷泵吸取预定电流以提供差动晶体管对（12-14）的有源导通路径。放大器电路的输出级（34）操作一伏特电源电位。由于电荷泵仅驱动通过电流镜的差分晶体管对，所以可以使其小到与包括任何必需的泵电容器的放大器相同的集成电路。

6. 发明授权

US06703894B1 Baseband filter for receivers 有权
标题翻译：接收器的基带滤波器
公开(公告)号：US06703894B1
公开(公告)日：2004-03-09
申请号：US10341158
申请日：2003-01-13
申请人： Troy L. Stockstad , Klaas Wortel
发明人： Troy L. Stockstad , Klaas Wortel
IPC分类号： H03B100
CPC分类号： H03H11/04 , H03H19/004
摘要： A filter circuit. In one embodiment, the filter circuit includes a continuous time (CT) filter, a switched capacitor (SWC) filter, and an SWC integrator. The CT filter is coupled to receive an input signal from an external source. The CT filter may be a low-pass filter. The SWC filter is coupled to receive an output signal from the CT filter, and provide an output information signal. The SWC filter may also be a low pass filter. A feedback loop may be present between the output of the SWC filter and the input of the CT filter. The SWC integrator samples the output signal from the SWC filter and provides an output signal to the CT filter. The output signal is combined with the input signal to the CT filter. A D.C. offset may be substantially removed from the information signal provided by the output of the SWC filter.
摘要翻译：滤波电路。在一个实施例中，滤波电路包括连续时间（CT）滤波器，开关电容器（SWC）滤波器和SWC积分器。 CT滤波器被耦合以从外部源接收输入信号。 CT滤波器可以是低通滤波器。 SWC滤波器被耦合以从CT滤波器接收输出信号，并提供输出信息信号。 SWC滤波器也可以是低通滤波器。在SWC滤波器的输出和CT滤波器的输入之间可能存在反馈回路。 SWC积分器对SWC滤波器的输出信号进行采样，并向CT滤波器提供输出信号。输出信号与CT滤波器的输入信号相结合。可以从SWC滤波器的输出提供的信息信号中基本上去除直流偏移。

7. 发明授权

US06366167B1 Low voltage rail-to-rail CMOS input stage 有权
标题翻译：低电压轨至轨CMOS输入级
公开(公告)号：US06366167B1
公开(公告)日：2002-04-02
申请号：US09516008
申请日：2000-02-29
申请人： Troy L. Stockstad
发明人： Troy L. Stockstad
IPC分类号： H03F345
CPC分类号： H03F3/45192 , H03F2203/45342 , H03F2203/45612
摘要： The present invention discloses a low voltage rail-to-rail CMOS input stage. The input stage includes a differential pail of P-channel metal oxide semiconductor field effect (PMOS) transistors, which produces differential output current signal. The input stage further includes a pair of N-channel depletion-mode metal oxide semiconductor field effect (NMOS) transistors, coupled to the bulk terminals of the differential pair of PMOS transistors, for receiving an input signal. The depletion-mode NMOS transistors further act as source follower devices to drive the bulk terminals of the differential pair of PMOS transistors.
摘要翻译：本发明公开了一种低电压轨至轨CMOS输入级。输入级包括产生差分输出电流信号的P沟道金属氧化物半导体场效应（PMOS）晶体管的差分桶。输入级还包括耦合到PMOS晶体管的差分对的体电极的一对N沟道耗尽型金属氧化物半导体场效应（NMOS）晶体管，用于接收输入信号。耗尽型NMOS晶体管还用作源极跟随器件来驱动差分PMOS晶体管的体端子。

8. 发明授权

US5804944A Battery protection system and process for charging a battery 失效
公开(公告)号：US5804944A
公开(公告)日：1998-09-08
申请号：US833437
申请日：1997-04-07
申请人： Jade Alberkrack , Troy L. Stockstad
发明人： Jade Alberkrack , Troy L. Stockstad
IPC分类号： H02J7/04 , H02H7/18 , H02J7/00 , H02J7/10 , G01N27/27
CPC分类号： H02J7/0026 , H02J7/0011 , H02J7/0021 , H02J7/0093
摘要： A battery protection system (20) controls a process for charging a battery pack (15). A hysteresis comparator (54) senses a charging current flowing through the battery pack (15) and switches off a charging switch (31) to interrupt the charging current when the charging current reaches an upper limit. A transient current is then generated by an inductor (34). The hysteresis comparator (54) senses the transient current flowing through the battery pack (15) and switches on the charging switch (31) to regenerate the charging current when the transient current decreases substantially to zero. Periodically, a battery monitoring circuit (40) switches off the charging switch (31) and measures an open circuit voltage across each battery cell in the battery pack (15). In response to the open circuit voltage of a battery cell reaching a fully charged voltage, the battery monitoring circuit (40) switches off the charging switch (31) to terminate the charging process.

9. 发明授权

US5646503A Method for balancing power sources and structure therefor 失效
标题翻译：电源平衡方法及其结构
公开(公告)号：US5646503A
公开(公告)日：1997-07-08
申请号：US539207
申请日：1995-10-04
申请人： Troy L. Stockstad
发明人： Troy L. Stockstad
IPC分类号： H02J7/02 , H01M10/44 , H02J7/00
CPC分类号： H02J7/0022 , H02J7/0016
摘要： A power source balancing circuit (10) balances two power sources such as two battery cells (12 and 42). When the power source balancing circuit (10) is enabled, it compares a current flowing through the first battery cell (12) and a first resistor (22) with a current flowing through the second battery cell (42) and a second resistor (52). Because the resistance of the first resistor (22) is equal to that of the second resistor (52), a difference between the two currents indicates a difference between the voltages of the two battery cells (12 and 42). If a current difference larger than a predetermined limit is detected, the battery cell (12 or 42) with a higher voltage is discharged through a corresponding discharge resistor (14 or 44) by switching on a corresponding switch (16 or 46). The corresponding switch (16 or 46) is controlled by a corresponding flip-flop (32 or 62).
摘要翻译：电源平衡电路（10）平衡两个电源，例如两个电池单元（12和42）。当电源平衡电路（10）使能时，它将流过第一电池单元（12）的电流和第一电阻（22）与流过第二电池单体（42）的电流和第二电阻（52）进行比较）。因为第一电阻器（22）的电阻与第二电阻器（52）的电阻相等，所以两个电流之间的差表示两个电池单元（12和42）的电压之间的差。如果检测到大于预定极限的电流差，则通过打开相应的开关（16或46），通过相应的放电电阻器（14或44）将具有较高电压的电池单元（12或42）放电。相应的开关（16或46）由相应的触发器（32或62）控制。

10. 发明授权

US5610495A Circuit and method of monitoring battery cells 失效
标题翻译：监测电池的电路及方法
公开(公告)号：US5610495A
公开(公告)日：1997-03-11
申请号：US262305
申请日：1994-06-20
申请人： Renwin J. Yee , Troy L. Stockstad , Thomas D. Petty
发明人： Renwin J. Yee , Troy L. Stockstad , Thomas D. Petty
IPC分类号： H01M10/48 , H02J7/00 , H01M10/44 , H01M10/46
CPC分类号： H02J7/0019 , H01M10/48 , Y10S320/13
摘要： A battery monitoring circuit (10) sequentially samples individual voltages across a string of serially coupled battery cells (12-18). A control circuit (32) controls first and second multiplexers (34,42) to sample each battery voltage for an over-voltage condition. A comparator (52) detects an over-voltage condition by comparing a divided down battery voltage against a reference. The conduction path through the battery cells is disabled upon detecting a fault condition by a transistor (26) in the battery cell conduction path. The battery cells are further sequentially sampled for an under-voltage fault. The comparator detects an under-voltage condition by comparing a second divided down battery voltage against the reference. The conduction path through the battery cells is disabled upon detecting a fault condition by a transistor (24) in the battery cell conduction path.
摘要翻译：电池监视电路（10）顺序地对串联的串联电池单元（12-18）的各个电压进行采样。控制电路（32）控制第一和第二多路复用器（34,42）以对每个电池电压进行采样以用于过电压状态。比较器（52）通过将分压的电池电压与参考值进行比较来检测过电压状态。在通过电池单元传导路径中的晶体管（26）检测到故障状态时，通过电池单元的传导路径被禁用。对于欠压故障，电池单元进一步顺序采样。比较器通过比较第二分压电池电压与参考值来检测欠电压状况。在通过电池单元传导路径中的晶体管（24）检测到故障状态时，通过电池单元的传导路径被禁止。

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