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1. 发明申请

US20190059177A1 HEAT DISSIPATION MODULE AND ELECTRONIC DEVICE 审中-公开
公开(公告)号：US20190059177A1
公开(公告)日：2019-02-21
申请号：US15894886
申请日：2018-02-12
申请人： Tse-An Chu , Ching-Ya Tu , Chang-Yuan Wu , Hao-Wu Yang , Huan-Yang Yeh
发明人： Tse-An Chu , Ching-Ya Tu , Chang-Yuan Wu , Hao-Wu Yang , Huan-Yang Yeh
IPC分类号： H05K7/20 , G06F1/20 , F04D29/28 , F04D29/42
摘要： A heat dissipation module adapted for an electronic device is provided. The heat dissipation module includes a heat dissipation structure and a heat dissipation fan. The heat dissipation structure is disposed in a casing of the electronic device and has a heat dissipation portion and an extending portion, wherein the extending portion has a slot, and a heat dissipation flow channel is formed between the heat dissipation portion and the casing. The heat dissipation fan is detachably assembled to the extending portion to be adjacent to the heat dissipation portion, wherein the heat dissipation fan covers the slot, the slot is connected to the heat dissipation flow channel, the heat dissipation fan is adapted to provide a heat dissipation air flow, and a part of the heat dissipation air flow passes through the slot and the heat dissipation flow channel in sequence.

2. 发明授权

US08901115B2 Cyclic P1 linkers as factor XIa inhibitors 有权
标题翻译：循环P1接头作为因子XIa抑制剂
公开(公告)号：US08901115B2
公开(公告)日：2014-12-02
申请号：US14236968
申请日：2012-08-06
申请人： Patrick Y. S. Lam , Charles G. Clark , James R. Corte , William R. Ewing , Paul J. Gilligan , Yoon Jeon , Wu Yang , Leon M. Smith, II , Yufeng Wang
发明人： Patrick Y. S. Lam , Charles G. Clark , James R. Corte , William R. Ewing , Paul J. Gilligan , Yoon Jeon , Wu Yang , Leon M. Smith, II , Yufeng Wang
IPC分类号： C07D471/06 , C07D487/06 , A61K31/505 , A61K31/5365 , A61K31/4985 , A61P7/00 , C07D498/06
CPC分类号： C07D498/08 , C07D471/06 , C07D471/08 , C07D487/06 , C07D487/08 , C07D498/06
摘要： The present invention provides compounds of Formula (Ia): or stereoisomers, tautomers, or pharmaceutically acceptable salts thereof, wherein all the variables are as defined herein. These compounds are selective factor XIa inhibitors or dual inhibitors of FXIa and plasma kallikrein. This invention also relates to pharmaceutical compositions comprising these compounds and methods of treating thromboembolic and/or inflammatory disorders using the same.
摘要翻译：本发明提供式（Ia）化合物或其立体异构体，互变异构体或其药学上可接受的盐，其中所有变量如本文所定义。这些化合物是选择性因子XIa抑制剂或FXIa和血浆激肽释放酶的双重抑制剂。本发明还涉及包含这些化合物的药物组合物和使用其制备血栓栓塞和/或炎症性疾病的方法。

3. 发明授权

US08417848B2 Method and apparatus for implementing multiple service processing functions 有权
标题翻译：用于实现多个服务处理功能的方法和装置
公开(公告)号：US08417848B2
公开(公告)日：2013-04-09
申请号：US12743972
申请日：2008-07-22
申请人： Wu Yang , Jinglin Li , Lizhong Wang , Ergang Zhu
发明人： Wu Yang , Jinglin Li , Lizhong Wang , Ergang Zhu
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F9/5055 , G06F2209/507
摘要： A multi-service processing method, including: configuring different cores of a multi-core processor to process different services; and sending received packets to the cores in the pre-defined service processing sequence. The multi-core processor apparatus, includes the configuration management unit, the packet distributing unit, and the multi-core processor. The method and apparatus can save investments in devices while implementing multiple service processing functions.
摘要翻译：一种多业务处理方法，包括：配置多核处理器的不同核心来处理不同的业务; 并在预定义的服务处理序列中将接收的分组发送到核心。多核处理器装置包括配置管理单元，分组分配单元和多核处理器。该方法和装置可以在实现多个服务处理功能的同时节省对设备的投资。

5. 发明申请

US20120190198A1 METHOD FOR IMPROVING FLATNESS OF A LAYER DEPOSITED ON POLYCRYSTALLINE LAYER 有权
标题翻译：改善沉积在多晶层上的层的平滑度的方法
公开(公告)号：US20120190198A1
公开(公告)日：2012-07-26
申请号：US13012506
申请日：2011-01-24
申请人： Tuung Luoh , Ling-Wu Yang , Ta-Hone Yang , Kuang-Chao Chen
发明人： Tuung Luoh , Ling-Wu Yang , Ta-Hone Yang , Kuang-Chao Chen
IPC分类号： H01L21/302
CPC分类号： H01L21/02068 , H01L21/0217 , H01L21/32055 , H01L21/32139 , H01L21/76834
摘要： Described is a method for improving the flatness of a layer deposited on a doped polycrystalline layer, which includes reducing the grain size of the polycrystalline layer to decrease the out-diffusion amount of the dopant from the polycrystalline layer, and/or reducing the amount of the out-diffusing dopant on the surface of the polycrystalline layer.
摘要翻译：描述了一种用于提高沉积在掺杂多晶层上的层的平坦度的方法，其包括减小多晶层的晶粒尺寸以减少掺杂剂从多晶层的扩散量，和/或减少多晶层表面上的扩散扩散掺杂剂。

6. 发明授权

US08211806B2 Method of fabricating integrated circuit with small pitch 有权
标题翻译：制造小间距集成电路的方法
公开(公告)号：US08211806B2
公开(公告)日：2012-07-03
申请号：US11846900
申请日：2007-08-29
申请人： Chia-Wei Wu , Ling-Wu Yang
发明人： Chia-Wei Wu , Ling-Wu Yang
IPC分类号： H01L21/302
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： A method of manufacturing an integrated circuit with a small pitch comprises providing a second material layer patterned to form at least two features with an opening between the features. The second material layer is formed over a first material layer and the first material layer is over a substrate. The method also comprises providing a first oxide layer to form a first sidewall surrounding each of the features, and providing a second oxide layer over the first sidewalls and the first material layer. A second sidewall is formed surrounding each of the features. The method further comprises providing a conductive layer over the second oxide layer and removing the conductive layer, the second sidewalls and the first material underneath the second sidewalls.
摘要翻译：制造具有小间距的集成电路的方法包括提供图案化以形成具有特征之间的开口的至少两个特征的第二材料层。第二材料层形成在第一材料层上并且第一材料层在衬底之上。该方法还包括提供第一氧化物层以形成围绕每个特征的第一侧壁，以及在第一侧壁和第一材料层之上提供第二氧化物层。形成围绕每个特征的第二侧壁。该方法还包括在第二氧化物层上提供导电层，并移除第二侧壁下方的导电层，第二侧壁和第一材料。

7. 发明授权

US07939432B2 Method of improving intrinsic gettering ability of wafer 有权
标题翻译：提高晶片内在吸气能力的方法
公开(公告)号：US07939432B2
公开(公告)日：2011-05-10
申请号：US12334829
申请日：2008-12-15
申请人： Chun-Ling Chiang , Jung-Yu Hsieh , Ling-Wu Yang
发明人： Chun-Ling Chiang , Jung-Yu Hsieh , Ling-Wu Yang
IPC分类号： H01L21/322 , H01L21/335 , H01L21/8232
CPC分类号： H01L21/3225
摘要： A method of improving the intrinsic gettering ability of a wafer is described. A first annealing step is performed to the wafer at a first temperature in an atmosphere containing at least one of oxygen gas and nitrogen gas. A second annealing step is performed to the wafer, at a second temperature higher than the first temperature, in the atmosphere.
摘要翻译：描述了提高晶片的固有吸气能力的方法。在包含氧气和氮气中的至少一种的气氛中的第一温度下对晶片进行第一退火步骤。在大气中在高于第一温度的第二温度下对晶片进行第二退火步骤。

8. 发明授权

US07888376B2 Heterocyclic CETP inhibitors 有权
标题翻译：杂环CETP抑制剂
公开(公告)号：US07888376B2
公开(公告)日：2011-02-15
申请号：US11559930
申请日：2006-11-15
申请人： Mark E. Salvati , Heather Finlay , Lalgudi S. Harikrishnan , Ji Jiang , James A. Johnson , Muthoni G. Kamau , R. Michael Lawrence , Michael M. Miller , Jennifer X. Qiao , Tammy C. Wang , Yufeng Wang , Wu Yang
发明人： Mark E. Salvati , Heather Finlay , Lalgudi S. Harikrishnan , Ji Jiang , James A. Johnson , Muthoni G. Kamau , R. Michael Lawrence , Michael M. Miller , Jennifer X. Qiao , Tammy C. Wang , Yufeng Wang , Wu Yang
IPC分类号： C07D213/56 , A61K31/44
CPC分类号： C07D417/06 , C07D213/40 , C07D213/61 , C07D277/28 , C07D401/04 , C07D401/12 , C07D405/06 , C07D405/12 , C07D417/12
摘要： Compounds of formula Ia and Ib wherein A, B, C and R1 are described herein.
摘要翻译：其中A，B，C和R 1的化合物在此描述。

9. 发明授权

US07879706B2 Memory and manufacturing method thereof 有权
标题翻译：其记忆及其制造方法
公开(公告)号：US07879706B2
公开(公告)日：2011-02-01
申请号：US11979101
申请日：2007-10-31
申请人： Erh-Kun Lai , Yen-Hao Shih , Ling-Wu Yang , Chun-Min Cheng
发明人： Erh-Kun Lai , Yen-Hao Shih , Ling-Wu Yang , Chun-Min Cheng
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/28282 , H01L27/11568 , H01L29/66545 , H01L29/66583 , H01L29/7923
摘要： A memory having isolated dual memory cells is provided. A first isolation wall and a second isolation wall are separately disposed between a source and a drain on a substrate. An isolation bottom layer and a polysilicon layer are orderly disposed on the substrate between the first and the second isolation walls. A first charge storage structure and a first gate are orderly disposed on the substrate between the first isolation wall and the source. A second charge storage structure and a second gate are orderly disposed on the substrate between the second isolation wall and the drain. A word line disposed on the polysilicon layer, the first gate, the second gate, the first isolation wall and the second isolation wall is electrically connected to the first gate, the second gate and the polysilicon layer.
摘要翻译：提供具有隔离双存储单元的存储器。第一隔离壁和第二隔离壁分别设置在基板上的源极和漏极之间。隔离底层和多晶硅层有序地设置在第一和第二隔离壁之间的衬底上。第一电荷存储结构和第一栅极有序地设置在第一隔离壁和源极之间的衬底上。第二电荷存储结构和第二栅极有序地设置在第二隔离壁和漏极之间的衬底上。布置在多晶硅层上的字线，第一栅极，第二栅极，第一隔离壁和第二隔离壁电连接到第一栅极，第二栅极和多晶硅层。

10. 发明授权

US07790745B2 Tetrahydroisoquinoline LXR Modulators 有权
标题翻译：四氢异喹啉LXR调节剂
公开(公告)号：US07790745B2
公开(公告)日：2010-09-07
申请号：US11582784
申请日：2006-10-18
申请人： Wu Yang , Yufeng Wang , Ellen K. Kick
发明人： Wu Yang , Yufeng Wang , Ellen K. Kick
IPC分类号： C07D403/02 , A61K31/4709
CPC分类号： C07D217/26 , C07D401/12 , C07D405/12 , C07D409/12 , C07D409/14 , C07D413/12 , C07D417/14
摘要： A compound of formula I wherein X, R1, R2a, R3a, R3b, R4a, R4b, R4c and R5 are defined herein.
摘要翻译：其中X，R1，R2a，R3a，R3b，R4a，R4b，R4c和R5在本文中定义的式I化合物。

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