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1. 发明申请

US20150155636A1 DUAL ANTENNA SYSTEM 有权
标题翻译：双天线系统
公开(公告)号：US20150155636A1
公开(公告)日：2015-06-04
申请号：US14382442
申请日：2013-01-15
申请人： Tamami Maruyama , Yasuhiro Oda , Jianfeng Li , Qiaowei Yuan , Qiang Chen , Kunio Sawaya
发明人： Tamami Maruyama , Yasuhiro Oda , Jianfeng Li , Qiaowei Yuan , Qiang Chen , Kunio Sawaya
IPC分类号： H01Q21/29 , H01Q13/10 , H01Q9/04 , H01Q19/30
CPC分类号： H01Q21/29 , H01Q1/246 , H01Q9/0407 , H01Q9/065 , H01Q13/085 , H01Q13/106 , H01Q19/30 , H01Q21/0075 , H01Q21/065
摘要： A disclosed dual antenna system includes a receiving antenna which includes a first surface orthogonal to an incident wave, the first surface being a first antenna aperture, and a transmitting antenna which includes a second surface parallel to a reflection direction which is a transmission direction, the second surface being a second antenna aperture. A portion of a structure of the transmitting antenna is shared by the receiving antenna.
摘要翻译：公开的双天线系统包括：接收天线，其包括与入射波正交的第一表面，第一表面是第一天线孔，以及发射天线，其包括平行于作为透射方向的反射方向的第二表面，第二表面是第二天线孔。发射天线的结构的一部分由接收天线共享。

2. 发明授权

US08830126B2 Apparatus having mushroom structures 有权
标题翻译：具有蘑菇结构的装置
公开(公告)号：US08830126B2
公开(公告)日：2014-09-09
申请号：US13032301
申请日：2011-02-22
申请人： Tamami Maruyama , Tatsuo Furuno , Yasuhiro Oda , Jiyun Shen , Tomoyuki Ohya
发明人： Tamami Maruyama , Tatsuo Furuno , Yasuhiro Oda , Jiyun Shen , Tomoyuki Ohya
IPC分类号： H01Q15/00
CPC分类号： H01Q15/008 , H01Q15/14
摘要： An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures includes: a ground plate; a first patch provided parallel to the ground plate with a separation of a distance to the ground plate; and a second patch provided parallel to the ground plate with a separation of another distance to the ground plate, which another distance being different from the distance from the first patch to the ground plate, wherein the second patch is a passive element which is capacitatively coupled with at least the first patch.
摘要翻译：公开了一种具有多个蘑菇结构的装置。多个蘑菇结构中的每一个包括：接地板; 与接地板平行设置的与接地板隔开距离的第一贴片; 以及与所述接地板平行设置的与所述接地板隔开另一距离的第二补片，所述另一距离与所述第一贴片到所述接地板的距离不同，其中所述第二贴片是被动元件，其被电容耦合至少有第一个补丁。

3. 发明申请

US20120303328A1 PROPAGATION PATH ESTIMATION METHOD AND PROGRAM AND APPARATUS USING THE SAME 有权
标题翻译：传播路径估算方法和程序以及使用该方法的设备
公开(公告)号：US20120303328A1
公开(公告)日：2012-11-29
申请号：US13513694
申请日：2010-12-03
申请人： Tamami Maruyama , Tatsuo Furuno , Tomoyuki Ohya , Jiyun Shen , Yasuhiro Oda , Ngoc Hao Tran
发明人： Tamami Maruyama , Tatsuo Furuno , Tomoyuki Ohya , Jiyun Shen , Yasuhiro Oda , Ngoc Hao Tran
IPC分类号： G06F15/00
CPC分类号： H04B17/104 , G06F17/5009 , H04B17/00 , H04B17/309 , H04B17/391 , H04W16/18
摘要： A propagation path estimation method using an imaging method according to the invention includes a step of, in a case where a reflect array 1 (structure) which causes reflection and scattering in a predetermined direction (θ-η)° different from a specular reflection direction θ° exists on a propagation path, rotating the reflect array 1 by η/2° about a rotation center O to set a virtual rotated reflect array 2 (virtual structure), and estimating the propagation path by using the virtual rotated reflect array 2.
摘要翻译：使用根据本发明的成像方法的传播路径估计方法包括以下步骤：在反射阵列1（结构）的反射阵列1（结构）的情况下，其反射和散射在与镜面不同的预定方向（＆amp;θ＆反射方向和角度;°存在于传播路径上，围绕旋转中心O围绕反射阵列1旋转2°以设置虚拟旋转反射阵列2（虚拟结构），并且通过使用虚拟旋转来估计传播路径反射阵列2。

4. 发明授权

US08126385B2 Image forming mechanism and image forming device 有权
标题翻译：图像形成机构和图像形成装置
公开(公告)号：US08126385B2
公开(公告)日：2012-02-28
申请号：US12558680
申请日：2009-09-14
申请人： Kazuhiko Arai , Nobuyuki Nakayama , Daisuke Nagao , Ryosuke Takahashi , Yasuhiro Oda , Koichiro Yuasa
发明人： Kazuhiko Arai , Nobuyuki Nakayama , Daisuke Nagao , Ryosuke Takahashi , Yasuhiro Oda , Koichiro Yuasa
IPC分类号： G03G21/00
CPC分类号： G03G21/0005 , G03G21/0017
摘要： There is provided an image forming mechanism including: an image carrier containing a lubricant in a photosensitive layer that is formed on a surface of the image carrier, and on which an electrostatic latent image is formed; a developing section developing the electrostatic latent image into a visible image by a developer that contains the lubricant; and a cleaning member formed with a first layer that contacts the photosensitive layer, and a second layer that is formed of a material having a lower modulus of repulsion elasticity than the first layer and that is layered with the first layer and that does not contact the surface of the image carrier.
摘要翻译：提供了一种图像形成机构，包括：图像载体，其在感光层中含有润滑剂，所述感光层形成在所述图像载体的表面上，并且形成有静电潜像; 显影部，其通过含有润滑剂的显影剂将静电潜像显影成可见图像; 以及形成有与感光层接触的第一层的清洁构件，以及由具有比第一层更低的排斥弹性模量并且与第一层层叠的并且不与第一层层叠的材料形成的第二层图像载体的表面。

5. 发明申请

US20110316582A1 Semiconductor integrated circuit including a power controllable region 失效
标题翻译：半导体集成电路包括功率可控区域
公开(公告)号：US20110316582A1
公开(公告)日：2011-12-29
申请号：US13137616
申请日：2011-08-30
申请人： Yasuhiro Oda
发明人： Yasuhiro Oda
IPC分类号： H03K19/003
CPC分类号： G01R31/318575 , H01L25/00 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor chip includes a first power supply line and a second power supply line. A first switch is coupled between the first power supply line and the second power supply line, and a second switch is coupled between the first power supply line and the second power supply line. A circuit is coupled to the second power supply line. A first control signal line is coupled to the first switch, and a second control signal line coupled to the second switch. A logic gate is coupled to the first and the second control signal lines and a terminal is coupled to the logic gate to output a signal to an outside of the semiconductor chip.
摘要翻译：半导体芯片包括第一电源线和第二电源线。第一开关耦合在第一电源线和第二电源线之间，第二开关耦合在第一电源线和第二电源线之间。电路耦合到第二电源线。第一控制信号线耦合到第一开关，以及耦合到第二开关的第二控制信号线。逻辑门耦合到第一和第二控制信号线，并且端子耦合到逻辑门以将信号输出到半导体芯片的外部。

6. 发明申请

US20110234267A1 Semiconductor device and method for controlling flip-flop 有权
标题翻译：用于控制触发器的半导体器件和方法
公开(公告)号：US20110234267A1
公开(公告)日：2011-09-29
申请号：US13064351
申请日：2011-03-21
申请人： Yasuhiro Oda
发明人： Yasuhiro Oda
IPC分类号： H03L7/00
CPC分类号： H03K3/0375
摘要： A semiconductor device according to one aspect of the present invention includes: a flip-flop; a clock control circuit that controls a clock signal supplied to the flip-flop; and a controller that supplies a data retention signal to the flip-flop and controls the clock control circuit. When the flip-flop is driven by a negative edge of the clock signal and retains data when the clock signal is at a high level, the controller controls the clock control circuit so as to supply a high-level clock signal to the flip-flop after the input clock signal is fixed and before the flip-flop retains data. This prevents the occurrence of unintended latching of data when the flip-flop having a retention function retains data.
摘要翻译：根据本发明的一个方面的半导体器件包括：触发器; 控制提供给触发器的时钟信号的时钟控制电路; 以及向触发器提供数据保持信号并控制时钟控制电路的控制器。当触发器由时钟信号的负沿驱动并且当时钟信号处于高电平时保持数据，控制器控制时钟控制电路，以向触发器提供高电平时钟信号在输入时钟信号固定之后，触发器保留数据之前。这防止当具有保留功能的触发器保留数据时发生数据的意外锁存。

7. 发明申请

US20110210904A1 APPARATUS HAVING MUSHROOM STRUCTURES 有权
标题翻译：具有MUSHROOM结构的装置
公开(公告)号：US20110210904A1
公开(公告)日：2011-09-01
申请号：US13031962
申请日：2011-02-22
申请人： Tamami Maruyama , Tatsuo Furuno , Yasuhiro Oda , Jiyun Shen , Tomoyuki Ohya
发明人： Tamami Maruyama , Tatsuo Furuno , Yasuhiro Oda , Jiyun Shen , Tomoyuki Ohya
IPC分类号： H01Q15/14
CPC分类号： H01Q15/008 , H01Q15/14
摘要： An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures including: a ground plate; a first patch provided parallel to the ground plate with a separation of a distance to the ground plate; and a second patch provided parallel to the ground plate with a separation of another distance to the ground plate, which another distance being different from the distance from the first patch to the ground plate, wherein the second patch is a passive element which is capacitatively coupled with at least the first patch.
摘要翻译：公开了一种具有多个蘑菇结构的装置。多个蘑菇结构中的每一个包括：接地板; 与接地板平行设置的与接地板隔开距离的第一贴片; 以及与所述接地板平行设置的与所述接地板隔开另一距离的第二补片，所述另一距离与所述第一贴片到所述接地板的距离不同，其中所述第二贴片是被动元件，其被电容耦合至少有第一个补丁。

8. 发明申请

US20110189960A1 Estimating Whether A Wireless Terminal Is Indoors Using Pattern Classification 有权
标题翻译：估计无线终端是否在室内使用模式分类
公开(公告)号：US20110189960A1
公开(公告)日：2011-08-04
申请号：US12696951
申请日：2010-01-29
申请人： Tarun Kumar Bhattacharya , Hassan M. El-Sallabi , Scot Douglas Gordon , Yasuhiro Oda , Jiyun Shen
发明人： Tarun Kumar Bhattacharya , Hassan M. El-Sallabi , Scot Douglas Gordon , Yasuhiro Oda , Jiyun Shen
IPC分类号： H04B17/00
CPC分类号： H04B17/318 , H04B17/00 , H04B17/373
摘要： A method and apparatus for estimating whether or not a wireless terminal is indoors are disclosed. The illustrative embodiment employs a pattern classifier that is trained on a plurality of input/output mappings, where each mapping corresponds to a respective location, the output of the mapping is a Boolean value that indicates whether the location is indoors, and the input of the mapping is based on empirical and predicted signal data for the location. In accordance with the illustrative embodiment, a computer-executable program is generated based on the trained pattern classifier. The computer-executable program estimates whether or not a wireless terminal is indoors based on empirical data reported by the terminal, and on a location estimate for the terminal that might be crude or inaccurate (e.g., based on Cell Identifier [Cell-ID], GPS, etc.).
摘要翻译：公开了一种用于估计无线终端是否在室内的方法和装置。示例性实施例采用在多个输入/输出映射上训练的模式分类器，其中每个映射对应于相应位置，映射的输出是布尔值，其指示该位置是否在室内，并且输入映射基于位置的经验和预测信号数据。根据说明性实施例，基于训练模式分类器生成计算机可执行程序。计算机可执行程序基于终端所报告的经验数据以及终端可能是粗糙或不精确的位置估计（例如，基于小区标识符[Cell-ID]）估计无线终端是否在室内， GPS等）。

9. 发明申请

US20110156952A1 Positioning System and Positioning Method 有权
标题翻译：定位系统和定位方法
公开(公告)号：US20110156952A1
公开(公告)日：2011-06-30
申请号：US12651019
申请日：2009-12-31
申请人： Tarun Kumar Bhattacharya , Hassan M. El-Sallabi , Scot Douglas Gordon , Yasuhiro Oda , Jiyun Shen
发明人： Tarun Kumar Bhattacharya , Hassan M. El-Sallabi , Scot Douglas Gordon , Yasuhiro Oda , Jiyun Shen
IPC分类号： G01S19/48
CPC分类号： G01S19/48 , G01S5/0252
摘要： It is an object of the present invention to perform positioning at the proper positioning time and positioning precision in response to a requirement with respect to positioning. A positioning server 10 comprises a first positioning component 12 that performs positioning of a cellular terminal 20 by a hybrid algorithm 1, in which indoor/outdoor determination is performed on the basis of reception state information indicating the reception state at the cellular terminal 20, and in which an end condition is determined on the basis of the result of the indoor/outdoor determination; and a second positioning component 13 that performs positioning of the cellular terminal 20 by a hybrid algorithm 2, in which the approximate position of the cellular terminal 20 is calculated on the basis of reception state information indicating the reception state at the cellular terminal 20, and in which whether or not to end the positioning of the cellular terminal 20 is decided on the basis of the precision of the approximated position.
摘要翻译：本发明的目的是响应于对定位的要求，在适当的定位时间和定位精度下执行定位。定位服务器10包括通过混合算法1执行蜂窝终端20的定位的第一定位组件12，其中基于指示蜂窝终端20的接收状态的接收状态信息进行室内/室外确定，以及其中根据室内/室外确定的结果确定结束条件; 以及通过混合算法2执行蜂窝终端20的定位的第二定位部件13，其中基于指示蜂窝终端20的接收状态的接收状态信息来计算蜂窝终端20的近似位置，以及基于近似位置的精度来决定是否结束蜂窝终端20的定位。

10. 发明申请

US20100237900A1 Semiconductor integrated circuit including a power controllable region 有权
标题翻译：半导体集成电路包括功率可控区域
公开(公告)号：US20100237900A1
公开(公告)日：2010-09-23
申请号：US12656596
申请日：2010-02-04
申请人： Yasuhiro Oda
发明人： Yasuhiro Oda
IPC分类号： H03K19/00 , H03K19/0175 , G06F17/50
CPC分类号： G01R31/318575 , H01L25/00 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit including a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to the outside of the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to the outside of the chip. In the case of inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain.
摘要翻译：提供一种能够在包括功率可控区域的半导体集成电路中测试功率控制操作的半导体集成电路。功率控制开关具有由多个开关单元构成的开关系列。功率可控区域包括开关系列中的输出节点。输出节点将通过功率控制开关的各个开关系列的最后级的功率控制信号输出到功率可控区域的外部。其上安装有半导体集成电路的芯片具有将输出节点的输出输出到芯片的外部的输出端子。在插入扫描路径测试的情况下，将输出节点的输出加载到数据终端的观察触发器，以及将扫描数据加载到扫描终端，与各个输出节点对应地布置。连接观察触发器构成扫描路径链。

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