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1. 发明授权

US08860033B2 Active matrix substrate 有权
标题翻译：有源矩阵基板
公开(公告)号：US08860033B2
公开(公告)日：2014-10-14
申请号：US12531383
申请日：2008-02-29
申请人： Makoto Kita , Mutsumi Nakajima , Yoshimizu Moriya , Yasuyoshi Kaise
发明人： Makoto Kita , Mutsumi Nakajima , Yoshimizu Moriya , Yasuyoshi Kaise
IPC分类号： H01L29/04 , G02F1/1368 , H01L27/12 , H01L29/786 , G02F1/1362
CPC分类号： H01L27/12 , G02F1/13624 , G02F1/1368 , H01L27/1214 , H01L27/1277 , H01L29/78645 , H01L29/78696
摘要： The active-matrix substrate (100) of the present invention satisfies d2>d1 and d2+A1/2>d3+L1/2, where d1 is the length of the shortest line segment that connects together a channel region (134) and a gettering region (112) as measured by projecting the line segment onto a line that connects together the channel region (134) of a TFT (130) and a source contact portion, d2 is the distance from the channel region (134) to the source contact portion (132c), d3 is the distance from the channel region (134) to a first end portion (110a), L1 is the length of the first end portion (110a), and A1 is the length of the source contact portion (132c).
摘要翻译：本发明的有源矩阵基板（100）满足d2> d1和d2 + A1 / 2> d3 + L1 / 2，其中d1是将沟道区域（134）和通过将线段投影到将TFT（130）的沟道区域（134）和源极接触部分连接在一起的线上测量的吸气区域（112），d2是从沟道区域（134）到源极接触部分（132c），d3是从沟道区域（134）到第一端部（110a）的距离，L1是第一端部（110a）的长度，A1是源极接触部分 132c）。

2. 发明申请

US20120320325A1 LIQUID CRYSTAL DISPLAY PANEL AND LIQUID CRYSTAL DISPLAY DEVICE 有权
标题翻译：液晶显示面板和液晶显示装置
公开(公告)号：US20120320325A1
公开(公告)日：2012-12-20
申请号：US13581358
申请日：2011-03-25
申请人： Yoshimizu Moriya , Yasuyoshi Kaise , Yasutoshi Tasaka , Yuki Kawashima
发明人： Yoshimizu Moriya , Yasuyoshi Kaise , Yasutoshi Tasaka , Yuki Kawashima
IPC分类号： G02F1/1343
CPC分类号： G02F1/13394 , G02F1/133707
摘要： The present invention provides a liquid crystal display panel that has an enhanced liquid crystal alignment controlling force irrespective of the external conditions or environments. The enhanced liquid crystal alignment controlling force sufficiently prevents surface roughness or color unevenness that can occur depending on the viewing angle, so that favorable display qualities and excellent transmittance can be achieved. The liquid crystal display panel includes a pair of substrates comprising a pixel electrode and a counter electrode; and a liquid crystal layer disposed between the substrates, the liquid crystal display panel comprising spacers at at least four corners of a pixel defined by the pixel electrode.
摘要翻译：本发明提供一种液晶显示面板，其与外部条件或环境无关地具有增强的液晶取向控制力。增强的液晶取向控制力充分地防止根据视角而发生的表面粗糙度或颜色不均匀性，从而可以实现良好的显示质量和优异的透射率。液晶显示面板包括一对基板，其包括像素电极和对置电极; 以及设置在所述基板之间的液晶层，所述液晶显示面板在由所述像素电极限定的像素的至少四个角部包括间隔物。

3. 发明申请

US20110090428A1 LIQUID CRYSTAL DISPLAY DEVICE 审中-公开
标题翻译：液晶显示装置
公开(公告)号：US20110090428A1
公开(公告)日：2011-04-21
申请号：US12999562
申请日：2009-06-11
申请人： Noritaka Ajari , Yasuyoshi Kaise
发明人： Noritaka Ajari , Yasuyoshi Kaise
IPC分类号： G02F1/1335
CPC分类号： G02F1/133555 , G02F1/133371 , G02F1/13394
摘要： A liquid crystal display device 100 according to the present invention includes: a liquid crystal layer 32 interposed between first and second substrates 11, 21; a pixel electrode 10, which includes a reflective pixel electrode 10r and a transparent pixel electrode 10t; a counter electrode 22; an organic insulating layer 24a, which has been deposited on the counter electrode 22 to face the liquid crystal layer 32; and a columnar spacer 24b arranged between the first and second substrates 11 and 21. The organic insulating layer 24a covers only the reflecting region R selectively or the counter electrode 22 substantially entirely, and is thicker in the reflecting region R than in the transmitting region T. And the columnar spacer 24b is made of the same organic film as the organic insulating layer 24a.
摘要翻译：根据本发明的液晶显示装置100包括：插入在第一和第二基板11,21之间的液晶层32; 像素电极10，其包括反射像素电极10r和透明像素电极10t; 对电极22; 已经沉积在对电极22上以面对液晶层32的有机绝缘层24a; 以及布置在第一和第二基板11和21之间的柱状间隔件24.有机绝缘层24a基本上完全仅覆盖反射区域R或相对电极22，并且在反射区域R中比在透射区域T中更厚并且柱状间隔件24b由与有机绝缘层24a相同的有机膜制成。

4. 发明授权

US07196699B1 Latch circuit, shift register circuit, logical circuit and image display device operated with a low consumption of power 有权
标题翻译：锁存电路，移位寄存器电路，逻辑电路和图像显示设备以低功耗运行
公开(公告)号：US07196699B1
公开(公告)日：2007-03-27
申请号：US09506033
申请日：2000-02-16
申请人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
发明人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
IPC分类号： G09G5/00 , G09G3/26 , H03K19/0175 , H03K19/00 , H03K5/153
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0417 , G09G2310/021 , G09G2310/0289 , G09G2330/021 , G11C19/00 , G11C19/28
摘要： A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts. According to the construction, the amplitude of an input signal can be made smaller than a supply voltage of the logical circuit.
摘要翻译： CMOS逻辑电路包括两个电流路径，每个电路具有由n型和p型晶体管组成的电路。在由n型或p型晶体管组成的电路中，一个电流路径设置有与具有CMOS逻辑电路的n型晶体管的电路相同结构的电路，该逻辑电路输出类似于该逻辑电路的另一个电流路径具有与具有CMOS逻辑电路的p型晶体管的电路相同结构的电路，该电路输出类似于该逻辑电路的逻辑运算结果。在由另一沟道型构成的另一电路中，设置在一个电流路径上的晶体管的栅电极和设置在另一电流路径上的晶体管的栅电极连接到对应物的漏电极。根据该结构，可以使输入信号的幅度小于逻辑电路的电源电压。

5. 发明授权

US07079096B2 Image display device and display driving method 失效
公开(公告)号：US07079096B2
公开(公告)日：2006-07-18
申请号：US10253570
申请日：2002-09-24
申请人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
发明人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3614 , G09G3/3688 , G09G2310/0248
摘要： Before a potential of counter electrode is changed, a potential holding circuit fixedly holds potentials of data signal lines S during a non-selective period of scanning signal lines G. This prevents the potentials of the data signal lines S from being an undesirably large potential, which is caused by coupling capacitors between the counter electrode and each data signal line S, whereby it is possible to supply to the pixel capacitor an electric charge corresponding to a gradation to be displayed, by using the relatively low potentials of the data signal lines S. This lowers a power supply voltage of a data signal driving circuit SD, thus reducing the electric power consumption. In short, with this arrangement, a liquid crystal display device can perform an opposed AC drive for line-inversion drive, frame-inversion drive and the like, by low power supply voltage of the data signal line driving circuit SD, thereby reducing the electric power consumption.

6. 发明授权

US06940500B2 Image display device and display driving method 有权
标题翻译：图像显示装置和显示驱动方法
公开(公告)号：US06940500B2
公开(公告)日：2005-09-06
申请号：US10252497
申请日：2002-09-23
申请人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
发明人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , G09G5/00
CPC分类号： G09G3/3648 , G09G3/3688 , G09G2310/0248 , G09G2330/021
摘要： A potential of a data signal line S during a scanning period is charged to a substantially intermediate potential of a data signal at a corresponding frame. Thus, extremely large dispersion does not occur in a potential of each pixel capacitor with respect to a potential of the data signal line S, so that it is possible to restrict dispersion of a leak current flowing via an active element of each pixel. Thus, potential variation of a pixel PIX is reduced, so that it is possible to improve display quality during a non-scanning period. That is, in an active-matrix-type liquid crystal display, when a frame frequency is reduced by setting the non-scanning period to be sufficiently larger than a scanning period while a standby image is being displayed so as to realize low power consumption, the display quality is improved.
摘要翻译：扫描周期期间的数据信号线S的电位被充电到相应帧的数据信号的大致中间电位。因此，相对于数据信号线S的电位，每个像素电容器的电位不会发生极大的色散，从而可以限制流过每个像素的有源元件的漏电流的色散。因此，像素PIX的电位变化减小，使得可以在非扫描期间提高显示质量。也就是说，在有源矩阵型液晶显示器中，当通过在显示待机图像的同时将非扫描周期设置为比扫描周期充分大来降低帧频，从而实现低功耗，显示质量得到提高。

7. 发明申请

US20050057556A1 Latch circuit, shift register circuit, logical circuit and image display device operated with a low consumption of power 有权
标题翻译：锁存电路，移位寄存器电路，逻辑电路和图像显示设备以低功耗运行
公开(公告)号：US20050057556A1
公开(公告)日：2005-03-17
申请号：US10949990
申请日：2004-09-23
申请人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
发明人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0417 , G09G2310/021 , G09G2310/0289 , G09G2330/021 , G11C19/00 , G11C19/28
摘要： A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts. According to the construction, the amplitude of an input signal can be made smaller than a supply voltage of the logical circuit.
摘要翻译： CMOS逻辑电路包括两个电流路径，每个电路具有由n型和p型晶体管组成的电路。在由n型或p型晶体管组成的电路中，一个电流路径设置有与具有CMOS逻辑电路的n型晶体管的电路相同结构的电路，该逻辑电路输出类似于该逻辑电路的另一个电流路径具有与具有CMOS逻辑电路的p型晶体管的电路相同结构的电路，该电路输出类似于该逻辑电路的逻辑运算结果。在由另一沟道型构成的另一电路中，设置在一个电流路径上的晶体管的栅电极和设置在另一电流路径上的晶体管的栅电极连接到对应物的漏电极。根据该结构，可以使输入信号的幅度小于逻辑电路的电源电压。

8. 发明授权

US06724361B1 Shift register and image display device 有权
标题翻译：移位寄存器和图像显示设备
公开(公告)号：US06724361B1
公开(公告)日：2004-04-20
申请号：US09703918
申请日：2000-11-01
申请人： Hajime Washio , Yasushi Kubota , Kazuhiro Maeda , Yasuyoshi Kaise , Michael James Brownlow , Graham Andrew Cairns
发明人： Hajime Washio , Yasushi Kubota , Kazuhiro Maeda , Yasuyoshi Kaise , Michael James Brownlow , Graham Andrew Cairns
IPC分类号： G09G336
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/0289
摘要： In a shift register provided with flip-flops that operate in synchronism with a clock signal, and a switching means, which is opened and closed in response to an output of the preceding stage of each of the flip-flops, is installed. The clock signal is selectively inputted by the switching means, and the selected clock signal is inverted and used as a shift register output from each of the stages. An output pulse having the same width as the pulse of the clock signal is generated.
摘要翻译：在设置有与时钟信号同步工作的触发器的移位寄存器中，并且响应于每个触发器的前级的输出而被打开和关闭的开关装置被安装。时钟信号由切换装置选择性地输入，所选择的时钟信号被反相并用作从每个级输出的移位寄存器。产生具有与时钟信号的脉冲相同宽度的输出脉冲。

9. 发明授权

US08488075B2 Active matrix substrate, display panel, display device, and electronic apparatus 有权
标题翻译：有源矩阵基板，显示面板，显示装置和电子设备
公开(公告)号：US08488075B2
公开(公告)日：2013-07-16
申请号：US12998046
申请日：2009-06-19
申请人： Yasuyoshi Kaise
发明人： Yasuyoshi Kaise
IPC分类号： G02F1/1343 , G02F1/133
CPC分类号： G02F1/136286 , G02F1/136213 , G09G3/3648 , G09G2300/0426 , G09G2300/0443 , G09G2300/0465 , G09G2300/0847 , G09G2320/0209
摘要： The TFT substrate includes (i) gate lines and data lines which are provided in a matrix manner, (ii) a plurality of pixel electrodes each of which has a side which extends in parallel with the gate lines and a side which extends in parallel with the data lines and is shorter than the side, (iii) storage capacitor lines extending in parallel with the gate lines, and (iv) connection lines which are electrically connected to the respective pixel electrodes. In at least one embodiment, the number of the storage capacitor lines is smaller than that of the gate lines. A single one of the storage capacitor lines overlap a plurality of connection lines which are electrically connected to respective of the plurality of pixel electrodes which are arranged in a direction in parallel with the data lines. The single one of the storage capacitor lines and the plurality of connection lines overlap each other via the insulating film so as to form storage capacitor elements.
摘要翻译： TFT基板包括（i）以矩阵方式设置的栅极线和数据线，（ii）多个像素电极，每个像素电极具有与栅极线平行延伸的一侧和与栅极线平行延伸的一侧数据线并且比侧面短，（iii）与栅极线并联延伸的保持电容线，以及（iv）电连接到各个像素电极的连接线。在至少一个实施例中，辅助电容线的数量小于栅极线的数量。另外，保持电容配线中的一个与多条连接线重叠，多条连接线与多条像素电极的电极连接，该多条像素电极与数据线平行配置。保持电容配线和多条连接线中的一个通过绝缘膜彼此重叠，形成保持电容元件。

10. 发明授权

US07999898B2 Active matrix type liquid crystal display device 有权
标题翻译：有源矩阵型液晶显示装置
公开(公告)号：US07999898B2
公开(公告)日：2011-08-16
申请号：US12303661
申请日：2007-04-24
申请人： Hiroshi Yoshida , Yasutoshi Tasaka , Yoshimizu Moriya , Yasuyoshi Kaise , Mutsumi Nakajima
发明人： Hiroshi Yoshida , Yasutoshi Tasaka , Yoshimizu Moriya , Yasuyoshi Kaise , Mutsumi Nakajima
IPC分类号： G02F1/1343
CPC分类号： G02F1/133707 , G02F2201/121
摘要： An active matrix liquid crystal display device is provided in which decrease in the aperture ratio is prevented, and deterioration in display quality is reduced by preventing liquid crystal molecules in a region of a pixel electrode which region faces a bus line from aligning in two or more directions. A liquid crystal panel in the active matrix liquid crystal display device includes a plurality of pixel electrodes (2) in array; and bus lines (42) arranged in a grid so as to surround each of the pixel electrodes (2), the pixel electrodes (2) each including a prominence (50) overlapping an adjacent one of the bus lines (42) in a top view, wherein the respective prominences (50) of each adjacent two of the pixel electrodes (2) facing each other across an adjacent one of the bus lines (42) overlap the bus line (42) at positions different from each other with respect to a direction in which the bus line (42) extends.
摘要翻译：提供了一种有源矩阵液晶显示装置，其中防止开口率的降低，并且通过防止像素电极的面对总线的区域的液晶分子在两个或更多个中对准来降低显示质量的劣化方向。有源矩阵液晶显示装置中的液晶面板包括阵列上的多个像素电极（2）以及布置成格栅以围绕每个像素电极（2）的总线（42），每个像素电极（2）包括与顶部相邻的一条总线（42）重叠的突出部（50）其中每个相邻的两个像素电极（2）中相邻的两个像素电极（2）的突出部分（50）跨越相邻的一条总线线路（42）在相对于总线（42）延伸的方向。

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