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1. 发明授权

US08471625B1 Beta enhanced voltage reference circuit 有权
标题翻译： β增强型电压基准电路
公开(公告)号：US08471625B1
公开(公告)日：2013-06-25
申请号：US13047313
申请日：2011-03-14
申请人： Hao Zhou , Bingkun Yao , Tao Shui , Yonghua Song
发明人： Hao Zhou , Bingkun Yao , Tao Shui , Yonghua Song
IPC分类号： G05F3/16 , H02M3/145
CPC分类号： G05F3/30
摘要： A beta enhancement circuit includes a current source connected in series with a transistor between two voltage supply lines. In an embodiment, the voltage supply lines are configured for connection to a power source and ground potential. A resistor device is connected between a control terminal of the transistor device and one of voltage supply lines. A value for the resistor device is selected based on one or more process dependent parameters of the transistor.
摘要翻译： β增强电路包括与两个电压线之间的晶体管串联连接的电流源。在一个实施例中，电压供应线被配置为连接到电源和地电位。电阻器件连接在晶体管器件的控制端子和电源线之一之间。基于晶体管的一个或多个处理相关参数来选择电阻器件的值。

2. 发明授权

US08451160B1 Low power high speed pipeline ADC 有权
标题翻译：低功耗高速流水线ADC
公开(公告)号：US08451160B1
公开(公告)日：2013-05-28
申请号：US13109320
申请日：2011-05-17
申请人： Hao Zhou , Yonghua Song , Tao Shui , Jie Jiang , Song Chen
发明人： Hao Zhou , Yonghua Song , Tao Shui , Jie Jiang , Song Chen
IPC分类号： H03M1/38
CPC分类号： H03M1/002 , H03M1/1215 , H03M1/124 , H03M1/167
摘要： In accordance with the teachings described herein, systems and methods are provided for a time-interleaved pipeline analog to digital converter. An example pipeline analog to digital converter may include passive sampling circuits and a multiplying digital to analog converter circuit. A first passive sampling circuit includes an input terminal coupled to an analog input signal, and outputs a first sample voltage that is responsive to the analog input signal. A second passive sampling circuit includes an input terminal coupled to the analog input signal, and outputs a second sample voltage that is responsive to the analog input signal. The first and second passive sampling circuits are clocked such that the first sample voltage and the second sample voltage are time-interleaved. A multiplying analog to digital converter (MDAC) circuit receives the time-interleaved first and second sample voltages from the first and second passive sampling circuits and processes the time-interleaved first and second sample voltages to generate a residue output voltage.
摘要翻译：根据本文描述的教导，为时间交错流水线模数转换器提供了系统和方法。示例性管线模数转换器可以包括无源采样电路和乘法数模转换器电路。第一无源采样电路包括耦合到模拟输入信号的输入端，并且输出响应于模拟输入信号的第一采样电压。第二无源采样电路包括耦合到模拟输入信号的输入端，并且输出响应于模拟输入信号的第二采样电压。第一和第二无源采样电路被计时，使得第一采样电压和第二采样电压是时间交织的。乘法模数转换器（MDAC）电路接收来自第一和第二无源采样电路的时间交错的第一和第二采样电压，并处理时间交错的第一和第二采样电压以产生残余输出电压。

3. 发明授权

US08331884B1 Voltage regulator for high performance RF systems 有权
标题翻译：用于高性能RF系统的稳压器
公开(公告)号：US08331884B1
公开(公告)日：2012-12-11
申请号：US12893604
申请日：2010-09-29
申请人： Swee-Ann Teo , Lawrence Tse , Yonghua Song
发明人： Swee-Ann Teo , Lawrence Tse , Yonghua Song
IPC分类号： H04B1/04 , H04B1/06
CPC分类号： H04B1/40 , H03G3/004
摘要： A voltage regulator for a radio frequency circuit including a master regulator circuit, a first slave regulator circuit, and a first radio frequency subcircuit. The master regulator circuit is configured to i) receive a reference voltage signal and a feedback signal and ii) output a control voltage signal based on the reference voltage signal and the feedback signal. The first slave regulator circuit is configured to i) receive the control voltage signal and ii) output a first regulated supply voltage signal based on the control voltage signal. The first radio frequency subcircuit is configured to receive the first regulated supply voltage signal. The control voltage signal corresponds to a desired supply voltage for the first radio frequency subcircuit.
摘要翻译：一种用于射频电路的电压调节器，包括主调节器电路，第一从调节器电路和第一射频子电路。主调节器电路被配置为i）接收参考电压信号和反馈信号，以及ii）基于参考电压信号和反馈信号输出控制电压信号。第一从调节器电路被配置为i）接收控制电压信号，以及ii）基于控制电压信号输出第一稳压电源电压信号。第一射频分支电路被配置为接收第一稳压电源电压信号。控制电压信号对应于第一射频子电路的期望电源电压。

4. 发明授权

US08319547B1 Self biased low noise high PSRR constant GM for VCO 有权
标题翻译：用于VCO的自偏置低噪声高PSRR常数GM
公开(公告)号：US08319547B1
公开(公告)日：2012-11-27
申请号：US12694922
申请日：2010-01-27
申请人： Chun-Geik Tan , Randy Tsang , Yonghua Song
发明人： Chun-Geik Tan , Randy Tsang , Yonghua Song
IPC分类号： G05F1/10
CPC分类号： G05F3/24 , H03L1/022 , H03L7/099
摘要： A system and method for voltage controlled oscillator (VCO) biasing in low voltage circuits including low resistance elements that are especially susceptible to noise. In one embodiment, a poly resistor and triode resistor is used to cancel or offset the effects that temperature variations have on the circuit. The triode resistor is powered by a voltage source that uses a pair of diodes coupled to a constant transconductance (gm) circuit to generate a reduced noise voltage that is independent of the power supply noise. The size of the triode resistor and poly resistors can be varied.
摘要翻译：一种用于低压电路中的压控振荡器（VCO）偏置的系统和方法，包括特别容易受噪声影响的低电阻元件。在一个实施例中，使用多电阻和三极管电阻来消除或抵消温度变化对电路的影响。三极管电阻由电压源供电，该电压源使用耦合到恒定跨导（gm）电路的一对二极管来产生独立于电源噪声的降低的噪声电压。三极管电阻和多个电阻的大小可以变化。

5. 发明授权

US08265201B1 Adaptive timing using clock recovery 有权
标题翻译：使用时钟恢复的自适应时序
公开(公告)号：US08265201B1
公开(公告)日：2012-09-11
申请号：US13323480
申请日：2011-12-12
申请人： Hui Wang , Yonghua Song
发明人： Hui Wang , Yonghua Song
IPC分类号： H04L27/00 , H04B1/00 , H03D3/24
CPC分类号： H04L27/0014 , H04L2027/0036 , H04L2027/0053 , H04L2027/0065 , H04L2027/0067 , H04L2027/0091
摘要： Circuits and methods are provided for adjusting a frequency of a local clock signal in approximating a frequency of a host clock signal. A phase locked loop generates a local clock signal having a first phase and a first frequency. An offset adjustment circuit receives timing information relating the local clock signal to an incoming data signal and calculates a phase offset and a frequency offset indicative of adjustments to be made to the local clock signal. A first phase interpolator generates a receive clock signal from the local clock signal, the receive clock signal having a second phase and a second frequency responsive to the phase and frequency offsets. A second phase interpolator generates a transmit clock signal from the local clock signal having a third frequency responsive to the frequency offset.
摘要翻译：提供电路和方法，用于在近似主机时钟信号的频率时调整本地时钟信号的频率。锁相环产生具有第一相位和第一频率的本地时钟信号。偏移调整电路接收与输入数据信号相关的本地时钟信号的定时信息，并计算出相应的偏移和指示对本地时钟信号进行调整的频率偏移。第一相位内插器从本地时钟信号产生接收时钟信号，接收时钟信号具有响应于相位和频率偏移的第二相位和第二频率。第二相位插值器响应于频率偏移从具有第三频率的本地时钟信号产生发送时钟信号。

6. 发明授权

US07869312B1 Calibration based DC coupled analog front end for optical storage system 有权
标题翻译：基于校准的直流耦合模拟前端用于光存储系统
公开(公告)号：US07869312B1
公开(公告)日：2011-01-11
申请号：US11755463
申请日：2007-05-30
申请人： Yingxuan Li , Fu-Tai An , Yonghua Song
发明人： Yingxuan Li , Fu-Tai An , Yonghua Song
IPC分类号： G11B7/00
CPC分类号： G11B7/0945
摘要： A driver circuit for use with a variety of OPU circuits has both a single-ended input and a differential input. The single-ended input is coupled to a single-ended signal path having a variable gain stage and a variable level shifter. The differential input is coupled to a differential signal path having a variable gain stage and a variable level shifter. The single-ended signal path and the differential signal path may be selectively coupled to an output. The respective variable gain stages and variable level shifters can be adjusted so that an output signal at the output has a desired dynamic range.
摘要翻译：与各种OPU电路一起使用的驱动电路具有单端输入和差分输入。单端输入耦合到具有可变增益级和可变电平转换器的单端信号路径。差分输入耦合到具有可变增益级和可变电平转换器的差分信号路径。单端信号路径和差分信号路径可以选择性地耦合到输出端。可以调节各个可变增益级和可变电平移位器，使得输出端的输出信号具有期望的动态范围。

7. 发明授权

US07724596B1 Auto-zero current sensing amplifier 有权
标题翻译：自动零电流检测放大器
公开(公告)号：US07724596B1
公开(公告)日：2010-05-25
申请号：US12209577
申请日：2008-09-12
申请人： Pantas Sutardja , Yonghua Song , Bo Wang , Chih-Hsin Wang , Qiang Tang
发明人： Pantas Sutardja , Yonghua Song , Bo Wang , Chih-Hsin Wang , Qiang Tang
IPC分类号： G11C7/02 , H03F3/45
CPC分类号： G11C16/28 , G11C7/062 , G11C2207/063
摘要： A sensing amplifier for a memory cell comprises a selection stage that outputs one of a reference current and a memory cell current during a first period and the other of the reference current and the memory cell current during a second period. The first period and the second period are non-overlapping. An input stage generates a first current based on the one of the reference current and the memory cell current during the first period and generates a second current based on the other of the reference current and the memory cell current during the second period. A sensing stage senses a first value based on the first current and stores the first value during the first period, senses a second value based on the second current during the second period and compares the first value to the second value.
摘要翻译：用于存储单元的感测放大器包括选择级，其在第一时段期间输出参考电流和存储单元电流之一，并且在第二时段期间输出参考电流和存储单元电流中的另一个。第一期与第二期不重叠。输入级在第一时段期间基于参考电流和存储单元电流之一产生第一电流，并且在第二周期期间基于参考电流和存储单元电流中的另一个产生第二电流。感测级基于第一电流感测第一值并且在第一周期期间存储第一值，在第二周期期间基于第二电流感测第二值，并将第一值与第二值进行比较。

8. 发明授权

US07667533B1 Self biased low noise high PSRR constant GM for VCO 失效
标题翻译：用于VCO的自偏置低噪声高PSRR常数GM
公开(公告)号：US07667533B1
公开(公告)日：2010-02-23
申请号：US11586393
申请日：2006-10-24
申请人： Chun-Geik Tan , Randy Tsang , Yonghua Song
发明人： Chun-Geik Tan , Randy Tsang , Yonghua Song
IPC分类号： G05F1/10
CPC分类号： G05F3/24 , H03L1/022 , H03L7/099
摘要： A system and method for voltage controlled oscillator (VCO) biasing in low voltage circuits including low resistance elements that are especially susceptible to noise. In one embodiment, a poly resistor and triode resistor is used to cancel or offset the effects that temperature variations have on the circuit. The triode resistor is powered by a voltage source that uses a pair of diodes coupled to a constant transconductance (gm) circuit to generate a reduced noise voltage that is independent of the power supply noise. The size of the triode resistor and poly resistors can be varied.
摘要翻译：一种低压电路中压控振荡器（VCO）偏置的系统和方法，包括特别容易受噪声影响的低电阻元件。在一个实施例中，使用多电阻和三极管电阻来消除或抵消温度变化对电路的影响。三极管电阻由电压源供电，该电压源使用耦合到恒定跨导（gm）电路的一对二极管来产生独立于电源噪声的降低的噪声电压。三极管电阻和多个电阻的大小可以变化。

9. 发明授权

US07239199B1 Amplifier calibration 有权
标题翻译：放大器校准
公开(公告)号：US07239199B1
公开(公告)日：2007-07-03
申请号：US10825781
申请日：2004-04-16
申请人： George Chien , Donghong Cui , King Chun Tsai , Yungping Hsu , Hsiao-Cheng Tang , Yonghua Song
发明人： George Chien , Donghong Cui , King Chun Tsai , Yungping Hsu , Hsiao-Cheng Tang , Yonghua Song
IPC分类号： H03F1/02
CPC分类号： H03F3/45085 , H03F3/45596 , H03F2203/45048 , H03F2203/45072 , H03F2203/45212 , H03F2203/45354 , H03F2203/45356 , H03F2203/45372 , H03F2203/45682
摘要： Apparatus, systems, and methods implementing techniques for reducing the variation of a DC offset are described. An input signal is amplified to produce an intermediate signal. The intermediate signal is processed to produce a feedback signal and an output signal, where the output signal has a DC offset that varies with a varying parameter of the circuitry used to process the intermediate signal. Variation of the DC offset of the output signal is reduced using the feedback signal. In one implementation, the circuitry used to process the intermediate signal is a variable-gain amplifier circuit, and the DC offset of the output signal varies with a gain of the variable-gain amplifier.
摘要翻译：描述了实现用于减小DC偏移的变化的技术的装置，系统和方法。输入信号被放大以产生中间信号。处理中间信号以产生反馈信号和输出信号，其中输出信号具有随着用于处理中间信号的电路的变化参数而变化的DC偏移。使用反馈信号减小输出信号的直流偏移的变化。在一个实现中，用于处理中间信号的电路是可变增益放大器电路，并且输出信号的DC偏移随可变增益放大器的增益而变化。

10. 发明授权

US09184839B1 Method and apparatus for compensating impairments in radio frequency circuitry of a wireless device 有权
标题翻译：用于补偿无线设备的射频电路中的损伤的方法和装置
公开(公告)号：US09184839B1
公开(公告)日：2015-11-10
申请号：US13566157
申请日：2012-08-03
申请人： Songping Wu , Daxiao Yu , Yonghua Song
发明人： Songping Wu , Daxiao Yu , Yonghua Song
IPC分类号： H04B10/2507 , H04B17/20
CPC分类号： H04B17/17
摘要： The present disclosure describes techniques for identity-based RF circuitry compensation. In some aspects data from a wireless device is received via radio frequency circuitry, the data including an identifier that uniquely identifies the wireless device. Impairments of the radio frequency circuitry are estimated based on the received data and then the estimated impairments are associated with the identifier of the wireless device. In response to subsequently receiving data that includes the identifier, the radio frequency circuitry is compensated using the estimated impairments.
摘要翻译：本公开描述了用于基于身份的RF电路补偿的技术。在一些方面，来自无线设备的数据经由射频电路接收，该数据包括唯一地标识无线设备的标识符。基于接收到的数据来估计射频电路的损害，然后估计的损伤与无线设备的标识符相关联。响应于随后接收包括标识符的数据，使用估计的损伤来补偿射频电路。

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