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1. 发明授权

US08552961B2 Shift register circuit 有权
标题翻译：移位寄存器电路
公开(公告)号：US08552961B2
公开(公告)日：2013-10-08
申请号：US13106873
申请日：2011-05-13
申请人： Yu-Chung Yang , Yung-Chih Chen
发明人： Yu-Chung Yang , Yung-Chih Chen
IPC分类号： G09G3/36
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/0286 , G09G2320/0252 , G11C19/184 , G11C19/287
摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a driving unit, an input unit, a driving adjustment unit and a pull-down unit. The driving unit is utilized for outputting a gate signal according to a system clock and a driving control voltage. The input unit is put in use for outputting the driving control voltage according to an input control signal and a first input signal. The driving adjustment unit is employed for adjusting the driving control voltage according to a second input signal and a third input signal. The pull-down unit is used for pulling down the gate signal and the driving control voltage according to a fourth input signal.
摘要翻译：移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。每个移位寄存器级包括驱动单元，输入单元，驱动调整单元和下拉单元。驱动单元用于根据系统时钟和驱动控制电压输出门信号。输入单元用于根据输入控制信号和第一输入信号输出驱动控制电压。驱动调整单元用于根据第二输入信号和第三输入信号调整驱动控制电压。下拉单元用于根据第四输入信号来拉下门信号和驱动控制电压。

2. 发明授权

US08396183B2 Shift register circuit 有权
标题翻译：移位寄存器电路
公开(公告)号：US08396183B2
公开(公告)日：2013-03-12
申请号：US13049863
申请日：2011-03-16
申请人： Yu-Chung Yang , Yung-Chih Chen , Kuo-Hua Hsu , Kuo-Chang Su
发明人： Yu-Chung Yang , Yung-Chih Chen , Kuo-Hua Hsu , Kuo-Chang Su
IPC分类号： G11C19/00
CPC分类号： G09G3/20 , G09G3/3674 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G11C19/28
摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.
摘要翻译：移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。每个移位寄存器级包括输入单元，上拉单元，下拉单元，控制单元和辅助下拉单元。输入单元被用于根据至少一个第一输入信号输出驱动控制电压。上拉单元根据驱动控制电压和系统时钟提取相应的门信号。下拉单元根据控制信号将相应的门信号拉低至第一电源电压。控制单元用于根据相应的门信号产生控制信号。辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。

3. 发明授权

US08363777B2 Shift register circuit 有权
标题翻译：移位寄存器电路
公开(公告)号：US08363777B2
公开(公告)日：2013-01-29
申请号：US13604632
申请日：2012-09-06
申请人： Chih-Ying Lin , Kun-Yueh Lin , Yu-Chung Yang , Kuo-Hua Hsu
发明人： Chih-Ying Lin , Kun-Yueh Lin , Yu-Chung Yang , Kuo-Hua Hsu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/0286 , G09G2330/021 , G11C19/00
摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.
摘要翻译：移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。每个移位寄存器级包括上拉单元，上拉控制单元，输入单元，第一下拉单元，第二下拉单元和下拉控制单元。上拉控制单元根据驱动控制电压和第一时钟产生第一控制信号。上拉单元根据第一控制信号上拉相应的门信号。输入单元用于根据具有与第一时钟相反的相位的第二时钟输入前一移位寄存器级的门信号以变为驱动控制电压。下拉控制单元根据驱动控制电压产生第二控制信号。第一和第二下拉单元根据第二控制信号分别下拉对应的门信号和第一控制信号。

4. 发明授权

US08284891B2 Shift register circuit 有权
公开(公告)号：US08284891B2
公开(公告)日：2012-10-09
申请号：US13468047
申请日：2012-05-10
申请人： Chih-Ying Lin , Kun-Yueh Lin , Yu-Chung Yang , Kuo-Hua Hsu
发明人： Chih-Ying Lin , Kun-Yueh Lin , Yu-Chung Yang , Kuo-Hua Hsu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/0286 , G09G2330/021 , G11C19/00
摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.

5. 发明申请

US20120051494A1 SHIFT REGISTER CIRCUIT 有权
标题翻译：移位寄存器电路
公开(公告)号：US20120051494A1
公开(公告)日：2012-03-01
申请号：US13044773
申请日：2011-03-10
申请人： Yu-Chung YANG , Yung-Chih CHEN , Chih-Ying LIN , Kun-Yueh LIN
发明人： Yu-Chung YANG , Yung-Chih CHEN , Chih-Ying LIN , Kun-Yueh LIN
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3674 , G09G3/3685 , G09G2300/0417 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G11C19/287
摘要： A shift register circuit includes a plurality of shift registers. Each of the shift registers is configured for outputting a corresponding start-pulse signal and a corresponding driving-pulse signal. Each of the shift registers includes a pull-up circuit, a first driving circuit, a second driving circuit and a discharging circuit. The pull-up circuit is configured for charging a first node. The first driving circuit is configured for generating the corresponding start-pulse signal, and the second driving circuit is configured for generating the corresponding driving-pulse signal. The discharging circuit firstly discharges the first node before discharging an output terminal of the second driving circuit.
摘要翻译：移位寄存器电路包括多个移位寄存器。每个移位寄存器被配置为输出相应的起始脉冲信号和相应的驱动脉冲信号。每个移位寄存器包括上拉电路，第一驱动电路，第二驱动电路和放电电路。上拉电路被配置为对第一节点进行充电。第一驱动电路被配置为产生相应的起始脉冲信号，并且第二驱动电路被配置为产生相应的驱动脉冲信号。在放电第二驱动电路的输出端子之前，放电电路首先对第一节点进行放电。

6. 发明申请

US20110234577A1 SHIFT REGISTER WITH LOW POWER CONSUMPTION 有权
标题翻译：具有低功耗的移位寄存器
公开(公告)号：US20110234577A1
公开(公告)日：2011-09-29
申请号：US12730576
申请日：2010-03-24
申请人： Yu-Chung Yang , Yung-Chih Chen , Chih-Ying Lin , Kuo-Hua Hsu
发明人： Yu-Chung Yang , Yung-Chih Chen , Chih-Ying Lin , Kuo-Hua Hsu
IPC分类号： G06F3/038 , G11C19/00
CPC分类号： G11C19/28 , G09G3/3677 , G09G2300/0408
摘要： A shift register comprises a plurality of stages. In one embodiment, each stage includes a first output, a second output, a pull-up circuit electrically coupled between a node and the second output, a pull-up control circuit electrically coupled to the node, a pull-down control circuit electrically coupled between the node and the first output, and a control circuit electrically coupled to the node and the first output.
摘要翻译：移位寄存器包括多个级。在一个实施例中，每个级包括第一输出，第二输出，电耦合在节点和第二输出之间的上拉电路，电耦合到该节点的上拉控制电路，电耦合的下拉控制电路在所述节点和所述第一输出之间，以及控制电路，电连接到所述节点和所述第一输出。

7. 发明授权

US08027426B1 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US08027426B1
公开(公告)日：2011-09-27
申请号：US12837244
申请日：2010-07-15
申请人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286 , G11C19/184
摘要： An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.
摘要翻译：示例性移位寄存器包括多个晶体管。对晶体管进行起始脉冲信号，第一时钟信号和第二时钟信号的控制，以产生栅极驱动信号。第一时钟信号和第二时钟信号相对于彼此相位反相。第一时钟信号的逻辑低电平和第二时钟信号的另一个逻辑低电平彼此不同。而且，晶体管是负阈值电压晶体管。在晶体管处于截止状态的情况下，每个晶体管的栅极处的电位低于晶体管的源极/漏极处的另一个电位。

8. 发明授权

US07034713B2 Autonomous and universal remote control scheme 有权
标题翻译：自主和通用遥控方案
公开(公告)号：US07034713B2
公开(公告)日：2006-04-25
申请号：US10190688
申请日：2002-07-08
申请人： Yu-Chung Yang , Fan-Tien Cheng
发明人： Yu-Chung Yang , Fan-Tien Cheng
IPC分类号： H04Q1/00
CPC分类号： G08C19/28 , G08C2201/92
摘要： An autonomous and universal remote control system and scheme is disclosed. The autonomous and universal remote control system comprises at least one generic embedded controller (GEC) respectively installed on at least one controlled target, such as appliances, robots and equipment, etc.; and a generic remote controller (GRC), wherein the at least one GEC matches with the GRC. The autonomous and universal remote control scheme utilizes the GRC to sense the type of the at least one controlled target automatically, and then to download the context of controlled target dynamically, thereby autonomously controlling the controlled targets of various types with one single GRC.
摘要翻译：公开了一种自主和通用的遥控系统和方案。自主通用遥控系统包括分别安装在至少一个受控对象上的至少一个通用嵌入式控制器（GEC），例如电器，机器人和设备等; 和通用遥控器（GRC），其中至少一个GEC与GRC匹配。自主和通用的遥控方案利用GRC自动检测至少一个受控对象的类型，然后动态下载受控对象的上下文，从而通过一个单独的GRC自动控制各种类型的受控对象。

9. 发明授权

US5700664A Mammalian cytokine, IL-11 失效
标题翻译：哺乳动物细胞因子，IL-11
公开(公告)号：US5700664A
公开(公告)日：1997-12-23
申请号：US949516
申请日：1992-11-19
申请人： Yu-Chung Yang , Frances K. Bennett , Stephan R. Paul
发明人： Yu-Chung Yang , Frances K. Bennett , Stephan R. Paul
IPC分类号： A61K38/00 , A61K38/20 , A61K38/21 , A61P7/00 , A61P37/04 , C07H21/04 , C07K14/00 , C07K14/435 , C07K14/52 , C07K14/54 , C12N1/21 , C12N5/10 , C12N15/09 , C12N15/24 , C12P21/02 , C12R1/19 , C12R1/91
CPC分类号： A61K38/2073 , C07K14/5431 , Y10S514/885 , Y10S514/887
摘要： A novel mammalian cytokine, IL-11, and processes for producing it are disclosed. IL-11 may be used in pharmaceutical preparations for stimulating and/or enhancing cells involved in the immune response and cells involved in the proper functioning of the hematopoietic system.
摘要翻译： PCT No.PCT / US90 / 06803 Sec。 371日期：1992年11月19日 102（e）1992年11月19日PCT PCT 1990年11月20日PCT公布。出版物WO91 / 07495 日期1991年5月30日公开了一种新型哺乳动物细胞因子IL-11及其生产方法。 IL-11可用于刺激和/或增强涉及免疫应答的细胞和参与造血系统正常功能的细胞的药物制剂中。

10. 发明授权

US5580753A DNA encoding the human cytokine, interleukin-9 失效
标题翻译：编码人细胞因子的DNA，白细胞介素-9
公开(公告)号：US5580753A
公开(公告)日：1996-12-03
申请号：US515308
申请日：1990-04-27
申请人： Yu-Chung Yang , Agnes B. Ciarletta , Susan T. Ricciardi , Steven C. Clark , Robert E. Donahue
发明人： Yu-Chung Yang , Agnes B. Ciarletta , Susan T. Ricciardi , Steven C. Clark , Robert E. Donahue
IPC分类号： A61K38/00 , A61K38/22 , A61P7/00 , A61P7/06 , A61P35/00 , A61P43/00 , C07K14/00 , C07K14/435 , C07K14/505 , C07K14/52 , C07K14/525 , C07K14/53 , C07K14/535 , C07K14/54 , C07K14/545 , C07K14/55 , C07K16/00 , C12N1/21 , C12N5/10 , C12N15/09 , C12N15/24 , C12P21/02 , C12P21/08 , C12R1/91 , C07K15/28 , A61K45/05 , C07H21/04
CPC分类号： C07K14/5425 , A61K38/00
摘要： The invention involves DNA molecules which encode a human protein of 144 amino acids, referred to as interleukin-9, or IL-9. The protein is an erythropoietic growth factor. Also disclosed are processes for producing the IL-9 protein via genetic engineering techniques.
摘要翻译：本发明涉及编码144个氨基酸的人蛋白质的DNA分子，称为白细胞介素-9或IL-9。蛋白质是红细胞生长因子。还公开了通过遗传工程技术生产IL-9蛋白的方法。

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