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1. 发明授权

US08835267B2 Semiconductor device and fabrication method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08835267B2
公开(公告)日：2014-09-16
申请号：US13248319
申请日：2011-09-29
申请人： Yen-Ru Lee , Ming-Hua Yu , Tze-Liang Lee , Chii-Horng Li , Pang-Yen Tsai , Lilly Su , Yi-Hung Lin , Yu-Hung Cheng
发明人： Yen-Ru Lee , Ming-Hua Yu , Tze-Liang Lee , Chii-Horng Li , Pang-Yen Tsai , Lilly Su , Yi-Hung Lin , Yu-Hung Cheng
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/8238 , H01L29/78 , H01L29/66
CPC分类号： H01L29/7848 , H01L21/02532 , H01L21/0262 , H01L21/02661 , H01L21/30604 , H01L21/30608 , H01L21/3065 , H01L21/3083 , H01L21/823412 , H01L21/823418 , H01L21/823425 , H01L21/823481 , H01L21/823807 , H01L21/823814 , H01L21/823878 , H01L29/045 , H01L29/0653 , H01L29/0847 , H01L29/66545 , H01L29/66636 , H01L29/7845 , H01L29/7846
摘要： A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of a substrate to enhance carrier mobility and upgrade the device performance. In an embodiment, the improved formation method is achieved using an etching process to redistribute the strained material by removing at least a portion of the corner to be located in the cavity.
摘要翻译：公开了一种制造半导体器件的方法。应变材料形成在衬底的空腔中并与衬底中的隔离结构相邻。应变材料在基底表面上方有一角。所公开的方法提供了一种用于形成邻近隔离结构的应变材料的改进方法，其中衬底的腔中具有增加的部分，以增强载体移动性并提高器件性能。在一个实施例中，改进的形成方法是通过使用蚀刻工艺来实现的，该蚀刻工艺通过去除位于空腔中的角部的至少一部分来重新分布应变材料。

2. 发明授权

US08446126B2 Power bank apparatus with speaker 有权
标题翻译：电源设备带扬声器
公开(公告)号：US08446126B2
公开(公告)日：2013-05-21
申请号：US12849910
申请日：2010-08-04
申请人： Yu-Hung Cheng
发明人： Yu-Hung Cheng
IPC分类号： H02J7/00 , H04R5/02
CPC分类号： H02J7/0011 , H04R1/028 , H04R2205/021
摘要： A power bank apparatus with speaker combines the function of power bank and the function of speaker. The power bank apparatus not only charges the portable electronic apparatuses but also supplies power to the internal speaker. The voice or music of the portable electronic apparatus is amplified by the speaker of the power bank apparatus to improve the quality of the voice or music.
摘要翻译：带扬声器的电源设备结合了电源的功能和扬声器的功能。动力储存装置不仅对便携式电子装置进行充电，而且向内部扬声器供电。便携式电子设备的语音或音乐由电力银行设备的扬声器放大，以提高语音或音乐的质量。

3. 发明授权

US08377784B2 Method for fabricating a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08377784B2
公开(公告)日：2013-02-19
申请号：US12765331
申请日：2010-04-22
申请人： Yu-Hung Cheng , Jhi-Cherng Lu , Ming-Hua Yu , Chii-Horng Li , Tze-Liang Lee
发明人： Yu-Hung Cheng , Jhi-Cherng Lu , Ming-Hua Yu , Chii-Horng Li , Tze-Liang Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/20 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/02636 , H01L21/3065 , H01L21/823412 , H01L21/823425 , H01L21/823807 , H01L21/823814 , H01L29/66477 , H01L29/7848
摘要： The present disclosure discloses an exemplary method for fabricating a semiconductor device comprises selectively growing a material on a top surface of a substrate; selectively growing a protection layer on the material; and removing a portion of the protection layer in an etching gas.
摘要翻译：本公开公开了一种用于制造半导体器件的示例性方法，包括在衬底的顶表面上选择性地生长材料; 在材料上选择性地生长保护层; 以及在蚀刻气体中去除所述保护层的一部分。

4. 发明申请

US20090013092A1 Method for virtual COM port modbus gateway ethernet I/O 审中-公开
标题翻译：虚拟COM端口modbus网关以太网I / O的方法
公开(公告)号：US20090013092A1
公开(公告)日：2009-01-08
申请号：US12230476
申请日：2008-08-29
申请人： Yi-Ming Pao , Yu-Hung Cheng
发明人： Yi-Ming Pao , Yu-Hung Cheng
IPC分类号： G06F15/173
CPC分类号： G06F13/385
摘要： A virtual COM port for Modbus gateway Ethernet I/O includes a host terminal, and an I/O controller connected to the host terminal through a network. The host terminal and the I/O controller comprise a first virtual COM port and a second virtual COM port respectively. When transmitting or receiving commands or data, the first virtual COM port of the host terminal and the second virtual COM port of the I/O controller convert the commands or data between the Modbus/RTU format and the Modbus/TCP format. Therefore, a user just downloads the first virtual COM port and the second virtual COM port or externally connects the first virtual COM port and the second virtual COM port to the host terminal and the I/O controller. Accordingly, the maintenance can be simple and carried out easily.
摘要翻译：用于Modbus网关以太网I / O的虚拟COM端口包括主机终端和通过网络连接到主机终端的I / O控制器。主机终端和I / O控制器分别包括第一虚拟COM端口和第二虚拟COM端口。当发送或接收命令或数据时，主机终端的第一个虚拟COM端口和I / O控制器的第二个虚拟COM端口将Modbus / RTU格式和Modbus / TCP格式之间的命令或数据进行转换。因此，用户只需下载第一个虚拟COM端口和第二个虚拟COM端口，或者将第一个虚拟COM端口和第二个虚拟COM端口外部连接到主机终端和I / O控制器。因此，维护可以简单且容易地进行。

5. 发明申请

US20060256076A1 Interactive system with movement sensing capability 审中-公开
标题翻译：具有移动感测功能的交互式系统
公开(公告)号：US20060256076A1
公开(公告)日：2006-11-16
申请号：US11190133
申请日：2005-07-27
申请人： Shun-Nan Liou , Ming-Jye Tsai , Yu-Hung Cheng , Ying-Ko Lu , Hsiang-Yu Huang , Yung-Yu Chen
发明人： Shun-Nan Liou , Ming-Jye Tsai , Yu-Hung Cheng , Ying-Ko Lu , Hsiang-Yu Huang , Yung-Yu Chen
IPC分类号： G09G5/00
CPC分类号： G06F3/011 , G06F3/0346
摘要： An interactive system with movement sensing capability, comprising: an inertial sensing unit disposed on a movable object so as to sense a movement of the movable object and generate a corresponding signal; a control unit connected to the inertial sensing unit so as to transmit the signal; and a multi-media unit receiving the signal so as to display a corresponding first image and a second image interacted with the first image.
摘要翻译：一种具有移动感测能力的交互式系统，包括：惯性感测单元，设置在可移动物体上，以便感测可移动物体的移动并产生相应的信号; 连接到所述惯性感测单元以传送所述信号的控制单元; 以及多媒体单元，其接收所述信号，以便显示与所述第一图像相互作用的对应的第一图像和第二图像。

6. 发明授权

US08828850B2 Reducing variation by using combination epitaxy growth 有权
标题翻译：通过组合外延生长减少变异
公开(公告)号：US08828850B2
公开(公告)日：2014-09-09
申请号：US13030850
申请日：2011-02-18
申请人： Yu-Hung Cheng , Chii-Horng Li , Tze-Liang Lee , Yi-Hung Lin
发明人： Yu-Hung Cheng , Chii-Horng Li , Tze-Liang Lee , Yi-Hung Lin
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L29/66636 , H01L21/02532 , H01L21/02573 , H01L21/0262 , H01L21/02636 , H01L21/02639 , H01L29/0847 , H01L29/7848
摘要： A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio.
摘要翻译：一种用于形成半导体结构的方法包括在晶片上的半导体衬底上形成栅叠层; 在所述半导体衬底中形成凹槽并邻近所述栅叠层; 以及进行选择性外延生长以在所述凹部中生长半导体材料以形成外延区域。执行选择性外延生长的步骤包括以第一生长阶段中使用的工艺气体的第一生长蚀刻（E / G）比率进行第一生长阶段; 以及在与第一E / G比不同的第二生长阶段中使用的处理气体的第二E / G比进行第二生长阶段。

7. 发明授权

US08455930B2 Strained semiconductor device with facets 有权
标题翻译：应变半导体器件与面
公开(公告)号：US08455930B2
公开(公告)日：2013-06-04
申请号：US12984877
申请日：2011-01-05
申请人： Yu-Hung Cheng , Chii-Horng Li , Tze-Liang Lee
发明人： Yu-Hung Cheng , Chii-Horng Li , Tze-Liang Lee
IPC分类号： H01L27/085
CPC分类号： H01L29/66636 , H01L21/0243 , H01L21/02532 , H01L21/0262 , H01L21/823412 , H01L21/823418 , H01L21/823481 , H01L21/823807 , H01L21/823814 , H01L21/823878 , H01L29/78 , H01L29/7848
摘要： A semiconductor device having a substrate including a major surface, a gate stack comprising a sidewall over the substrate and a spacer over the substrate adjoining the sidewall of the gate stack. The spacer having a bottom surface having an outer point that is the point on the bottom surface farthest from the gate stack. An isolation structure in the substrate on one side of the gate stack has an outer edge closest to the spacer. A strained material below the major surface of the substrate disposed between the spacer and the isolation structure having an upper portion and a lower portion separated by a transition plane at an acute angle to the major surface of the substrate.
摘要翻译：一种具有包括主表面的衬底的半导体器件，包括在衬底上的侧壁的栅极堆叠以及与栅极堆叠的侧壁相邻的衬底上的间隔物。该间隔件具有底表面，该外表面是位于最远离该栅极叠层的底表面上的点。在栅极堆叠的一侧上的衬底中的隔离结构具有最靠近间隔物的外边缘。位于衬垫的主表面之下的应变材料设置在间隔件和隔离结构之间，该上表面和隔离结构具有与衬底的主表面成锐角的过渡面分开的上部和下部。

8. 发明授权

US08530316B2 Method for fabricating a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08530316B2
公开(公告)日：2013-09-10
申请号：US13736453
申请日：2013-01-08
申请人： Yu-Hung Cheng , Jhi-Cherng Lu , Ming-Hua Yu , Chii-Horng Li , Tze-Liang Lee
发明人： Yu-Hung Cheng , Jhi-Cherng Lu , Ming-Hua Yu , Chii-Horng Li , Tze-Liang Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/20 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/02636 , H01L21/3065 , H01L21/823412 , H01L21/823425 , H01L21/823807 , H01L21/823814 , H01L29/66477 , H01L29/7848
摘要： A method for fabricating a semiconductor device, the method including growing a first semiconductor structure comprising a first semiconductor material on a surface of a substrate, wherein growing the first semiconductor structure includes forming a semiconductor particle comprising the first semiconductor material on a second semiconductor structure of the semiconductor device. The method further includes forming a protection layer of a second semiconductor material on the first semiconductor structure, wherein forming the protection layer includes forming the protection layer on the semiconductor particle. The method further includes removing a portion of the protection layer, wherein removing the portion of the protection layer includes fully removing the protection layer on the semiconductor particle and the semiconductor particle.
摘要翻译：一种制造半导体器件的方法，所述方法包括在衬底的表面上生长包括第一半导体材料的第一半导体结构，其中生长第一半导体结构包括在第二半导体结构的第二半导体结构上形成包含第一半导体材料的半导体粒子半导体器件。该方法还包括在第一半导体结构上形成第二半导体材料的保护层，其中形成保护层包括在半导体颗粒上形成保护层。该方法还包括去除保护层的一部分，其中去除保护层的部分包括完全去除半导体颗粒和半导体颗粒上的保护层。

9. 发明申请

US20120319475A1 CONNECTION BASE AND ELECTRIC POWER INTEGRATION APPARATUS HAVING THE SAME 审中-公开
标题翻译：连接基座和电力整合装置
公开(公告)号：US20120319475A1
公开(公告)日：2012-12-20
申请号：US13164342
申请日：2011-06-20
申请人： YU-HUNG CHENG
发明人： YU-HUNG CHENG
IPC分类号： H02J5/00 , H02J9/06
CPC分类号： H02J7/0027 , H02J7/0013 , H02J7/0044 , Y10T307/313 , Y10T307/625
摘要： A connection base is disclosed. The connection base includes a first connection port, a second connection port, a charging unit, a first electric power conversion unit, and a second electric power conversion unit. The first electric power conversion unit is for converting an input voltage to a first output voltage, and for transmitting the first output voltage to the charging unit. The charging unit is for receiving the first output voltage and outputting a charging voltage, in order to charge the electric power bank device which is detachably connected to the first connection port. The second electric power conversion unit is for receiving and converting a second output voltage of the electric power bank device to a supply voltage, and sending the supply voltage to the inverter which is detachably connected to the second connection port.
摘要翻译：公开了连接基座。连接基座包括第一连接端口，第二连接端口，充电单元，第一电力转换单元和第二电力转换单元。第一电力转换单元用于将输入电压转换为第一输出电压，并将第一输出电压发送到充电单元。充电单元用于接收第一输出电压并输出充电电压，以便对可拆卸地连接到第一连接端口的电力库装置进行充电。第二电力转换单元用于接收并将电力储存装置的第二输出电压转换为电源电压，并将电源电压发送到可拆卸地连接到第二连接端口的逆变器。

10. 发明申请

US20120168821A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120168821A1
公开(公告)日：2012-07-05
申请号：US12984877
申请日：2011-01-05
申请人： Yu-Hung CHENG , Chii-Horng LI , Tze-Liang LEE
发明人： Yu-Hung CHENG , Chii-Horng LI , Tze-Liang LEE
IPC分类号： H01L29/38 , H01L21/336
CPC分类号： H01L29/66636 , H01L21/0243 , H01L21/02532 , H01L21/0262 , H01L21/823412 , H01L21/823418 , H01L21/823481 , H01L21/823807 , H01L21/823814 , H01L21/823878 , H01L29/78 , H01L29/7848
摘要： A semiconductor device having a substrate including a major surface, a gate stack comprising a sidewall over the substrate and a spacer over the substrate adjoining the sidewall of the gate stack. The spacer having a bottom surface having an outer point that is the point on the bottom surface farthest from the gate stack. An isolation structure in the substrate on one side of the gate stack has an outer edge closest to the spacer. A strained material below the major surface of the substrate disposed between the spacer and the isolation structure having an upper portion and a lower portion separated by a transition plane at an acute angle to the major surface of the substrate.
摘要翻译：一种具有包括主表面的衬底的半导体器件，包括在衬底上的侧壁的栅极堆叠以及与栅极堆叠的侧壁相邻的衬底上的间隔物。该间隔件具有底表面，该外表面是位于最远离该栅极叠层的底表面上的点。在栅极堆叠的一侧上的衬底中的隔离结构具有最靠近间隔物的外边缘。位于衬垫的主表面之下的应变材料设置在间隔件和隔离结构之间，该上表面和隔离结构具有与衬底的主表面成锐角的过渡面分开的上部和下部。

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