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    • 4. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US08338895B2
    • 2012-12-25
    • US12687269
    • 2010-01-14
    • Zhengwu Jin
    • Zhengwu Jin
    • H01L21/70
    • H01L21/823807H01L29/7843
    • A semiconductor device includes a first insulated-gate field-effect transistor which is disposed on a semiconductor substrate having an element formation plane in a (110) plane direction, and which has a channel length direction in a direction, a second insulated-gate field-effect transistor which is disposed on the semiconductor substrate, has a channel length direction in the direction, and neighbors the first insulated-gate field-effect transistor in the channel length direction, and a first liner insulation film which is provided in a manner to cover the first and second insulated-gate field-effect transistors, the first liner insulation film including a piezomaterial, having a positive expansion coefficient, and applying a compressive stress by operation heat to the first and second insulated-gate field-effect transistors in the channel length direction.
    • 半导体器件包括:第一绝缘栅场效应晶体管,其设置在具有沿(110)面方向的元件形成面的半导体基板上,并且具有<-110>方向的沟道长度方向,第二绝缘栅场效应晶体管 设置在半导体基板上的绝缘栅场效应晶体管具有沿<-110>方向的沟道长度方向,并且在沟道长度方向上与第一绝缘栅场效应晶体管相邻,并且第一衬垫绝缘 膜,其以覆盖第一和第二绝缘栅场效应晶体管的方式设置,第一衬垫绝缘膜包括具有正膨胀系数的压电材料,并且通过操作热施加压缩应力到第一和第二绝缘 - 栅极场效应晶体管的沟道长度方向。
    • 10. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20100176457A1
    • 2010-07-15
    • US12687269
    • 2010-01-14
    • Zhengwu Jin
    • Zhengwu Jin
    • H01L27/092H01L21/8238
    • H01L21/823807H01L29/7843
    • A semiconductor device includes a first insulated-gate field-effect transistor which is disposed on a semiconductor substrate having an element formation plane in a (110) plane direction, and which has a channel length direction in a direction, a second insulated-gate field-effect transistor which is disposed on the semiconductor substrate, has a channel length direction in the direction, and neighbors the first insulated-gate field-effect transistor in the channel length direction, and a first liner insulation film which is provided in a manner to cover the first and second insulated-gate field-effect transistors, the first liner insulation film including a piezomaterial, having a positive expansion coefficient, and applying a compressive stress by operation heat to the first and second insulated-gate field-effect transistors in the channel length direction.
    • 半导体器件包括:第一绝缘栅场效应晶体管,其设置在具有沿(110)面方向的元件形成面的半导体基板上,并且具有<-110>方向的沟道长度方向,第二绝缘栅场效应晶体管 设置在半导体基板上的绝缘栅场效应晶体管具有沿<-110>方向的沟道长度方向,并且在沟道长度方向上与第一绝缘栅场效应晶体管相邻,并且第一衬垫绝缘 膜,其以覆盖第一和第二绝缘栅场效应晶体管的方式设置,第一衬垫绝缘膜包括具有正膨胀系数的压电材料,并且通过操作热施加压缩应力到第一和第二绝缘 - 栅极场效应晶体管的沟道长度方向。