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1. 发明授权

US08594609B2 Drain-pumped sub-harmonic mixer for millimeter wave applications 有权
标题翻译：用于毫米波应用的排水泵子谐波混合器
公开(公告)号：US08594609B2
公开(公告)日：2013-11-26
申请号：US13046377
申请日：2011-03-11
申请人： Alberto Valdes Garcia , Chinmaya Mishra , Scott Kevin Reynolds
发明人： Alberto Valdes Garcia , Chinmaya Mishra , Scott Kevin Reynolds
IPC分类号： H04B1/26 , H03D7/14 , H04B1/30
CPC分类号： H03D7/1441 , H03D7/1475 , H03D7/1491 , H03D2200/0007 , H03D2200/0043 , H03D2200/0084 , H04B1/30
摘要： A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously.
摘要翻译：子谐波混合器包括具有源极和漏极的第一晶体管和具有连接到第一晶体管的源极的源极和连接到第一晶体管的漏极的漏极的第二晶体管。混合晶体管被配置为在线性工作区域中偏置。混合晶体管包括耦合到第一晶体管和第二晶体管的源极的漏极。混合晶体管的漏极由本地振荡器（LO）频率的两倍的信号驱动，其栅极由射频（RF）信号驱动，而混合晶体管被偏置在线性区域中，使得频率倍增和混合的过程同时进行。

2. 发明授权

US07962114B2 Drain-pumped sub-harmonic mixer for millimeter wave applications 有权
标题翻译：用于毫米波应用的排水泵子谐波混合器
公开(公告)号：US07962114B2
公开(公告)日：2011-06-14
申请号：US11622812
申请日：2007-01-12
申请人： Alberto Valdes Garcia , Chinmaya Mishra , Scott Kevin Reynolds
发明人： Alberto Valdes Garcia , Chinmaya Mishra , Scott Kevin Reynolds
IPC分类号： H04B1/26
CPC分类号： H03D7/1441 , H03D7/1475 , H03D7/1491 , H03D2200/0007 , H03D2200/0043 , H03D2200/0084 , H04B1/30
摘要： A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously.
摘要翻译：子谐波混合器包括具有源极和漏极的第一晶体管和具有连接到第一晶体管的源极的源极和连接到第一晶体管的漏极的漏极的第二晶体管。混合晶体管被配置为在线性工作区域中偏置。混合晶体管包括耦合到第一晶体管和第二晶体管的源极的漏极。混合晶体管的漏极由本地振荡器（LO）频率的两倍的信号驱动，其栅极由射频（RF）信号驱动，而混合晶体管被偏置在线性区域中，使得频率倍增和混合的过程同时进行。

3. 发明申请

US20080169859A1 DRAIN-PUMPED SUB-HARMONIC MIXER FOR MILLIMETER WAVE APPLICATIONS 有权
标题翻译：用于MILLIMETER WAVE应用的排水辅助谐波混合器
公开(公告)号：US20080169859A1
公开(公告)日：2008-07-17
申请号：US11622812
申请日：2007-01-12
申请人： ALBERTO VALDES GARCIA , Chinmaya Mishra , Scott Kevin Reynolds
发明人： ALBERTO VALDES GARCIA , Chinmaya Mishra , Scott Kevin Reynolds
IPC分类号： H03D7/12 , G06G7/12
CPC分类号： H03D7/1441 , H03D7/1475 , H03D7/1491 , H03D2200/0007 , H03D2200/0043 , H03D2200/0084 , H04B1/30
摘要： A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously.
摘要翻译：子谐波混合器包括具有源极和漏极的第一晶体管和具有连接到第一晶体管的源极的源极和连接到第一晶体管的漏极的漏极的第二晶体管。混合晶体管被配置为在线性工作区域中偏置。混合晶体管包括耦合到第一晶体管和第二晶体管的源极的漏极。混合晶体管的漏极由本地振荡器（LO）频率的两倍的信号驱动，其栅极由射频（RF）信号驱动，而混合晶体管被偏置在线性区域中，使得频率倍增和混合的过程同时进行。

4. 发明授权

US07199658B2 Circuits and methods for implementing power amplifiers for millimeter wave applications 有权
标题翻译：用于实现毫米波应用的功率放大器的电路和方法
公开(公告)号：US07199658B2
公开(公告)日：2007-04-03
申请号：US11131534
申请日：2005-05-18
申请人： Brian A. Floyd , Alberto Valdes Garcia , Ullrich R. Pfeiffer , Scott Kevin Reynolds
发明人： Brian A. Floyd , Alberto Valdes Garcia , Ullrich R. Pfeiffer , Scott Kevin Reynolds
IPC分类号： H03F3/217
CPC分类号： H03F3/2176 , H03F2200/222 , H03F2200/318 , H03F2200/411 , H03F2200/451 , H03F2200/75
摘要： Circuits and methods are provided for implementing highly efficient switch-mode power amplifiers using BJTs (bipolar junction transistors) as active switching devices at millimeter-wave frequencies. More specifically, circuits and methods are provided for driving power amplifiers with BJT switching devices to achieve highly efficient switch-mode (e.g., Class E) operation at millimeter wave frequencies (e.g., 60 GHz).
摘要翻译：提供了使用BJT（双极结型晶体管）作为毫米波频率的有源开关器件实现高效开关模式功率放大器的电路和方法。更具体地，提供电路和方法来驱动具有BJT开关器件的功率放大器，以实现在毫米波频率（例如，60GHz）下的高效开关模式（例如E类）操作。

5. 发明申请

US20100102895A1 QUADRATURE MODULATION CIRCUITS AND SYSTEMS SUPPORTING MULTIPLE MODULATION MODES AT GIGABIT DATA RATES 有权
标题翻译：支持数字数据速率的多种调制模式的调制电路和系统
公开(公告)号：US20100102895A1
公开(公告)日：2010-04-29
申请号：US11486539
申请日：2006-07-14
申请人： Troy James Beukema , Alberto Valdes Garcia , Scott Kevin Reynolds
发明人： Troy James Beukema , Alberto Valdes Garcia , Scott Kevin Reynolds
IPC分类号： H04L27/20
CPC分类号： H04L27/0008 , H04L27/04 , H04L27/2014 , H04L27/2057 , H04L27/206 , H04L27/362
摘要： Quadrature modulation systems, circuits and methods are provided to support various modulation modes including ASK (amplitude shift key), FSK (frequency shift key) and PSK (phase shift key) modulation at high data rates (e.g., gigabit data rates). For example, a modulation circuit includes a mixer circuit including an integrated sign modulation control circuit and a plurality of mixer ports. The mixer ports include a first input port, a second input port, an output port and a sign modulation control port. The modulation circuit generates a modulated signal by operation of the mixer circuit multiplying a modulating signal applied to the first input port with a carrier signal applied to the second input port to generate a mixed signal output from the output port, and by operation of the integrated sign modulation control circuit controlling polarity switching of a signal at one of the mixer ports in response to a sign modulation control signal input to the sign modulation control port. The sign modulation control signal can be a digital data signal having binary data encoded into the modulated signal.
摘要翻译：提供正交调制系统，电路和方法以支持在高数据速率（例如，千兆比特数据速率）下的ASK（振幅移位键），FSK（频移键）和PSK（相移键）调制的各种调制模式。例如，调制电路包括具有集成符号调制控制电路和多个混频器端口的混频电路。混频器端口包括第一输入端口，第二输入端口，输出端口和符号调制控制端口。调制电路通过使施加到第一输入端口的调制信号与施加到第二输入端口的载波信号相乘的混频器电路的操作产生调制信号，以产生从输出端口输出的混合信号，并且通过集成符号调制控制电路，响应于输入到符号调制控制端口的符号调制控制信号，控制混频器端口之一处的信号的极性切换。符号调制控制信号可以是具有被编码为调制信号的二进制数据的数字数据信号。

6. 发明授权

US08482364B2 Differential cross-coupled power combiner or divider 有权
标题翻译：差分交叉耦合功率组合器或分压器
公开(公告)号：US08482364B2
公开(公告)日：2013-07-09
申请号：US12788910
申请日：2010-05-27
申请人： Brian Allan Floyd , Arun Sridhar Natarajan , Scott Kevin Reynolds , Mehmet Soyuer , Alberto Valdes Garcia
发明人： Brian Allan Floyd , Arun Sridhar Natarajan , Scott Kevin Reynolds , Mehmet Soyuer , Alberto Valdes Garcia
IPC分类号： H01P5/12
CPC分类号： H01P5/16
摘要： A differential cross-coupled power combiner in one aspect comprises a plurality of inputs, an output, a plurality of differential transmission lines each coupled between a corresponding one of the inputs and the output, and at least one set of additional differential transmission lines arranged in series between any two of the inputs. First and second ones of the additional differential transmission lines in the set are coupled to one another using a cross-coupling arrangement. Other aspects of the invention provide a differential cross-coupled power divider, communication system receivers and transmitters incorporating respective power combiners and dividers, and integrated circuit implementations of power combiners and dividers.
摘要翻译：差分交叉耦合功率组合器在一个方面包括多个输入，输出，多个差分传输线，每个差分传输线分别耦合在相应的一个输入端和输出端之间，以及至少一组附加差分传输线路，其布置在任何两个输入之间的串联。组中的第一和第二附加差动传输线使用交叉耦合装置彼此耦合。本发明的其它方面提供了差分交叉耦合功率分配器，包括各个功率组合器和分频器的通信系统接收器和发射器以及功率组合器和分频器的集成电路实现。

7. 发明申请

US20110063048A1 Differential Cross-Coupled Power Combiner or Divider 有权
标题翻译：差分交叉耦合功率组合器或分频器
公开(公告)号：US20110063048A1
公开(公告)日：2011-03-17
申请号：US12788910
申请日：2010-05-27
申请人： Brian Allan Floyd , Arun Sridhar Natarajan , Scott Kevin Reynolds , Mehmet Soyuer , Alberto Valdes Garcia
发明人： Brian Allan Floyd , Arun Sridhar Natarajan , Scott Kevin Reynolds , Mehmet Soyuer , Alberto Valdes Garcia
IPC分类号： H01P5/12
CPC分类号： H01P5/16
摘要： A differential cross-coupled power combiner in one aspect comprises a plurality of inputs, an output, a plurality of differential transmission lines each coupled between a corresponding one of the inputs and the output, and at least one set of additional differential transmission lines arranged in series between any two of the inputs. First and second ones of the additional differential transmission lines in the set are coupled to one another using a cross-coupling arrangement. Other aspects of the invention provide a differential cross-coupled power divider, communication system receivers and transmitters incorporating respective power combiners and dividers, and integrated circuit implementations of power combiners and dividers.
摘要翻译：差分交叉耦合功率组合器在一个方面包括多个输入，输出，多个差分传输线，每个差分传输线分别耦合在相应的一个输入端和输出端之间，以及至少一组附加差分传输线路，其布置在任何两个输入之间的串联。组中的第一和第二附加差动传输线使用交叉耦合装置彼此耦合。本发明的其它方面提供了差分交叉耦合功率分配器，包括各个功率组合器和分频器的通信系统接收器和发射器以及功率组合器和分频器的集成电路实现。

8. 发明授权

US07733980B2 Quadrature modulation circuits and systems supporting multiple modulation modes at gigabit data rates 有权
标题翻译：正交调制电路和系统以千兆位数据速率支持多种调制模式
公开(公告)号：US07733980B2
公开(公告)日：2010-06-08
申请号：US11486539
申请日：2006-07-14
申请人： Troy James Beukema , Alberto Valdes Garcia , Scott Kevin Reynolds
发明人： Troy James Beukema , Alberto Valdes Garcia , Scott Kevin Reynolds
IPC分类号： H03C1/52
CPC分类号： H04L27/0008 , H04L27/04 , H04L27/2014 , H04L27/2057 , H04L27/206 , H04L27/362
摘要： A quadrature modulation circuit includes a mixer circuit including an integrated sign modulation control circuit and a plurality of mixer ports. The mixer ports include a first input port, a second input port, an output port and a sign modulation control port. The modulation circuit generates a modulated signal by operation of the mixer circuit multiplying a modulating signal applied to the first input port with a carrier signal applied to the second input port to generate a mixed signal output from the output port, and by operation of the integrated sign modulation control circuit controlling polarity switching of a signal at one of the mixer ports in response to a sign modulation control signal input to the sign modulation control port.
摘要翻译：正交调制电路包括具有集成符号调制控制电路和多个混频器端口的混频电路。混频器端口包括第一输入端口，第二输入端口，输出端口和符号调制控制端口。调制电路通过使施加到第一输入端口的调制信号与施加到第二输入端口的载波信号相乘的混频器电路的操作产生调制信号，以产生从输出端口输出的混合信号，并且通过集成符号调制控制电路，响应于输入到符号调制控制端口的符号调制控制信号，控制混频器端口之一处的信号的极性切换。

9. 发明授权

US07825741B2 Frequency multipliers using multi-phase oscillation 有权
标题翻译：使用多相振荡的频率乘法器
公开(公告)号：US07825741B2
公开(公告)日：2010-11-02
申请号：US12127389
申请日：2008-05-27
申请人： Scott Kevin Reynolds , Mehmet Soyuer , Chinmaya Mishra
发明人： Scott Kevin Reynolds , Mehmet Soyuer , Chinmaya Mishra
IPC分类号： H03K3/03
CPC分类号： H03F3/16 , G06F17/5063 , H03F3/72 , H03G1/0088
摘要： A method of generating an output signal from an input signal includes a step of generating a set of n signals, n being an integer greater than or equal to 3, by generating a signal for each integer i such that 0≦i≦(n−1), each signal within the set having the same frequency and approximately equal amplitude and a phase equal to (360/n)i degrees. The method also includes a step of inputting each of the set of n signals to a gate terminal of a corresponding one of a set of n transistors. Each of the transistors has a source terminal electrically connected to a common voltage drain and each of the transistors has a drain terminal electrically connected to a coupling. The coupling is electrically connected to a common voltage source. The output signal at the coupling has a frequency equal to the frequency of the input signal multiplied by n.
摘要翻译：一种从输入信号生成输出信号的方法包括：通过为每个整数i产生一个信号，产生一组n个信号，n为大于或等于3的整数，使得0＆nlE; i＆nlE;（n- 1）中，组内的每个信号具有相同的频率和近似相等的幅度以及等于（360 / n）i度的相位。该方法还包括将n组信号中的每一个输入到一组n个晶体管中的相应一个的栅极端的步骤。每个晶体管具有电连接到公共电压漏极的源极端子，并且每个晶体管具有电连接到耦合器的漏极端子。耦合电连接到公共电压源。耦合时的输出信号的频率等于输入信号乘以n的频率。

10. 发明申请

US20090051394A1 Frequency Multipliers Using Multi-Phase Oscillation 有权
标题翻译：使用多相振荡的频率乘数
公开(公告)号：US20090051394A1
公开(公告)日：2009-02-26
申请号：US12127389
申请日：2008-05-27
申请人： Scott Kevin Reynolds , Mehmet Soyuer , Chinmaya Mishra
发明人： Scott Kevin Reynolds , Mehmet Soyuer , Chinmaya Mishra
IPC分类号： H03B19/00 , G06F17/50
CPC分类号： H03F3/16 , G06F17/5063 , H03F3/72 , H03G1/0088
摘要： A method of generating an output signal from an input signal includes a step of generating a set of n signals, n being an integer greater than or equal to 3, by generating a signal for each integer i such that 0≦i≦(n−1), each signal within the set having the same frequency and approximately equal amplitude and a phase equal to (360/n)i degrees. The method also includes a step of inputting each of the set of n signals to a gate terminal of a corresponding one of a set of n transistors. Each of the transistors has a source terminal electrically connected to a common voltage drain and each of the transistors has a drain terminal electrically connected to a coupling. The coupling is electrically connected to a common voltage source. The output signal at the coupling has a frequency equal to the frequency of the input signal multiplied by n.
摘要翻译：从输入信号产生输出信号的方法包括通过产生每个整数i的信号来产生一组n个信号，n是大于或等于3的整数，使得0 <= i <=（ n-1），集合内的每个信号具有相同的频率和近似相等的幅度以及等于（360 / n）i度的相位。该方法还包括将n组信号中的每一个输入到一组n个晶体管中的相应一个的栅极端的步骤。每个晶体管具有电连接到公共电压漏极的源极端子，并且每个晶体管具有电连接到耦合器的漏极端子。耦合电连接到公共电压源。耦合时的输出信号的频率等于输入信号乘以n的频率。

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