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1. 发明申请

US20160092379A1 PRIORITY FRAMEWORK FOR A COMPUTING DEVICE 有权
标题翻译：用于计算设备的优先级框架
公开(公告)号：US20160092379A1
公开(公告)日：2016-03-31
申请号：US14497619
申请日：2014-09-26
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen , Millind Mittal , Gaurav Singh
IPC分类号： G06F13/18
CPC分类号： G06F13/18 , Y02D10/14
摘要： Proving for a framework for propagating priorities to a memory subsystem in a computing system environment is disclosed herein. By way of example, a memory access handler is provided for managing memory access requests and determining associated priorities. The memory access handler includes logic configured for propagating memory requests and the associated priorities to lower levels of a computer hierarchy. A memory subsystem receives the memory access requests and the priorities.
摘要翻译：本文公开了在计算系统环境中向存储器子系统传播优先权的框架。作为示例，提供存储器访问处理程序用于管理存储器访问请求并确定相关联的优先级。存储器访问处理器包括被配置为将存储器请求和相关联的优先级传播到较低级别的计算机层次结构的逻辑。存储器子系统接收存储器访问请求和优先级。

2. 发明申请

US20140101380A1 MANAGING BANKS IN A MEMORY SYSTEM 有权
标题翻译：管理存储系统中的银行
公开(公告)号：US20140101380A1
公开(公告)日：2014-04-10
申请号：US13644924
申请日：2012-10-04
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen
IPC分类号： G06F12/00
CPC分类号： G06F13/1626 , G06F11/3037 , G06F13/1642
摘要： Systems and methods are provided that facilitate memory storage in a memory device. The system contains a memory controller and a memory array communicatively coupled to the memory controller. The memory controller sends commands to the memory array and the memory array writes or retrieves data contained therein based upon the command. The memory controller can monitor multiple banks and manage bank activations. Accordingly, memory access overhead can be reduced and memory devices can be more efficient.
摘要翻译：提供了便于存储器件中的存储器存储的系统和方法。该系统包含存储器控制器和通信地耦合到存储器控制器的存储器阵列。存储器控制器向存储器阵列发送命令，并且存储器阵列基于该命令写入或检索其中包含的数据。内存控制器可以监控多个银行并管理银行激活。因此，可以减少存储器访问开销，并且存储器设备可以更有效率。

3. 发明授权

US09928183B2 Priority framework for a computing device 有权
公开(公告)号：US09928183B2
公开(公告)日：2018-03-27
申请号：US14497619
申请日：2014-09-26
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen , Millind Mittal , Gaurav Singh
IPC分类号： G06F13/18
CPC分类号： G06F13/18 , Y02D10/14
摘要： Proving for a framework for propagating priorities to a memory subsystem in a computing system environment is disclosed herein. By way of example, a memory access handler is provided for managing memory access requests and determining associated priorities. The memory access handler includes logic configured for propagating memory requests and the associated priorities to lower levels of a computer hierarchy. A memory subsystem receives the memory access requests and the priorities.

4. 发明授权

US09798672B1 Data managment for cache memory 有权
公开(公告)号：US09798672B1
公开(公告)日：2017-10-24
申请号：US15098573
申请日：2016-04-14
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen , John Gregory Favor
IPC分类号： G06F12/08 , G06F12/0891 , G06F12/0875 , G06F12/0897
CPC分类号： G06F12/0891 , G06F12/0875 , G06F12/0897 , G06F2212/45 , G06F2212/60
摘要： Various aspects provide for managing data associated with a cache memory. For example, a system can include a cache memory and a memory controller. The cache memory stores data. The memory controller maintains a history profile for the data stored in the cache memory. In an implementation, the memory controller includes a filter component, a tagging component and a data management component. The filter component determines whether the data is previously stored in the cache memory based on a filter associated with a probabilistic data structure. The tagging component tags the data as recurrent data in response to a determination by the filter component that the data is previously stored in the cache memory. The data management component retains the data in the cache memory in response to the tagging of the data as the recurrent data.

5. 发明申请

US20160335186A1 PREFETCH TAG FOR EVICTION PROMOTION 有权
标题翻译：用于促销的预制标签
公开(公告)号：US20160335186A1
公开(公告)日：2016-11-17
申请号：US14710837
申请日：2015-05-13
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen
IPC分类号： G06F12/08
CPC分类号： G06F12/0862 , G06F12/126
摘要： Various embodiments provide for a system that prefetches data from a main memory to a cache and then evicts unused data to a lower level cache. The prefetching system will prefetch data from a main memory to a cache, and data that is not immediately useable or is part of a data set which is too large to fit in the cache can be tagged for eviction to a lower level cache, which keeps the data available with a shorter latency than if the data had to be loaded from main memory again. This lowers the cost of prefetching useable data too far ahead and prevents cache trashing.
摘要翻译：各种实施例提供了将数据从主存储器预取到高速缓存的系统，然后将未使用的数据排除到较低级别的高速缓存。预取系统将预取从主存储器到高速缓存的数据，并且不能立即使用的数据或属于太大以至于不能容纳在高速缓存中的数据集的一部分的数据可被标记为被驱逐到较低级别的高速缓存，其保持数据可用的时间短于数据必须从主存储器再次加载的时间。这降低了可用数据预取得太远的成本，并防止高速缓存丢弃。

6. 发明授权

US09336164B2 Scheduling memory banks based on memory access patterns 有权
标题翻译：基于内存访问模式调度内存条
公开(公告)号：US09336164B2
公开(公告)日：2016-05-10
申请号：US13644935
申请日：2012-10-04
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen
IPC分类号： G06F12/02 , G06F13/16 , G06F11/34 , G06F11/30
CPC分类号： G06F13/1642 , G06F11/3037 , G06F11/3062 , G06F11/3409 , G06F12/0215 , Y02D10/14 , Y02D10/34
摘要： Systems and methods are provided that facilitate memory storage in a multi-bank memory device. The system contains a memory controller and a memory array communicatively coupled to the memory controller. The memory controller sends commands to the memory array and the memory array updates or retrieves data contained therein based upon the command. If the memory controller detects a pattern of memory requests, the memory controller can issue a preemptive activation request to the memory array. Accordingly, memory access overhead is reduced.
摘要翻译：提供了便于多存储存储器件中的存储器存储的系统和方法。该系统包含存储器控制器和通信地耦合到存储器控制器的存储器阵列。存储器控制器将命令发送到存储器阵列，并且存储器阵列基于该命令更新或检索其中包含的数据。如果存储器控制器检测到存储器请求的模式，则存储器控制器可以向存储器阵列发出先占激活请求。因此，存储器访问开销降低。

7. 发明授权

US09146677B2 Systems and methods for queue request ordering without stalling requests in aliasing conditions by using a hash indexed based table 有权
标题翻译：用于排队请求排序的系统和方法，而不会通过使用基于哈希索引的表在混叠条件下停止请求
公开(公告)号：US09146677B2
公开(公告)日：2015-09-29
申请号：US13752161
申请日：2013-01-28
申请人： Applied Micro Circuits Corporation
发明人： Kjeld Svendsen
IPC分类号： G06F12/10 , G06F3/06
CPC分类号： G06F3/06 , G06F12/1018 , G06F13/1642
摘要： The described systems and methods can facilitate efficient and effective information storage. In one embodiment a system includes a hash component, a queue request order component and a request queue component. The hash component is operable to hash a request indication. The queue request order component is operable to track a queue request order. The request queue component is operable to queue and forward requests in accordance with direction from the queue request order component. In one embodiment, the storage component maintains a request without stalling a request in an aliasing condition.
摘要翻译：所描述的系统和方法可以促进有效和有效的信息存储。在一个实施例中，系统包括散列组件，队列请求顺序组件和请求队列组件。散列组件可操作以对请求指示进行散列。队列请求命令组件可操作以跟踪队列请求顺序。请求队列组件可用于根据队列请求命令组件的方向对请求进行排队和转发。在一个实施例中，存储组件维持请求，而不会以混叠状态停止请求。

8. 发明授权

US09734072B2 Main memory prefetch operation and multiple prefetch operation 有权
公开(公告)号：US09734072B2
公开(公告)日：2017-08-15
申请号：US14666771
申请日：2015-03-24
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen
IPC分类号： G06F12/00 , G06F3/00 , G06F12/0862
CPC分类号： G06F12/0862 , G06F2212/6026
摘要： Provided is an integrated circuit that includes a first prefetcher component communicatively coupled to a processor and a second prefetcher component communicatively coupled to the memory controller. The first prefetcher component configured for sending prefetch requests to the memory controller. The second prefetcher component configured for accessing prefetch data based on the prefetch request and storing the prefetch data in a prefetch cache of the memory controller.

9. 发明申请

US20150052286A1 RETRIEVAL HASH INDEX 有权
标题翻译： RETRIEVAL哈希指数
公开(公告)号：US20150052286A1
公开(公告)日：2015-02-19
申请号：US13967607
申请日：2013-08-15
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen
IPC分类号： G06F12/08
CPC分类号： G06F12/0864 , G06F12/0802 , G06F12/0893 , G06F12/0895 , Y02D10/13
摘要： Systems and methods are provided that facilitate retrieval of a hash index in an electronic device. The system contains an addressing component that generates a hash index as a function of an exclusive-or identity. The addressing component can retrieve the hash index as a function of a tag value. Accordingly, required storage area can be reduced and electronic devices can be more efficient.
摘要翻译：提供了便于在电子设备中检索散列索引的系统和方法。该系统包含一个寻址组件，它根据排他或身份生成散列索引。寻址组件可以根据标签值检索散列索引。因此，可以减少所需的存储区域，并且电子设备可以更有效率。

10. 发明申请

US20140101381A1 MANAGING BANKS IN A MEMORY SYSTEM 有权
标题翻译：管理存储系统中的银行
公开(公告)号：US20140101381A1
公开(公告)日：2014-04-10
申请号：US13644935
申请日：2012-10-04
申请人： APPLIED MICRO CIRCUITS CORPORATION
发明人： Kjeld Svendsen
IPC分类号： G06F12/00
CPC分类号： G06F13/1642 , G06F11/3037 , G06F11/3062 , G06F11/3409 , G06F12/0215 , Y02D10/14 , Y02D10/34
摘要： Systems and methods are provided that facilitate memory storage in a multi-bank memory device. The system contains a memory controller and a memory array communicatively coupled to the memory controller. The memory controller sends commands to the memory array and the memory array updates or retrieves data contained therein based upon the command. If the memory controller detects a pattern of memory requests, the memory controller can issue a preemptive activation request to the memory array. Accordingly, memory access overhead is reduced.
摘要翻译：提供了便于多存储存储器件中的存储器存储的系统和方法。该系统包含存储器控制器和通信地耦合到存储器控制器的存储器阵列。存储器控制器将命令发送到存储器阵列，并且存储器阵列基于该命令更新或检索其中包含的数据。如果存储器控制器检测到存储器请求的模式，则存储器控制器可以向存储器阵列发出先占激活请求。因此，存储器访问开销降低。

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