专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07495776B2 Three-dimensional measuring system 失效
标题翻译：三维测量系统
公开(公告)号：US07495776B2
公开(公告)日：2009-02-24
申请号：US11268948
申请日：2005-11-08
申请人： Akira Kubo , Shinichi Horita , Yoshihisa Abe
发明人： Akira Kubo , Shinichi Horita , Yoshihisa Abe
IPC分类号： G01B11/24 , G06T15/30
CPC分类号： G01B21/04
摘要： A three-dimensional measuring system for measuring a three-dimensional shape of a measurement object in a noncontact manner includes a first obtaining portion for obtaining arrangement information of the measurement object, a second obtaining portion for obtaining design shape information of the measurement object, a fourth obtaining portion for obtaining specifics information about one or more three-dimensional measuring devices, a determining portion for determining a measurable part that can be measured by the three-dimensional measuring device about a surface shape of the measurement object in accordance with the obtained arrangement information, the obtained design shape information and the obtained specifics information, and an output portion for outputting the determined measurable part.
摘要翻译：一种用于以非接触方式测量测量对象的三维形状的三维测量系统包括用于获得测量对象的布置信息的第一获取部分，用于获得测量对象的设计形状信息的第二获取部分，第四获取部分，用于获得关于一个或多个三维测量装置的细节信息;确定部分，用于根据获得的布置来确定可以由三维测量装置测量的关于测量对象的表面形状的可测量部分信息，所获得的设计形状信息和获得的细节信息，以及用于输出所确定的可测量部分的输出部分。

2. 发明申请

US20060290945A1 Three-dimensional measuring system 失效
公开(公告)号：US20060290945A1
公开(公告)日：2006-12-28
申请号：US11268948
申请日：2005-11-08
申请人： Akira Kubo , Shinichi Horita , Yoshihisa Abe
发明人： Akira Kubo , Shinichi Horita , Yoshihisa Abe
IPC分类号： G01B11/24
CPC分类号： G01B21/04
摘要： A three-dimensional measuring system for measuring a three-dimensional shape of a measurement object in a noncontact manner includes a first obtaining portion for obtaining arrangement information of the measurement object, a second obtaining portion for obtaining design shape information of the measurement object, a fourth obtaining portion for obtaining specifics information about one or more three-dimensional measuring devices, a determining portion for determining a measurable part that can be measured by the three-dimensional measuring device about a surface shape of the measurement object in accordance with the obtained arrangement information, the obtained design shape information and the obtained specifics information, and an output portion for outputting the determined measurable part.

3. 发明申请

US20120064303A1 OPTICAL DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：光学装置及其制造方法
公开(公告)号：US20120064303A1
公开(公告)日：2012-03-15
申请号：US13302461
申请日：2011-11-22
申请人： Kazuhiro YASHIKI , Chikara Sawamura , Koji Umezaki , Akira Kubo
发明人： Kazuhiro YASHIKI , Chikara Sawamura , Koji Umezaki , Akira Kubo
IPC分类号： B32B3/30 , B05D5/06
CPC分类号： B05D5/063 , B42D25/29 , B42D25/324 , B42D25/328 , B42D2033/18 , B42D2033/24 , G02B5/1842 , G02B5/32 , Y10T428/24612
摘要： An optical device includes a relief structure formation layer, a first layer made of a first material having a refractive index different from that of a material of the relief structure formation layer, and a second layer made of a second material different from the first material and covering the first layer. A ratio of an amount of the second material at a position of the second region to an apparatus area of the second region is zero or smaller than a ratio of an amount of the second material at the position of the second sub-region to an apparatus area of the second sub-region.
摘要翻译：光学装置包括浮雕结构形成层，由折射率不同于浮雕结构形成层的材料的第一材料制成的第一层和由与第一材料不同的第二材料制成的第二层，以及覆盖第一层。在第二区域的位置处的第二材料的量与第二区域的装置区域的比例为零或小于第二子区域的位置处的第二材料的量与装置的比率第二子区域的区域。

4. 发明授权

US07273382B2 Electrical connector and electrical connector assembly 失效
标题翻译：电气连接器和电气连接器组件
公开(公告)号：US07273382B2
公开(公告)日：2007-09-25
申请号：US11365911
申请日：2006-03-01
申请人： Isao Igarashi , Akira Kubo
发明人： Isao Igarashi , Akira Kubo
IPC分类号： H01R13/44
CPC分类号： H01R12/7005 , H01R13/44
摘要： An electrical connector has an insulating housing provided with first and second contacts. A positioning guide protrudes from a mating surface of the housing. At least one barrier wall is formed between the first and second contacts that separates the first contacts from the second contacts. A mating connector has an insulating mating housing provided with first and second mating contacts and a positioning recessed member that receives the positioning guide. A barrier wall recessed member is formed between the first and second mating contacts that separates the first mating contacts from the second mating contacts. The barrier wall recessed member receives the barrier wall when the electrical connector is mated with the mating connector. A shutter member is provided on the mating connector and is moveable between an upper position and a lower position. The shutter member covers the first and second mating contacts in the upper position.
摘要翻译：电连接器具有设置有第一和第二触点的绝缘壳体。定位引导件从壳体的配合表面突出。在第一和第二触点之间形成至少一个阻挡壁，该阻挡壁将第一触头与第二触点分开。配合连接器具有设置有第一和第二配合触点的绝缘配合壳体和容纳定位引导件的定位凹形构件。在第一和第二配合触点之间形成阻挡壁凹入部件，该第一和第二配合触头将第一配合触头与第二配合触头分开。当电连接器与配合连接器配合时，阻挡壁凹入部件接收阻挡壁。活门构件设置在配合连接器上并可在上部位置和下部位置之间移动。挡板部件在上部位置覆盖第一和第二配合触头。

5. 发明授权

US06551914B1 Method of forming polish stop by plasma treatment for interconnection 失效
标题翻译：通过等离子体处理形成抛光停止的方法进行互连
公开(公告)号：US06551914B1
公开(公告)日：2003-04-22
申请号：US09634940
申请日：2000-08-08
申请人： Mieko Suzuki , Akira Kubo
发明人： Mieko Suzuki , Akira Kubo
IPC分类号： H01L2144
CPC分类号： H01L21/76829 , H01L21/76826 , H01L21/7684
摘要： A semiconductor device in which an interconnection material is buried in a hole formed in an interlevel insulating film arranged on a semiconductor substrate includes a protective layer formed on the surface of the interlevel insulating film that has a lower polishing rate than that of the interconnection material in chemical mechanical polishing. A method of manufacturing this semiconductor device is also disclosed.
摘要翻译：其中互连材料埋设在布置在半导体衬底上的层间绝缘膜中形成的孔中的半导体器件包括形成在层间绝缘膜的表面上的保护层，其具有比互连材料的抛光速率低的抛光速率化学机械抛光。还公开了制造该半导体器件的方法。

6. 发明授权

US5966190A Array substrate for displaying device with capacitor lines having particular connections 有权
标题翻译：用于显示具有特定连接的电容线的装置的阵列基板
公开(公告)号：US5966190A
公开(公告)日：1999-10-12
申请号：US187419
申请日：1998-11-06
申请人： Masayuki Dohjo , Hideo Kawano , Akira Kubo , Makoto Shibusawa , Tetsuya Iizuka , Tamio Nakai , Kazushige Mori
发明人： Masayuki Dohjo , Hideo Kawano , Akira Kubo , Makoto Shibusawa , Tetsuya Iizuka , Tamio Nakai , Kazushige Mori
IPC分类号： G02F1/13 , G02F1/1345 , G02F1/1362 , H01L21/77 , H01L21/84 , H01L27/12 , G02F1/1343 , G02F1/136
CPC分类号： G02F1/13458 , G02F1/1345 , G02F1/13452 , G02F1/136213 , G02F1/136227 , H01L27/1214 , G02F2001/13629
摘要： An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127). With such an arrangement, an appropriate storage capacitor can be formed by causing the scanning lines and pixel electrode to overlap each other without having to decrease the manufacturing yield while enabling achievement of high aperture ratio.
摘要翻译：阵列基板包括多个扫描线（111）; 具有第一介电膜（115），（117），其上的半导体膜（120）和与半导体膜（120）电耦合的源电极（126b）和漏电极（126a）的薄膜晶体管（112））; 从所述漏电极（126a）取出以与所述扫描线（111）大致直角延伸的信号线（110）。以及与源电极（126b）电连接的像素电极（131），其中像素电极（131）通过设置在至少信号线上的第二电介质膜（127）与源电极（126b）电连接（110），而像素电极（131）通过第一和第二介电膜（115），（117），（127）与其相邻扫描线（111）的细长区域（113）重叠。通过这样的布置，可以通过使扫描线和像素电极彼此重叠而不必降低制造成品率而能够实现高开口率而形成适当的存储电容器。

7. 发明授权

US5840631A Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5840631A
公开(公告)日：1998-11-24
申请号：US562991
申请日：1995-11-27
申请人： Akira Kubo , Tetsuya Homma , Koji Kishimoto
发明人： Akira Kubo , Tetsuya Homma , Koji Kishimoto
IPC分类号： C23C16/40 , H01L21/205 , H01L21/316 , H01L21/768 , H01L23/522 , H01L21/443
CPC分类号： H01L21/02164 , C23C16/401 , H01L21/02216 , H01L21/02271 , H01L21/02277 , H01L21/31612 , H01L21/76801 , H01L2924/0002
摘要： A method of manufacturing a semiconductor device includes the following steps. A lower wiring layer is formed on a semiconductor substrate through an insulating film. A compound gas having a catalysis for promoting formation of silicon oxide is added in an atmosphere using a main component gas consisting of ozone, water vapor, and one of alkoxysilane and organosiloxane as a source gas to form a silicon oxide film by a chemical vapor deposition (CVD) method directly on a surface of the semiconductor substrate on which the lower wiring layer is formed. An upper wiring layer is formed on the silicon oxide film.
摘要翻译：一种制造半导体器件的方法包括以下步骤。通过绝缘膜在半导体衬底上形成下布线层。在气氛中使用由臭氧，水蒸气和烷氧基硅烷和有机硅氧烷之一组成的主要成分气体作为源气体，在气氛中加入具有促进氧化硅形成的催化剂的复合气体，通过化学气相沉积法形成氧化硅膜（CVD）方法直接在其上形成下布线层的半导体衬底的表面上。在氧化硅膜上形成上部布线层。

8. 发明授权

US5693705A Matted electrodeposition coating composition and a method of producing a matted electrodeposition coating 失效
标题翻译：无电镀电沉积涂料组合物和生产无机电沉积涂料的方法
公开(公告)号：US5693705A
公开(公告)日：1997-12-02
申请号：US581525
申请日：1996-01-17
申请人： Akira Kubo , Shinichi Inoue , Shunji Ishii
发明人： Akira Kubo , Shinichi Inoue , Shunji Ishii
IPC分类号： C09D5/00 , C08L61/20 , C09D5/44 , C09D133/04 , C09D133/06 , C09D161/20 , C09D161/32 , C25D13/06 , C08L61/00
CPC分类号： C09D5/4411 , C09D133/062 , C08L61/20
摘要： This invention offers a method of manufacturing a matted electrodeposition coating composition which does not mask the hue and the fine pattern which are inherent to the thing to be coated and also offers a method of conducting such an electrodeposition. The invention also relates to a matted electrodeposition coating composition which is characterized in containing (A) an anionic acryl resin having an acetoacetyl group in a side chain, (B) an amine and water, (C) an aldehyde and (D) an alkoxylated methylolmelamine resin with a water dilutability of not more than 4.0 cc and optionally containing (D) an acidic composition with pKa of not more than 1.9 as well as a method of producing a matted electrodeposition coating using the aforementioned composition.
摘要翻译： PCT No.PCT / JP95 / 01021 Sec。 371日期1996年1月17日 102（e）日期1996年1月17日PCT提交1995年5月29日PCT公布。第WO95 / 33795号公报日期1995年12月14日本发明提供了一种制造无电解电沉积涂料组合物的方法，该组合物不掩盖被涂物质固有的色调和精细图案，并且还提供了进行这种电沉积的方法。本发明还涉及一种无机电沉积涂料组合物，其特征在于含有（A）侧链具有乙酰乙酰基的阴离子丙烯酸树脂，（B）胺和水，（C）醛和（D）烷氧基化具有不超过4.0cc的水稀释度的羟甲基三聚氰胺树脂，并且任选地含有（D）pKa不大于1.9的酸性组合物，以及使用上述组合物制备无光泽的电沉积涂层的方法。

9. 发明授权

US5677745A LCD with electrostatic discharge projections 失效
标题翻译： LCD带静电放电突起
公开(公告)号：US5677745A
公开(公告)日：1997-10-14
申请号：US575868
申请日：1995-12-20
申请人： Hideo Kawano , Akira Kubo
发明人： Hideo Kawano , Akira Kubo
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1343
CPC分类号： G02F1/136204
摘要： Projections are formed of a layer at locations at which no conductive pattern such as a signal line formed of another layer is provided, a scanning line and an storage capacitor line can be prevented from being short-circuited via the portion of an insulating film damaged by discharge of static electricity.
摘要翻译：在不设置诸如由另一层形成的信号线的导电图案的位置处形成层的投影，可以防止扫描线和辅助电容线经由绝缘膜损坏的部分短路放电静电。

10. 发明授权

US5646756A Liquid crystal display device with a protecting film that partially overlaps a display pixel electrode 失效
标题翻译：具有与显示像素电极部分重叠的保护膜的液晶显示装置
公开(公告)号：US5646756A
公开(公告)日：1997-07-08
申请号：US527938
申请日：1995-09-14
申请人： Masayuki Dohjo , Akira Kubo , Yasuharu Tanaka , Katsuhiko Inada
发明人： Masayuki Dohjo , Akira Kubo , Yasuharu Tanaka , Katsuhiko Inada
IPC分类号： G02F1/1341 , G02F1/136 , G02F1/1362 , G02F1/1368 , G02F1/1343
CPC分类号： G02F1/1362
摘要： A liquid crystal display device having an array substrate. The substrate has: (1) an insulating transparent substrate that has a pixel region and a non-pixel region, (2) a plurality of thin film transistors disposed in a matrix pattern on a display screen, each thin film transistor having a gate insulating film that is produced by an atmosphere pressure chemical vapor deposition; (3) a plurality of display pixel electrodes formed on the pixel region of the insulating transparent substrate, each display pixel electrode being connected to each of the thin film transistors; and (4) a protecting film formed on the non-pixel region of the insulating transparent substrate, the protecting film extends from the non-pixel region and overlaps a peripheral portion of each of the display pixel electrodes that are disposed in a portion of the display screen by a width of 2 .mu.m to 7 .mu.m. The display also has a counter substrate that is disposed apart from and facing the array substrate. A sealant layer is disposed at peripheries of the array substrate and the counter substrate so as to seal a space between the array substrate and the counter substrate and is provided with a liquid crystal-inlet port. A liquid crystal layer fills in a space between the array substrate and the counter substrate. The liquid crystal layer being injected in the space from the liquid crystal-inlet port. A closing layer is used to close the liquid crystal-inlet port.
摘要翻译：一种具有阵列基板的液晶显示装置。基板具有：（1）具有像素区域和非像素区域的绝缘性透明基板，（2）在显示屏上以矩阵状配置的多个薄膜晶体管，每个薄膜晶体管具有栅极绝缘由气压化学气相沉积生成的薄膜; （3）形成在绝缘透明基板的像素区域上的多个显示像素电极，每个显示像素电极连接到每个薄膜晶体管; 和（4）形成在所述绝缘性透明基板的非像素区域上的保护膜，所述保护膜从所述非像素区域延伸并与配置在所述绝缘性透明基板的一部分的所述显示像素电极的周边部分重叠显示屏宽2〜7m。显示器还具有与阵列基板分离并面对阵列基板的对置基板。密封层设置在阵列基板和对置基板的周边，以密封阵列基板和对置基板之间的空间，并且设置有液晶入口。液晶层填充阵列基板和对置基板之间的空间。液晶层从液晶 - 入口注入空间。使用闭合层来封闭液晶 - 入口。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式