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1. 发明授权

US08250549B2 Variable coherency support when mapping a computer program to a data processing apparatus 有权
标题翻译：将计算机程序映射到数据处理设备时，可变相关性支持
公开(公告)号：US08250549B2
公开(公告)日：2012-08-21
申请号：US11976314
申请日：2007-10-23
申请人： Alastair David Reid , Edmund Grimley-Evans , Simon Andrew Ford
发明人： Alastair David Reid , Edmund Grimley-Evans , Simon Andrew Ford
IPC分类号： G06F9/45
CPC分类号： G06F11/362 , G06F11/3636
摘要： A computer implemented tool is provided for assisting in the mapping of a computer program to a data processing apparatus wherein multiple physical instances of a logical variable in the computer program are required. A computer program is provided as the input to the tool which analyses the data flow of the program and identifies multiple physical instance requirement for logical variables. The tool adds mapping support commands, such as instantiation commands, Direct Memory Access (DMA) move commands and the like as necessary to support the mapping of the computer program to a data processing apparatus.
摘要翻译：提供了一种计算机实现的工具，用于帮助将计算机程序映射到数据处理装置，其中需要计算机程序中的逻辑变量的多个物理实例。提供计算机程序作为工具的输入，该工具分析程序的数据流并识别逻辑变量的多个物理实例需求。该工具根据需要添加映射支持命令，例如实例化命令，直接存储器访问（DMA）移动命令等，以支持将计算机程序映射到数据处理设备。

2. 发明申请

US20080215768A1 Variable coherency support when mapping a computer program to a data processing apparatus 有权
标题翻译：将计算机程序映射到数据处理设备时，可变相关性支持
公开(公告)号：US20080215768A1
公开(公告)日：2008-09-04
申请号：US11976314
申请日：2007-10-23
申请人： Alastair David Reid , Edmund Grimley-Evans , Simon Andrew Ford
发明人： Alastair David Reid , Edmund Grimley-Evans , Simon Andrew Ford
IPC分类号： G06F9/45 , G06F12/08 , G06F9/44 , G06F13/28 , G06F12/02
CPC分类号： G06F11/362 , G06F11/3636
摘要： A computer implemented tool is provided for assisting in the mapping of a computer program to a data processing apparatus 2 wherein multiple physical instances of a logical variable in the computer program are required. A computer program 60 is provided as the input to the tool which analyses the data flow of the program and identifies multiple physical instance requirement for logical variables. The tool adds mapping support commands, such as instantiation commands, DMA move commands and the like as necessary to support the mapping of the computer program to a data processing apparatus 2.
摘要翻译：提供了一种计算机实现的工具，用于帮助将计算机程序映射到数据处理装置2，其中需要计算机程序中的逻辑变量的多个物理实例。提供计算机程序60作为工具的输入，其分析程序的数据流并识别对逻辑变量的多个物理实例要求。该工具根据需要添加映射支持命令，例如实例化命令，DMA移动命令等，以支持将计算机程序映射到数据处理设备2。

3. 发明申请

US20080098262A1 Performing diagnostic operations upon an asymmetric multiprocessor apparatus 有权
标题翻译：对非对称多处理器设备执行诊断操作
公开(公告)号：US20080098262A1
公开(公告)日：2008-04-24
申请号：US11907881
申请日：2007-10-18
申请人： Simon Andrew Ford , Alastair David Reid , Katherine Elizabeth Kneebone , Edmund Grimley-Evans
发明人： Simon Andrew Ford , Alastair David Reid , Katherine Elizabeth Kneebone , Edmund Grimley-Evans
IPC分类号： G06F11/28
CPC分类号： G06F11/362 , G06F11/3636
摘要： An asymmetric multiprocessor apparatus 2 is provided in which respective slave diagnostic units 20, 22, 24 are associated with corresponding execution mechanisms 6, 8, 10. A master diagnostic unit 26 tracks the migration of thread execution between the different execution mechanisms 6, 8, 10 so that the execution of a given thread can be followed by the diagnostic mechanisms 20, 22, 24, 26 and this information provided to the programmer. The execution mechanisms 6, 8, 10 can be diverse such as a general purpose processor 6, a DMA unit 12, a coprocessor, an VLIW processor, a digital signal processor 8 and a hardware accelerator 10. The asymmetric multiprocessor apparatus 2 will also typically include an asymmetric memory hierarchy such as including two or more of a global memory, a shared memory 16, a private memory 18 and a cache memory 14.
摘要翻译：提供了非对称多处理器装置2，其中相应的从属诊断单元20,22,24与相应的执行机构6,8,10相关联。主诊断单元26跟踪不同执行机构6,8,10之间的线程执行的迁移，使得给定线程的执行可以跟随诊断机构20,22,24,26，并且提供给程序员的信息。执行机构6,8,10可以是多样的，例如通用处理器6，DMA单元12，协处理器，VLIW处理器，数字信号处理器8和硬件加速器10。非对称多处理器装置2还通常将包括非对称存储器层级，例如包括全局存储器，共享存储器16，专用存储器18和高速缓存存储器14中的两个或更多个。

4. 发明授权

US07809989B2 Performing diagnostic operations upon an asymmetric multiprocessor apparatus 有权
标题翻译：对非对称多处理器设备执行诊断操作
公开(公告)号：US07809989B2
公开(公告)日：2010-10-05
申请号：US11907881
申请日：2007-10-18
申请人： Simon Andrew Ford , Alastair David Reid , Katherine Elizabeth Kneebone , Edmund Grimley-Evans
发明人： Simon Andrew Ford , Alastair David Reid , Katherine Elizabeth Kneebone , Edmund Grimley-Evans
IPC分类号： G06F11/00
CPC分类号： G06F11/362 , G06F11/3636
摘要： An asymmetric multiprocessor apparatus 2 is provided in which respective slave diagnostic units 20, 22, 24 are associated with corresponding execution mechanisms 6, 8, 10. A master diagnostic unit 26 tracks the migration of thread execution between the different execution mechanisms 6, 8, 10 so that the execution of a given thread can be followed by the diagnostic mechanisms 20, 22, 24, 26 and this information provided to the programmer. The execution mechanisms 6, 8, 10 can be diverse such as a general purpose processor 6, a DMA unit 12, a coprocessor, an VLIW processor, a digital signal processor 8 and a hardware accelerator 10. The asymmetric multiprocessor apparatus 2 will also typically include an asymmetric memory hierarchy such as including two or more of a global memory, a shared memory 16, a private memory 18 and a cache memory 14.
摘要翻译：提供了非对称多处理器装置2，其中相应的从诊断单元20,22,24与相应的执行机构6,8,10相关联。主诊断单元26跟踪不同执行机构6,8,10之间的线程执行的迁移。 10，使得给定线程的执行可以跟随诊断机构20,22,24,26，并且该信息被提供给程序员。执行机构6,8,10可以是多样的，例如通用处理器6，DMA单元12，协处理器，VLIW处理器，数字信号处理器8和硬件加速器10.非对称多处理器装置2也将典型地包括诸如包括全局存储器，共享存储器16，专用存储器18和高速缓冲存储器14中的两个或更多个的非对称存储器层级。

5. 发明授权

US08190807B2 Mapping a computer program to an asymmetric multiprocessing apparatus 有权
标题翻译：将计算机程序映射到不对称多处理装置
公开(公告)号：US08190807B2
公开(公告)日：2012-05-29
申请号：US11976315
申请日：2007-10-23
申请人： Alastair David Reid , Edmund Grimley-Evans , Simon Andrew Ford
发明人： Alastair David Reid , Edmund Grimley-Evans , Simon Andrew Ford
IPC分类号： G06F12/08 , G06F9/45
CPC分类号： G06F11/362 , G06F11/3636
摘要： A computer implemented tool is provided for assisting in the mapping of a computer program to an asymmetric multiprocessing apparatus 2 incorporating an asymmetric memory hierarchy formed of a plurality of memories 12, 14. An at least partial architectural description 22, 40 is provided as an input variable to the tool and used to infer missing annotations within a source computer program 24, such as which functions are to be executed by which execution mechanisms 4, 6, 8 and which variables are to be stored within which memories 12, 14. The tool also adds mapping support commands, such as cache flush commands, cache invalidate commands, DMA move commands and the like as necessary to support the mapping of the computer program to the asymmetric multiprocessing apparatus 2.
摘要翻译：提供了一种计算机实现工具，用于帮助将计算机程序映射到并入由多个存储器12,14组成的非对称存储器层级的非对称多处理装置2.至少部分架构描述22,40被提供为输入变量，用于推断源计算机程序24内的丢失注释，例如要执行哪些功能，执行机构4,6,8以及哪些变量将被存储在哪个存储器12,14中。该工具还需要添加诸如缓存刷新命令，缓存无效命令，DMA移动命令等映射支持命令，以支持计算机程序到不对称多处理装置2的映射。

6. 发明申请

US20100083237A1 Reducing trace overheads by modifying trace operations 审中-公开
标题翻译：通过修改跟踪操作减少跟踪开销
公开(公告)号：US20100083237A1
公开(公告)日：2010-04-01
申请号：US12285016
申请日：2008-09-26
申请人： Katherine Elizabeth Kneebone , Alastair David Reid , Edmund Grimley-Evans
发明人： Katherine Elizabeth Kneebone , Alastair David Reid , Edmund Grimley-Evans
IPC分类号： G06F9/45 , G06F9/44
CPC分类号： G06F8/4435 , G06F8/443 , G06F11/3466 , G06F11/3624 , G06F11/3636 , G06F2201/865
摘要： A method of compiling a computer program to improve trace efficiency is disclosed. The computer program comprises a plurality of trace operations for triggering output of trace data generated by said computer program, and the method of compiling comprises the steps of: transforming said computer program into code forming an intermediate version of said computer program; analysing said transformed code; replacing at least some of said trace operations with modified trace operations; transforming said code into code suitable for execution on a data processing system; and generating translation data relating said modified trace operations to said trace operations they replaced.
摘要翻译：公开了一种编译计算机程序以提高跟踪效率的方法。该计算机程序包括用于触发由所述计算机程序产生的跟踪数据的输出的多个跟踪操作，并且编译方法包括以下步骤：将所述计算机程序变换成形成所述计算机程序的中间版本的代码; 分析所述转换代码; 用修改的跟踪操作替换至少一些所述跟踪操作; 将所述代码转换成适于在数据处理系统上执行的代码; 以及产生与所述修改的跟踪操作相关联的所述跟踪操作的翻译数据。

7. 发明授权

US07574314B2 Spurious signal detection 有权
标题翻译：杂散信号检测
公开(公告)号：US07574314B2
公开(公告)日：2009-08-11
申请号：US11898923
申请日：2007-09-17
申请人： Simon Andrew Ford , David Michael Bull , Alastair David Reid
发明人： Simon Andrew Ford , David Michael Bull , Alastair David Reid
IPC分类号： G01R29/02 , G01R25/00
CPC分类号： G06F21/755
摘要： A circuit for a data processing apparatus and a method for detecting spurious signals is disclosed, the circuit comprising a data input operable to receive digital signal values, spurious signal detection logic operable to monitor a digital signal value within the circuit, and to determine at least one of: a safe time window during which it is expected that the digital signal values input into the circuit may cause data transitions in the monitored digital signal value and a transition time window in which it is expected a data transition will occur; and in response to detecting either a data transition in the monitored digital signal value outside of the at least one safe time window or no data transition in the transition window, the spurious signal detection logic is operable to output a detection signal.
摘要翻译：公开了一种用于数据处理装置的电路和用于检测杂散信号的方法，所述电路包括可操作以接收数字信号值的数据输入，可操作以监视电路内的数字信号值的寄生信号检测逻辑，并至少确定其中之一是安全时间窗口，期望输入到电路中的数字信号值可能导致监视的数字信号值中的数据转换和预期将发生数据转换的转换时间窗口; 并且响应于检测到在所述至少一个安全时间窗口之外的所监视的数字信号值中的数据转换或者在转换窗口中没有数据转换，所述杂散信号检测逻辑可操作以输出检测信号。

8. 发明申请

US20080097713A1 Spurious signal detection 有权
标题翻译：杂散信号检测
公开(公告)号：US20080097713A1
公开(公告)日：2008-04-24
申请号：US11898923
申请日：2007-09-17
申请人： Simon Andrew Ford , David Michael Bull , Alastair David Reid
发明人： Simon Andrew Ford , David Michael Bull , Alastair David Reid
IPC分类号： G01R29/00
CPC分类号： G06F21/755
摘要： A circuit for a data processing apparatus is disclosed, said circuit comprising a data input operable to receive digital signal values, said circuit comprising: spurious signal detection logic operable to monitor a digital signal value within said circuit, and determine at least one of: a safe time window during which it is expected that said digital signal values input into said circuit may cause data transitions in said monitored digital signal value and a transition time window in which it is expected a data transition will occur; and in response to detecting either a data transition in said monitored digital signal value outside of said at least one safe time window or no data transition in said transition window, said spurious signal detection logic is operable to output a detection signal.
摘要翻译：公开了一种用于数据处理装置的电路，所述电路包括可操作以接收数字信号值的数据输入，所述电路包括：伪信号检测逻辑，可操作以监视所述电路内的数字信号值，并确定以下各项中的至少一个：安全时间窗口，期望输入到所述电路的所述数字信号值可能导致所述监视的数字信号值中的数据转换和预期将发生数据转换的转换时间窗口; 并且响应于检测到在所述至少一个安全时间窗口之外的所述监视的数字信号值中的数据转换或者在所述转换窗口中没有数据转换，所述寄生信号检测逻辑可操作以输出检测信号。

9. 发明申请

US20080098207A1 Analyzing diagnostic data generated by multiple threads within an instruction stream 审中-公开
标题翻译：分析指令流中多个线程生成的诊断数据
公开(公告)号：US20080098207A1
公开(公告)日：2008-04-24
申请号：US11898363
申请日：2007-09-11
申请人： Alastair David Reid , Simon Andrew Ford , Katherine Elizabeth Kneebone
发明人： Alastair David Reid , Simon Andrew Ford , Katherine Elizabeth Kneebone
IPC分类号： G06F9/44
CPC分类号： G06F11/362 , G06F11/3636
摘要： A diagnostic method for outputting diagnostic data relating to processing of instruction streams stemming from a computer program, at least some of said instructions streams comprising multiple threads is disclosed. The method comprises the steps of: (i) receiving diagnostic data; (ii) reordering said received diagnostic data in dependence upon reordering data, said reordering data comprising data relating to said computer program; and (iii) outputting said reordered diagnostic data. In general, the instructions streams are processed by a plurality of processing units arranged to process at least some of said instructions in parallel, said diagnostic data being received from said plurality of processing units.
摘要翻译：一种用于输出与源自计算机程序的指令流的处理有关的诊断数据的诊断方法，其中包括多个线程的至少一些所述指令流被公开。该方法包括以下步骤：（i）接收诊断数据; （ii）根据重新排序数据对所接收的诊断数据重新排序，所述重排序数据包括与所述计算机程序有关的数据; 和（iii）输出所述重新排序的诊断数据。通常，指令流由多个处理单元处理，多个处理单元被布置为并行处理至少一些所述指令，所述诊断数据从所述多个处理单元接收。

10. 发明申请

US20080133897A1 Diagnostic apparatus and method 审中-公开
标题翻译：诊断仪和方法
公开(公告)号：US20080133897A1
公开(公告)日：2008-06-05
申请号：US11907112
申请日：2007-10-09
申请人： Alastair David Reid , Simon Andrew Ford , Katherine Elizabeth Kneebone
发明人： Alastair David Reid , Simon Andrew Ford , Katherine Elizabeth Kneebone
IPC分类号： G06F9/30
CPC分类号： G06F11/3632 , G06F11/362 , G06F11/3636
摘要： A diagnostic method is described for generating diagnostic data relating to processing of an instruction stream, wherein said instruction stream has been compiled from a source instruction stream to include multiple threads, said method comprising the steps of: (i) initiating a diagnostic procedure in which at least a portion of said instruction stream is executed; (ii) controlling a scheduling order for executing instructions within said at least a portion of said instruction stream to cause execution of a sequence of thread portions, said sequence being determined in response to one or more rules, at least one of said rules defining an order of execution of said thread portions to follow an order of said source instruction stream. In this way, the diagnostic method can generate a debug view of a parallelised program which is the same as, or at least similar to, a debug view which would be provided when debugging the original non-parallelised program.
摘要翻译：描述了一种用于产生与指令流的处理有关的诊断数据的诊断方法，其中所述指令流已经从源指令流被编译以包括多个线程，所述方法包括以下步骤：（i）启动诊断过程，其中执行所述指令流的至少一部分; （ii）控制用于执行在所述指令流的所述至少一部分内的指令的调度顺序以引起线程部分序列的执行，所述序列响应于一个或多个规则来确定，所述规则中的至少一个限定所述线程部分的执行顺序遵循所述源指令流的顺序。以这种方式，诊断方法可以生成与调试原始非并行化程序时将提供的调试视图相同或至少相似的并行程序的调试视图。

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