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1. 发明授权

US07921404B2 Method of reusing constraints in PCB designs 失效
标题翻译：在PCB设计中重用约束的方法
公开(公告)号：US07921404B2
公开(公告)日：2011-04-05
申请号：US11954092
申请日：2007-12-11
申请人： Anil Bindu Lingambudi , Ankur Kanu Patel , Saravanan Sethuraman , Diyanesh Vidyapoornachary Babu Chinnakkonda
发明人： Anil Bindu Lingambudi , Ankur Kanu Patel , Saravanan Sethuraman , Diyanesh Vidyapoornachary Babu Chinnakkonda
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method is disclosed for electronically processing constraints rules defined in a previously developed first PCB design having a first constraints output file, to facilitate the development of a second PCB design having a second constraints output file. The second design has substantially identical topology to the first design and the second constraints output file comprises constraints for signals with identical attributes. The method includes several steps. Firstly, the board file of the first design is compared with the net list file of the second design to identify respective differences between the designs. On the basis of the established differences, a file attributes change report is generated. At least some data from the file attributes change report is stored into an attributes change file. Finally, the method includes the step of processing the first design constraints output file, the second design constraints output file, and the attribute change file to map constraints associated with changed attributes, thus defining a revised constraints output file for the second design. The revised second constraints output file comprises constraints for at least some signals with changed attributes.
摘要翻译：公开了一种用于电子处理在先前开发的具有第一约束输出文件的第一PCB设计中定义的约束规则的方法，以便于开发具有第二约束输出文件的第二PCB设计。第二设计具有与第一设计基本相同的拓扑，第二约束输出文件包括具有相同属性的信号的约束。该方法包括几个步骤。首先，将第一设计的板文件与第二设计的网表文件进行比较，以识别设计之间的差异。在建立的差异的基础上，生成文件属性变更报告。文件属性更改报告中的至少一些数据将存储到属性更改文件中。最后，该方法包括处理第一设计约束输出文件，第二设计约束输出文件和属性更改文件以映射与改变的属性相关联的约束的步骤，从而为第二设计定义修改的约束输出文件。修改的第二约束输出文件包括至少一些具有变化属性的信号的约束。

2. 发明申请

US20090150834A1 METHOD OF REUSING CONSTRAINTS IN PCB DESIGNS 失效
标题翻译：在PCB设计中重新制约约束的方法
公开(公告)号：US20090150834A1
公开(公告)日：2009-06-11
申请号：US11954092
申请日：2007-12-11
申请人： Anil Bindu Lingambudi , Ankur Kanu Patel , Saravanan Sethuraman , Diyanesh Vidyapoornachary Babu Chinnakkonda
发明人： Anil Bindu Lingambudi , Ankur Kanu Patel , Saravanan Sethuraman , Diyanesh Vidyapoornachary Babu Chinnakkonda
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method is disclosed for electronically processing constraints rules defined in a previously developed first PCB design having a first constraints output file, to facilitate the development of a second PCB design having a second constraints output file. The second design has substantially identical topology to the first design and the second constraints output file comprises constraints for signals with identical attributes. The method includes several steps. Firstly, the board file of the first design is compared with the net list file of the second design to identify respective differences between the designs. On the basis of the established differences, a file attributes change report is generated. At least some data from the file attributes change report is stored into an attributes change file. Finally, the method includes the step of processing the first design constraints output file, the second design constraints output file, and the attribute change file to map constraints associated with changed attributes, thus defining a revised constraints output file for the second design. The revised second constraints output file comprises constraints for at least some signals with changed attributes.
摘要翻译：公开了一种用于电子处理在先前开发的具有第一约束输出文件的第一PCB设计中定义的约束规则的方法，以便于开发具有第二约束输出文件的第二PCB设计。第二设计具有与第一设计基本相同的拓扑，第二约束输出文件包括具有相同属性的信号的约束。该方法包括几个步骤。首先，将第一设计的板文件与第二设计的网表文件进行比较，以识别设计之间的差异。在建立的差异的基础上，生成文件属性变更报告。文件属性更改报告中的至少一些数据将存储到属性更改文件中。最后，该方法包括处理第一设计约束输出文件，第二设计约束输出文件和属性更改文件以映射与改变的属性相关联的约束的步骤，从而为第二设计定义修改的约束输出文件。修改的第二约束输出文件包括至少一些具有变化属性的信号的约束。

3. 发明授权

US07979823B2 Identification of voltage reference errors in PCB designs 有权
标题翻译：识别PCB设计中的电压参考误差
公开(公告)号：US07979823B2
公开(公告)日：2011-07-12
申请号：US12193119
申请日：2008-08-18
申请人： Anil Bindu Lingambudi , Saravanan Sethuraman , Anandavally Sreekala
发明人： Anil Bindu Lingambudi , Saravanan Sethuraman , Anandavally Sreekala
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Disclosed is a computer implemented method for determining a voltage reference error in a PCB design comprising receiving information about said PCB design, identifying a signal associated with said design, receiving one or more user defined voltage references for said signal, and comparing the user defined voltage reference to the voltages of the power planes adjacent to said signal.
摘要翻译：公开了一种用于确定PCB设计中的电压参考误差的计算机实现方法，包括接收关于所述PCB设计的信息，识别与所述设计相关联的信号，接收用于所述信号的一个或多个用户定义的电压参考，以及将用户定义的电压参考与所述信号相邻的电力平面的电压。

4. 发明申请

US20100042961A1 IDENTIFICATION OF VOLTAGE REFERENCE ERRORS IN PCB DESIGNS 有权
标题翻译： PCB设计中电压参考误差的识别
公开(公告)号：US20100042961A1
公开(公告)日：2010-02-18
申请号：US12193119
申请日：2008-08-18
申请人： Anil Bindu Lingambudi , Saravanan Sethuraman , Anandavally Sreekala
发明人： Anil Bindu Lingambudi , Saravanan Sethuraman , Anandavally Sreekala
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Disclosed is a computer implemented method for determining a voltage reference error in a PCB design comprising receiving information about said PCB design, identifying a signal associated with said design, receiving one or more user defined voltage references for said signal, and comparing the user defined voltage reference to the voltages of the power planes adjacent to said signal.
摘要翻译：公开了一种用于确定PCB设计中的电压参考误差的计算机实现方法，包括接收关于所述PCB设计的信息，识别与所述设计相关联的信号，接收用于所述信号的一个或多个用户定义的电压参考，以及将用户定义的电压参考与所述信号相邻的电力平面的电压。

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