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    • 5. 发明申请
    • Method for performing video communication service and mobile communication terminal employing the same
    • 执行视频通信业务的方法及采用该方法的移动通信终端
    • US20070064093A1
    • 2007-03-22
    • US11434135
    • 2006-05-16
    • Soo-Young NamChae-Whan Lim
    • Soo-Young NamChae-Whan Lim
    • H04N7/14
    • H04N7/147H04N21/41407H04N21/44008H04N21/44016H04N21/458
    • Disclosed is a method for performing a video communication service in a mobile communication terminal, including: presetting image data for substituting for video data transmitted from a transmission-side terminal; determining if the video data transmitted from the transmission-side terminal are abnormal data in video communication; and when the video data are abnormal data, replacing the video data with the preset image data and displaying the image data. When video data transmitted from a transmission-side terminal are abnormal data in video communication, image data set by a user are output instead of the abnormal data, so that a video communication service can be performed without the stoppage or distortion of a video data output screen. When any video data are not transmitted from a transmission-side terminal in video communication, image data set by a user are displayed so that a video communication service even can be efficiently performed.
    • 公开了一种用于在移动通信终端中执行视频通信服务的方法,包括:预置用于代替从发送侧终端发送的视频数据的图像数据; 确定从发送侧终端发送的视频数据是否是视频通信中的异常数据; 并且当视频数据是异常数据时,用预设图像数据替换视频数据并显示图像数据。 当从发送侧终端发送的视频数据是视频通信中的异常数据时,输出由用户设置的图像数据而不是异常数据,使得可以执行视频通信服务而没有视频数据输出的停止或失真 屏幕。 当在视频通信中没有从发送侧终端发送任何视频数据时,显示由用户设置的图像数据,使得甚至可以有效地执行视频通信服务。
    • 7. 发明申请
    • Apparatus and method for composing a cache memory of a wireless terminal having a coprocessor
    • 用于构成具有协处理器的无线终端的高速缓冲存储器的装置和方法
    • US20050038962A1
    • 2005-02-17
    • US10917491
    • 2004-08-13
    • Chae-Whan Lim
    • Chae-Whan Lim
    • H04B1/40G06F12/00G06F12/08
    • G06F12/0806Y02D10/13
    • A terminal apparatus and method for controlling access to a buses connecting memories by a processor and coprocessor. The apparatus and method comprise a first flash memory connected to the second data bus and having a first area for storing operation programs of the main processor and a second area for storing operation programs of the coprocessor; a second flash memory connected to the second data bus and having a first area for storing data requiring non-volatility of the main processor, and a second area for storing data requiring non-volatility of the coprocessor; a random access memory connected to the second data bus and having a first area and a second area, the first area temporarily storing data occurring during an operation of the main processor and allowing a portion of a code which is executed in a random access memory area to be loaded in the first area, and the second area temporarily storing data occurring during an operation of the coprocessor and allowing a portion of the code which is executed in the random access memory area to be loaded in the second area; a cache memory connected between the first data bus and the second data bus for caching the data and the codes of the first areas of the random access memory and the flash memories; and a cache controller connected to the first data bus, for determining whether or not a cache hit or a cache miss occurs in the cache memory, controlling the main processor to access the cached data or codes when the cache hit occurs in the cache memory, and accessing the memories to store the data or the codes in the cache memory and simultaneously controlling the main processor to access when the cache miss occurs in the cache memory.
    • 一种用于控制通过处理器和协处理器连接存储器的总线的访问的终端装置和方法。 该装置和方法包括连接到第二数据总线的第一闪速存储器,并具有用于存储主处理器的操作程序的第一区域和用于存储协处理器的操作程序的第二区域; 连接到所述第二数据总线的第二闪速存储器,具有用于存储需要所述主处理器的非易失性的数据的第一区域和用于存储需要所述协处理器的非易失性的数据的第二区域; 连接到第二数据总线并具有第一区域和第二区域的随机存取存储器,第一区域临时存储在主处理器的操作期间发生的数据,并允许在随机存取存储区域中执行的代码的一部分 被加载到第一区域中,并且第二区域临时存储在协处理器的操作期间发生的数据,并且允许在随机存取存储区域中执行的代码的一部分被加载到第二区域中; 连接在第一数据总线和第二数据总线之间的高速缓冲存储器,用于高速缓存数据和随机存取存储器和闪速存储器的第一区域的代码; 以及连接到第一数据总线的高速缓存控制器,用于确定在高速缓存存储器中是否发生高速缓存命中或高速缓存未命中,当高速缓存命中发生在高速缓冲存储器中时,控制主处理器访问缓存的数据或代码, 以及访问存储器以将数据或代码存储在高速缓冲存储器中,并且当高速缓存未命中在高速缓冲存储器中发生时同时控制主处理器进行访问。
    • 8. 发明授权
    • Apparatus and method for composing a cache memory of a wireless terminal having a coprocessor
    • 用于构成具有协处理器的无线终端的高速缓冲存储器的装置和方法
    • US07484047B2
    • 2009-01-27
    • US10917491
    • 2004-08-13
    • Chae-Whan Lim
    • Chae-Whan Lim
    • G06F12/00G06F13/00G06F13/28
    • G06F12/0806Y02D10/13
    • A terminal apparatus and method for controlling access by a processor and coprocessor to data buses that connect memories. The apparatus and method comprise a first flash memory connected to a second data bus and having a first area for storing operation programs of the main processor and a second area for storing operation programs of the coprocessor; a second flash memory connected to the second data bus and having a first area for storing data requiring non-volatility of the main processor, and a second area for storing data requiring non-volatility of the coprocessor; a random access memory connected to the second data bus and having a first area and a second area, the first area temporarily storing data occurring during an operation of the main processor and allowing a portion of a code which is executed in a random access memory area to be loaded in the first area, and the second area temporarily storing data occurring during an operation of the coprocessor and allowing a portion of the code which is executed in the random access memory area to be loaded in the second area; a cache memory connected between a first data bus and the second data bus for caching the data and the codes of the first areas of the random access memory and the flash memories; and a cache controller connected to the first data bus, for determining whether or not a cache hit or a cache miss occurs in the cache memory, controlling the main processor to access the cached data or codes when the cache hit occurs in the cache memory, and accessing the memories to store the data or the codes in the cache memory and simultaneously controlling the main processor to access when the cache miss occurs in the cache memory.
    • 一种用于控制由处理器和协处理器访问连接存储器的数据总线的终端装置和方法。 该装置和方法包括连接到第二数据总线的第一闪速存储器,并具有用于存储主处理器的操作程序的第一区域和用于存储协处理器的操作程序的第二区域; 连接到所述第二数据总线的第二闪速存储器,具有用于存储需要所述主处理器的非易失性的数据的第一区域和用于存储需要所述协处理器的非易失性的数据的第二区域; 连接到第二数据总线并具有第一区域和第二区域的随机存取存储器,第一区域临时存储在主处理器的操作期间发生的数据,并允许在随机存取存储区域中执行的代码的一部分 被加载到第一区域中,并且第二区域临时存储在协处理器的操作期间发生的数据,并且允许在随机存取存储区域中执行的代码的一部分被加载到第二区域中; 连接在第一数据总线和第二数据总线之间的高速缓冲存储器,用于缓存数据和随机存取存储器和闪速存储器的第一区域的代码; 以及连接到第一数据总线的高速缓存控制器,用于确定在高速缓存存储器中是否发生高速缓存命中或高速缓存未命中,当高速缓存命中发生在高速缓冲存储器中时,控制主处理器访问缓存的数据或代码, 以及访问存储器以将数据或代码存储在高速缓冲存储器中,并且当高速缓存未命中在高速缓冲存储器中发生时同时控制主处理器进行访问。
    • 9. 发明授权
    • Apparatus and method for improving the quality of a picture having a high illumination difference
    • 用于提高具有高照明差异的图像的质量的装置和方法
    • US07450782B2
    • 2008-11-11
    • US10926101
    • 2004-08-26
    • Chae-Whan LimYoung-Sik Park
    • Chae-Whan LimYoung-Sik Park
    • G06K9/36G06K9/40
    • H04N5/2355H04N5/235H04N5/765H04N5/772
    • An apparatus and image reconstruction method for use in an apparatus including a digital camera are provided. The apparatus and method include driving an image sensor during a short exposure time in an image reconstruction mode, driving the image sensor during a relatively-long exposure time in the image reconstruction mode, and acquiring first and second frame images having different illumination degrees; assigning substantially identical image data of the first and second frame images to local images each having a predetermined size; calculating local variance values of image data of each of the local areas; comparing a local variance value of the first frame image with a local variance value of the second frame images, assigning a high weight to one local image having a high local variance value, and assigning a low weight to the other local image having a low local variance value; applying the determined weights to image data of individual local areas of the first and second frame images, performing image reconstruction, and displaying a reconstructed image.
    • 提供了一种用于包括数字照相机的设备中的装置和图像重建方法。 该装置和方法包括在图像重建模式中的短曝光时间内驱动图像传感器,在图像重建模式中在相对长的曝光时间内驱动图像传感器,以及获取具有不同照明度的第一和第二帧图像; 将第一和第二帧图像的基本相同的图像数据分配给每个具有预定尺寸的局部图像; 计算每个局部区域的图像数据的局部方差值; 将第一帧图像的局部方差值与第二帧图像的局部方差值进行比较,将高权重分配给具有高局部方差值的一个局部图像,并将低权重分配给具有低局部的另一局部图像 方差值; 将确定的权重应用于第一和第二帧图像的各个局部区域的图像数据,执行图像重建和显示重建的图像。
    • 10. 发明授权
    • Device and method for correcting skew of an object in an image
    • 用于校正图像中对象的偏斜的装置和方法
    • US07340110B2
    • 2008-03-04
    • US10765085
    • 2004-01-28
    • Chae-Whan LimNam-Chul KimIck-Hoon JangJun-Hyo Park
    • Chae-Whan LimNam-Chul KimIck-Hoon JangJun-Hyo Park
    • G06K9/36
    • G06K9/3283G06K2209/01
    • A device and method for correcting a skew of an object in an image. The device and method comprises an input part for receiving an image; a binarization part for binarizing pixels of the image into pixels having brightness values for character pixels and background pixels; a candidate stripe generation part for generating candidate stripes by performing dilation on character regions of the binarized image. The device and method further comprises a stripe classification part for classifying candidate stripes having a predetermined eccentricity and blob size among the candidate stripes, as valid stripes; a skew angle decision part for calculating direction angles of the classified stripes, and determining a direction angle having the largest count value as a skew angle; and a skew correction part for correcting a skew of an image by rotating the mage by the skew angle.
    • 一种用于校正图像中物体的偏斜的装置和方法。 该装置和方法包括用于接收图像的输入部分; 用于将图像的像素二值化为具有用于字符像素和背景像素的亮度值的像素的二值化部件; 用于通过对二值化图像的字符区域进行扩张来生成候选条带的候选条带生成部分。 所述装置和方法还包括条纹分类部分,用于将候选条纹之间具有预定偏心度和斑点大小的候选条纹分类为有效条纹; 用于计算分类条纹的方向角的倾斜角判定部分,以及将具有最大计数值的方向角确定为倾斜角; 以及歪斜校正部,用于通过使所述法师旋转偏斜角来校正图像的歪斜。