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    • 6. 发明申请
    • SELECTIVE PEAK POWER REDUCTION
    • 选择峰值功率降低
    • US20120275543A1
    • 2012-11-01
    • US13541348
    • 2012-07-03
    • Bradley John MorrisArthur Thomas Gerald Fuller
    • Bradley John MorrisArthur Thomas Gerald Fuller
    • H04L25/49
    • H04L25/49H04L27/2624
    • A communication system comprising signal processing circuitry and up-conversion circuitry. The signal processing circuitry is configured to: i) generate a first signal of a first modulation type and a second signal of a second modulation type; ii) combine the first and second signals to form a combined input signal; iii) generate peak reduction distortion based on the combined input signal; iv) select a portion of the peak reduction distortion that corresponds to a first frequency band; and v) apply the selected portion of the peak reduction distortion in the first frequency band of the combined input signal to provide a combined output signal. The up-conversion circuitry up-converts the combined output signal to an RF signal for transmission.
    • 一种包括信号处理电路和上转换电路的通信系统。 信号处理电路被配置为:i)产生第一调制类型的第一信号和第二调制类型的第二信号; ii)组合第一和第二信号以形成组合的输入信号; iii)基于组合的输入信号产生峰值减小失真; iv)选择对应于第一频带的峰值减小失真的一部分; 以及v)将组合输入信号的第一频带中的峰值减小失真的选定部分应用于组合输出信号。 上变频电路将组合输出信号上变频为RF信号进行传输。
    • 8. 发明申请
    • Configurable Basis-Function Generation for Nonlinear Modeling
    • 非线性建模的可配置基函数生成
    • US20120119811A1
    • 2012-05-17
    • US13119165
    • 2010-11-16
    • Chunlong BaiBradley John MorrisBrian Lehman
    • Chunlong BaiBradley John MorrisBrian Lehman
    • H03K5/08
    • H03F1/3252H03F1/3247
    • Digital predistorter circuits with selectable basis function configurations are described. In some embodiments, an input scaling block is introduced prior to a basis function generator structure. The input scaling factor is based on the input signal's average power. In other embodiments, configurable connection coefficients are used to construct the orthogonal basis functions. Multiple sets of tap weights for the predistorter are maintained, each set corresponding to a given basis function configuration. In an example method for pre-distorting an input signal to compensate for distortion introduced by an electronic device, a statistic characterizing the input signal is calculated, and one of a pre-determined set of basis function configurations is selected, based on the statistic. A set of pre-distortion model weights corresponding to the selected basis function configuration are determined, after which the selected basis function configuration and the corresponding set of pre-distortion model weights are applied to the input signal.
    • 描述了具有可选基础功能配置的数字预失真器电路。 在一些实施例中,在基函数发生器结构之前引入输入缩放块。 输入比例因子基于输入信号的平均功率。 在其他实施例中,可配置连接系数用于构建正交基函数。 维护用于预失真器的多组抽头权重,每组对应于给定的基础功能配置。 在用于对输入信号进行预失真以补偿由电子设备引入的失真的示例性方法中,计算表征输入信号的统计量,并且基于统计量来选择预定的一组基函数配置中的一个。 确定与选择的基本功能配置相对应的一组预失真模型权重,之后将所选择的基本功能配置和相应的一组预失真模型权重应用于输入信号。
    • 9. 发明授权
    • Power amplifier arrangement and method for memory correction/linearization
    • 用于存储器校正/线性化的功率放大器布置和方法
    • US07095278B2
    • 2006-08-22
    • US10900300
    • 2004-07-28
    • Arthur Thomas Gerald FullerBradley John Morris
    • Arthur Thomas Gerald FullerBradley John Morris
    • H03F1/26
    • H03F1/0211H03F1/3258H03F2200/102
    • A device, system, and method are provided for a power amplifier arrangement. In embodiments of a Vdd modulated power amplifier arrangement, a memory correction block includes a Vdd predictor for predicting waveform distortions of a Vdd modulated power supply and a main-path corrector for pre-distorting the input to the power amplifier arrangement as a function of the input to the power amplifier arrangement, an input envelope signal determined as a function of the input to the power amplifier arrangement, and an output of the Vdd predictor. Embodiments of the invention provide for operating power amplifier arrangements having memory. In some embodiments, methods of training the Vdd predictor and the main-path corrector of the memory correction block are provided.
    • 提供了用于功率放大器装置的装置,系统和方法。 在Vdd调制功率放大器装置的实施例中,存储器校正块包括用于预测Vdd调制电源的波形失真的Vdd预测器和用于将功率放大器装置的输入预失真的主路径校正器作为 输入到功率放大器装置,确定为功率放大器装置的输入的函数的输入包络信号以及Vdd预测器的输出。 本发明的实施例提供具有存储器的操作功率放大器装置。 在一些实施例中,提供训练存储器校正块的Vdd预测器和主路径校正器的方法。
    • 10. 发明授权
    • Digital transmitter and method
    • 数字发射机和方法
    • US06987953B2
    • 2006-01-17
    • US10403727
    • 2003-03-31
    • Bradley John MorrisArthur Thomas Gerald Fuller
    • Bradley John MorrisArthur Thomas Gerald Fuller
    • H04B1/02H04B1/04
    • H04B1/0483
    • A transmitter and method is provided for digitally upconverting a baseband digital signal to a modulated intermediate frequency (IF) digital signal and sigma-delta modulating the IF digital signal. The baseband digital signal is split into N phases, as can be accomplished using a polyphase interpolation technique (polyphase filter), and modulated. The modulated N phases are not recombined and each phase is further modulated, as can be accomplished using a digital-to-digital sigma-delta modulator that generates digital output signals at the same rate. A high speed digital multiplexer multiplexes the digital output signals into a single bit stream at a higher rate for subsequent power amplification and RF transmission.
    • 提供了一种发射机和方法,用于将基带数字信号数字上变频到调制中频(IF)数字信号和Σ-Δ调制IF数字信号。 基带数字信号被分为N个阶段,可以使用多相插值技术(多相滤波器)实现并进行调制。 调制的N相不被重新组合,并且每个相位被进一步调制,这可以使用以相同速率产生数字输出信号的数字 - 数字Σ-Δ调制器来实现。 高速数字多路复用器以更高的速率将数字输出信号复用为单个比特流,用于随后的功率放大和RF传输。