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1. 发明授权

US08405166B2 Dielectric layer for flash memory device and method for manufacturing thereof 有权
标题翻译：闪存器件用介质层及其制造方法
公开(公告)号：US08405166B2
公开(公告)日：2013-03-26
申请号：US12962288
申请日：2010-12-07
申请人： Christoph Adelmann , Johan Swerts , Sven Van Elshocht , Jorge Kittl
发明人： Christoph Adelmann , Johan Swerts , Sven Van Elshocht , Jorge Kittl
IPC分类号： H01L29/51 , H01L21/473
CPC分类号： H01L21/31691 , H01L21/02178 , H01L21/02192 , H01L21/02197 , H01L21/02304 , H01L21/02362 , H01L21/28273 , H01L21/28282 , H01L29/42332 , H01L29/7881 , H01L29/792
摘要： The present disclosure is related to a dielectric layer comprising a rare-earth aluminate (RExAl2-xO3 with 0
摘要翻译：本公开涉及包含稀土铝酸盐（RE x Al 2-x O 3，0

2. 发明申请

US20110147900A1 DIELECTRIC LAYER FOR FLASH MEMORY DEVICE AND METHOD FOR MANUFACTURING THEREOF 有权
标题翻译：用于闪存存储器件的电介质层及其制造方法
公开(公告)号：US20110147900A1
公开(公告)日：2011-06-23
申请号：US12962288
申请日：2010-12-07
申请人： Christoph Adelmann , Johan Swerts , Sven Van Elshocht , Jorge Kittl
发明人： Christoph Adelmann , Johan Swerts , Sven Van Elshocht , Jorge Kittl
IPC分类号： H01L23/58 , H01L21/316
CPC分类号： H01L21/31691 , H01L21/02178 , H01L21/02192 , H01L21/02197 , H01L21/02304 , H01L21/02362 , H01L21/28273 , H01L21/28282 , H01L29/42332 , H01L29/7881 , H01L29/792
摘要： The present disclosure is related to a dielectric layer comprising a rare-earth aluminate (RExAl2-xO3 with 0
摘要翻译：本公开涉及包含稀土铝酸盐（RE x Al 2-x O 3，0

3. 发明授权

US09343298B2 Metal-insulator-metal capacitor and method for manufacturing thereof 有权
标题翻译：金属绝缘体金属电容器及其制造方法
公开(公告)号：US09343298B2
公开(公告)日：2016-05-17
申请号：US13245247
申请日：2011-09-26
申请人： Mihaela Ioana Popovici , Johan Swerts , Malgorzata Pawlak , Kazuyuki Tomida , Min-Soo Kim , Jorge Kittl , Sven Van Elshocht
发明人： Mihaela Ioana Popovici , Johan Swerts , Malgorzata Pawlak , Kazuyuki Tomida , Min-Soo Kim , Jorge Kittl , Sven Van Elshocht
IPC分类号： B05D5/12 , H01L21/02 , C23C16/40 , C23C16/455 , H01L49/02
CPC分类号： H01L21/02356 , C23C16/409 , C23C16/45529 , H01L21/02197 , H01L21/0228 , H01L21/02304 , H01L28/56
摘要： The disclosure provides a method for producing a stack of layers on a semiconductor substrate. The method includes producing a substrate a first conductive layer; and producing by ALD a sub-stack of layers on said conductive layer, at least one of said layers of the sub-stack being a TiO2 layer, the other layers of the sub-stack being layers of a dielectric material having a composition suitable to form a cubic perovskite phase upon crystallization of said sub-stack of layers. Crystallization is obtained via heat treatment. When used in a metal-insulator-metal capacitor, the stack of layers can provide improved characteristics as a consequence of the TiO2 layer being present in the sub-stack.
摘要翻译：本公开提供了一种在半导体衬底上制造层叠层的方法。该方法包括：制备基板第一导电层; 并且通过ALD在所述导电层上产生一层次叠层，所述子堆叠中的至少一层是TiO 2层，所述子堆叠的其它层是具有适合于在所述子层叠层结晶时形成立方体钙钛矿相。通过热处理获得结晶。当用于金属 - 绝缘体 - 金属电容器时，层叠层可以提供改进的特性，因为TiO 2层存在于子层中。

4. 发明申请

US20120092807A1 Metal-Insulator-Metal Capacitor and Method for Manufacturing Thereof 有权
标题翻译：金属绝缘体金属电容器及其制造方法
公开(公告)号：US20120092807A1
公开(公告)日：2012-04-19
申请号：US13245247
申请日：2011-09-26
申请人： Mihaela Ioana Popovici , Johan Swerts , Malgorzata Pawlak , Kazuyuki Tomida , Min-Soo Kim , Jorge Kittl , Sven Van Elshocht
发明人： Mihaela Ioana Popovici , Johan Swerts , Malgorzata Pawlak , Kazuyuki Tomida , Min-Soo Kim , Jorge Kittl , Sven Van Elshocht
IPC分类号： H01G4/06 , H01G4/20 , H01L21/02
CPC分类号： H01L21/02356 , C23C16/409 , C23C16/45529 , H01L21/02197 , H01L21/0228 , H01L21/02304 , H01L28/56
摘要： The disclosure provides a method for producing a stack of layers on a semiconductor substrate. The method includes producing a substrate a first conductive layer; and producing by ALD a sub-stack of layers on said conductive layer, at least one of said layers of the sub-stack being a TiO2 layer, the other layers of the sub-stack being layers of a dielectric material having a composition suitable to form a cubic perovskite phase upon crystallization of said sub-stack of layers. Crystallization is obtained via heat treatment. When used in a metal-insulator-metal capacitor, the stack of layers can provide improved characteristics as a consequence of the TiO2 layer being present in the sub-stack.
摘要翻译：本公开提供了一种在半导体衬底上制造层叠层的方法。该方法包括：制备基板第一导电层; 并且通过ALD在所述导电层上产生一层次叠层，所述子堆叠中的至少一层是TiO 2层，所述子堆叠的其它层是具有适合于在所述子层叠层结晶时形成立方体钙钛矿相。通过热处理获得结晶。当用于金属 - 绝缘体 - 金属电容器时，层叠层可以提供改进的特性，因为TiO 2层存在于子层中。

5. 发明授权

US08649154B2 Method for producing a metal-insulator-metal capacitor for use in semiconductor devices 有权
标题翻译：一种用于半导体器件的金属 - 绝缘体 - 金属电容器的制造方法
公开(公告)号：US08649154B2
公开(公告)日：2014-02-11
申请号：US13247805
申请日：2011-09-28
申请人： Mihaela Ioana Popovici , Johan Swerts , Jorge Kittl , Sven Van Elshocht
发明人： Mihaela Ioana Popovici , Johan Swerts , Jorge Kittl , Sven Van Elshocht
IPC分类号： H01G4/30
CPC分类号： H01L21/02175 , C23C16/405 , C23C16/45527 , H01L21/02186 , H01L21/022 , H01L21/02244 , H01L21/0228 , H01L28/40 , H01L28/65 , H01L28/75
摘要： Methods of manufacturing metal-insulator-metal capacitor structures, and the metal-insulator-metal capacitor structures obtained, are disclosed. In one embodiment, a method includes providing a substrate, forming on the substrate a first metal layer comprising a first metal, and using atomic layer deposition with an H2O oxidant to deposit on the first metal layer a protective layer comprising TiO2. The method further includes using atomic layer deposition with an O3 oxidant to deposit on the protective layer a dielectric layer of a dielectric material, and forming on the dielectric layer a second metal layer comprising a second metal. In another embodiment, a metal-insulator-metal capacitor includes a bottom electrode comprising a first metal, a protective layer deposited on the bottom electrode and comprising TiO2, a dielectric layer deposited on the protective layer and comprising a dielectric material, and a top electrode formed on the dielectric layer and comprising a second metal.
摘要翻译：公开了制造金属 - 绝缘体 - 金属电容器结构的方法以及所获得的金属 - 绝缘体 - 金属电容器结构。在一个实施例中，一种方法包括提供衬底，在衬底上形成包括第一金属的第一金属层，并且使用与H 2 O氧化剂的原子层沉积在第一金属层上沉积包含TiO 2的保护层。该方法还包括使用原子层沉积与O 3氧化剂在保护层上沉积电介质材料的电介质层，并在电介质层上形成包含第二金属的第二金属层。在另一个实施例中，金属 - 绝缘体 - 金属电容器包括底部电极，其包括第一金属，沉积在底部电极上并包含TiO 2的保护层，沉积在保护层上并包括电介质材料的电介质层，以及顶部电极形成在介电层上并且包括第二金属。

6. 发明申请

US20120075767A1 Method for Producing a Metal-Insulator-Metal Capacitor for Use in Semiconductor Devices 有权
标题翻译：用于半导体器件的金属绝缘体金属电容器的制造方法
公开(公告)号：US20120075767A1
公开(公告)日：2012-03-29
申请号：US13247805
申请日：2011-09-28
申请人： Mihaela Ioana Popovici , Johan Swerts , Jorge Kittl , Sven Van Elshocht
发明人： Mihaela Ioana Popovici , Johan Swerts , Jorge Kittl , Sven Van Elshocht
IPC分类号： H01G4/30 , H01L21/02
CPC分类号： H01L21/02175 , C23C16/405 , C23C16/45527 , H01L21/02186 , H01L21/022 , H01L21/02244 , H01L21/0228 , H01L28/40 , H01L28/65 , H01L28/75
摘要： Methods of manufacturing metal-insulator-metal capacitor structures, and the metal-insulator-metal capacitor structures obtained, are disclosed. In one embodiment, a method includes providing a substrate, forming on the substrate a first metal layer comprising a first metal, and using atomic layer deposition with an H2O oxidant to deposit on the first metal layer a protective layer comprising TiO2. The method further includes using atomic layer deposition with an O3 oxidant to deposit on the protective layer a dielectric layer of a dielectric material, and forming on the dielectric layer a second metal layer comprising a second metal. In another embodiment, a metal-insulator-metal capacitor includes a bottom electrode comprising a first metal, a protective layer deposited on the bottom electrode and comprising TiO2, a dielectric layer deposited on the protective layer and comprising a dielectric material, and a top electrode formed on the dielectric layer and comprising a second metal.
摘要翻译：公开了制造金属 - 绝缘体 - 金属电容器结构的方法以及所获得的金属 - 绝缘体 - 金属电容器结构。在一个实施例中，一种方法包括提供衬底，在衬底上形成包括第一金属的第一金属层，并且使用与H 2 O氧化剂的原子层沉积在第一金属层上沉积包含TiO 2的保护层。该方法还包括使用原子层沉积与O 3氧化剂在保护层上沉积电介质材料的电介质层，并在电介质层上形成包含第二金属的第二金属层。在另一个实施例中，金属 - 绝缘体 - 金属电容器包括底部电极，其包括第一金属，沉积在底部电极上并包含TiO 2的保护层，沉积在保护层上并包括电介质材料的电介质层，以及顶部电极形成在介电层上并且包括第二金属。

7. 发明申请

US20070080408A1 Method for forming a silicidated contact 审中-公开
标题翻译：形成硅化接触的方法
公开(公告)号：US20070080408A1
公开(公告)日：2007-04-12
申请号：US11246516
申请日：2005-10-07
申请人： Philippe Absil , Jorge Kittl
发明人： Philippe Absil , Jorge Kittl
IPC分类号： H01L29/78 , H01L21/8234
CPC分类号： H01L21/823835 , H01L21/28052 , H01L21/28518 , H01L21/823814 , H01L21/82385 , H01L29/78
摘要： A method is described for forming an at least partially silicided contact. In one embodiment, a hardmask is deposited over a contact. A coating of sacrificial material is then provided on top of the hardmask. The sacrificial material coating is etched back until the top of the contact is exposed. The contact is then opened, the sacrificial material is removed, and a silicidation of the contact is performed.
摘要翻译：描述了形成至少部分硅化物接触的方法。在一个实施例中，硬掩模沉积在触点上。然后在硬掩模的顶部提供牺牲材料涂层。将牺牲材料涂层回蚀刻直到接触的顶部露出。然后打开接触，去除牺牲材料，并进行接触的硅化。

8. 发明申请

US20060073656A1 Method and system for improved nickel silicide 有权
公开(公告)号：US20060073656A1
公开(公告)日：2006-04-06
申请号：US10959674
申请日：2004-10-04
申请人： Amitabh Jain , Peijun Chen , Jorge Kittl
发明人： Amitabh Jain , Peijun Chen , Jorge Kittl
IPC分类号： H01L21/8238 , H01L21/44
CPC分类号： H01L21/28518 , H01L21/823807 , H01L21/823835 , H01L29/665 , H01L29/78
摘要： According to one embodiment of the invention, a method for nickel silicidation includes providing a substrate having a source region, a gate region, and a drain region, forming a source in the source region and a drain in the drain region, annealing the source and the drain, implanting, after the annealing the source and the drain, a heavy ion in the source region and the drain region, depositing a nickel layer in each of the source and drain regions, and heating the substrate to form a nickel silicide region in each of the source and drain regions by heating the substrate.

9. 发明申请

US20120138928A1 Method of Manufacturing Low Resistivity Contacts on n-Type Germanium 有权
标题翻译：在n型锗上制造低电阻率接触的方法
公开(公告)号：US20120138928A1
公开(公告)日：2012-06-07
申请号：US13310945
申请日：2011-12-05
申请人： Koen Martens , Roger Loo , Jorge Kittl
发明人： Koen Martens , Roger Loo , Jorge Kittl
IPC分类号： H01L29/04 , H01L29/165 , H01L21/20
CPC分类号： H01L21/28525
摘要： Disclosed are methods for manufacturing semiconductor devices and the devices thus obtained. In one embodiment, the method comprises obtaining a semiconductor substrate comprising a germanium region doped with n-type dopants at a first doping level and forming an interfacial silicon layer overlying the germanium region, where the interfacial silicon layer is doped with n-type dopants at a second doping level and has a thickness higher than a critical thickness of silicon on germanium, such that the interfacial layer is at least partially relaxed. The method further includes forming over the interfacial silicon layer a layer of material having an electrical resistivity smaller than 1×10−2 Ωcm, thereby forming an electrical contact between the germanium region and the layer of material, wherein the electrical contact has a specific contact resistivity below 10−4 Ωcm2.
摘要翻译：公开了用于制造半导体器件的方法和由此获得的器件。在一个实施例中，该方法包括获得半导体衬底，该半导体衬底包括在第一掺杂水平掺杂有n型掺杂剂的锗区域，并形成覆盖在锗区域上的界面硅层，其中界面硅层掺杂有n型掺杂剂第二掺杂水平并且具有高于锗上的硅的临界厚度的厚度，使得界面层至少部分地松弛。该方法还包括在界面硅层上形成电阻率小于1×10-2＆OHgr·cm的材料层，从而在锗区和材料层之间形成电接触，其中电接触具有比接触电阻率低于10-4＆OHgr。cm2。

10. 发明申请

US20100072531A1 Method for Forming a Memory Cell Comprising a Capacitor Having a Strontium Titaniumoxide Based Dielectric Layer and Devices Obtained Thereof 审中-公开
标题翻译：形成具有基于锶二氧化钛的电介质层的电容器的存储单元的方法及其获得的器件
公开(公告)号：US20100072531A1
公开(公告)日：2010-03-25
申请号：US12564577
申请日：2009-09-22
申请人： Jorge Kittl , Mihaela Ioana Popovici , Nicolas Menou , Dirk Wouters
发明人： Jorge Kittl , Mihaela Ioana Popovici , Nicolas Menou , Dirk Wouters
IPC分类号： H01L27/06 , H01G4/008 , B05D5/12
CPC分类号： H01L21/02197 , C23C16/409 , C23C16/45531 , H01L21/02282 , H01L21/02356 , H01L21/3141 , H01L21/31691 , H01L27/1085 , H01L27/11507 , H01L28/55
摘要： A method is disclosed for manufacturing SrxTiyO3 based metal-insulator-metal (MIM) capacitors using a low temperature Atomic Layer Deposition (ALD) process. Preferably TiN is used to form the bottom electrode. The Sr/Ti ratio in the SrxTiyO3 dielectric layer of the capacitor can be varied to tune the electric properties of the capacitor. The dielectric constant and the leakage current of the SrxTiyO3 dielectric layer decrease monotonously with the Sr content of this SrxTi1-xO3 dielectric layer. By increasing the Sr content at the interface between the SrxTiyO3 dielectric layer and the TiN bottom electrode, the interfacial equivalent-oxide thickness (EOT) can be further reduced.
摘要翻译：公开了一种使用低温原子层沉积（ALD）工艺制造SrxTiyO3基金属 - 绝缘体 - 金属（MIM）电容器的方法。优选地，TiN用于形成底部电极。可以改变电容器的SrxTiyO3电介质层中的Sr / Ti比以调节电容器的电性能。 SrxTiyO3电介质层的介电常数和漏电流与SrxTi1-xO3介电层的Sr含量单调下降。通过提高SrxTiyO3介电层和TiN底电极之间的界面处的Sr含量，可以进一步降低界面等效氧化物厚度（EOT）。

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