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1. 发明授权

US07804349B2 Timing signal generator providing synchronized timing signals at non-integer clock multiples adjustable by more than one period 有权
标题翻译：定时信号发生器提供以不止一个周期调整的非整数时钟倍数的同步定时信号
公开(公告)号：US07804349B2
公开(公告)日：2010-09-28
申请号：US12337999
申请日：2008-12-18
申请人： Christopher C. Jones , Michael F. McGoldrick
发明人： Christopher C. Jones , Michael F. McGoldrick
IPC分类号： H03K3/00
CPC分类号： G06F1/08 , G01R31/31726
摘要： A system for providing a plurality of synchronous timing signals having period values that are not even multiples of the clock period including a plurality of local edge generators receiving the clock signals, each local generator including local programmable means to record an absolute time at which to generate a timing signal in the current or future period and the means to generate that timing signal at a synchronous even sub-division of the clock period resolution. A separate time value is maintained allowing generated timing signals to be delayed by more than one period. An output delay circuit generates the timing signal responsive to a future time value and a phase offset. The phase offset can be provided using a clock multiplier and serial parallel converter to simplify hardware realizations.
摘要翻译：一种用于提供多个同步定时信号的系统，其具有不包括接收时钟信号的多个本地边沿发生器的时钟周期的偶数倍的周期值，每个本地生成器包括本地可编程装置，以记录产生的绝对时间当前或未来周期中的定时信号以及在时钟周期分辨率的同步偶分割时产生该定时信号的装置。保持单独的时间值，允许产生的定时信号延迟多于一个周期。输出延迟电路响应于未来时间值和相位偏移产生定时信号。可以使用时钟乘法器和串行并行转换器来提供相位偏移，以简化硬件实现。

2. 发明授权

US07395479B2 Over-voltage test for automatic test equipment 有权
标题翻译：自动测试设备的过电压测试
公开(公告)号：US07395479B2
公开(公告)日：2008-07-01
申请号：US11036850
申请日：2005-01-14
申请人： Tushar K. Gohel , Michael F. McGoldrick
发明人： Tushar K. Gohel , Michael F. McGoldrick
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G01R31/31924 , G01R1/36 , G01R31/2834
摘要： Automatic test equipment including a digital test instrument that may test for and respond to over-voltage conditions. Information on over-voltage conditions may be used in detecting or diagnosing fault conditions within a system under test. Over-voltage conditions may be monitored as part of a test to determine the time and the channels on which they occur. A test may fail if an over-voltage condition is detected and the results of the test may indicate when and where the over-voltage condition occurred. Alternatively, indications of over-voltage conditions may be used to alter the test environment. In response to an over-voltage condition, units under test may be disconnected from the test environment to avoid exposing circuitry within those units to voltage levels that may damage or stress components. Alternatively, indications of an over-voltage condition may be used to disconnect from the test environment equipment that may be generating the over-voltage conditions. Over-voltage conditions are detected in a digital test instrument by additional comparators included in the channel electronic circuits of the test instrument.
摘要翻译：自动测试设备包括可以测试和应对过电压条件的数字测试仪器。有关过电压状态的信息可用于检测或诊断被测系统内的故障状况。作为测试的一部分，可以监视过电压状况，以确定它们发生的时间和通道。如果检测到过电压条件，测试结果可能会失败，并且测试结果可能指示发生过电压状况的时间和地点。或者，可以使用过电压条件的指示来改变测试环境。为了应对过电压状况，被测单元可能与测试环境断开连接，以避免将这些单元内的电路暴露于可能损坏或应力部件的电压电平。或者，可以使用过压状态的指示来与可能产生过电压状况的测试环境设备断开连接。在测试仪器的通道电子电路中包含的附加比较器在数字测试仪器中检测到过电压状况。

3. 发明授权

US07788564B2 Adjustable test pattern results latency 有权
标题翻译：可调测试模式结果延迟
公开(公告)号：US07788564B2
公开(公告)日：2010-08-31
申请号：US11986508
申请日：2007-11-21
申请人： Michael F. McGoldrick , William T. Borroz , Stephen K. Eng , David A. Milley
发明人： Michael F. McGoldrick , William T. Borroz , Stephen K. Eng , David A. Milley
IPC分类号： G06F11/00
CPC分类号： G11C29/10 , G01R31/31726 , G01R31/31813 , G11C29/56
摘要： A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequence of test patterns to a unit under test, a pattern results collection unit configured to receive at least one result value from the unit under test and to determine a pass/fail result for at least one supplied test pattern, and a synchronization unit configured to provide a no-result indication to the pattern controller during a preset number of pattern cycles following the start of a test, the preset number of pattern cycles based on a results latency of the test instrument, and to provide pass/fail results to the pattern controller after the preset number of pattern cycles.
摘要翻译：数字测试仪器和测试方法提供可调节的结果延迟。数字测试仪器包括模式控制器，其被配置为生成测试模式序列，至少部分地响应于通过/失败结果;模式存储器，被配置为将生成的测试模式序列提供给被测单元，模式结果收集单元，被配置为从被测单元接收至少一个结果值，并且确定至少一个所提供的测试模式的通过/失败结果;以及同步单元，被配置为在模式控制器期间向模式控制器提供无结果指示在测试开始之后的预设数量的模式周期，基于测试仪器的结果等待时间的模式周期的预设数量，并且在预设的模式周期数之后向模式控制器提供通过/失败结果。

4. 发明申请

US20090100303A1 Adjustable test pattern results latency 有权
标题翻译：可调测试模式结果延迟
公开(公告)号：US20090100303A1
公开(公告)日：2009-04-16
申请号：US11986508
申请日：2007-11-21
申请人： Michael F. McGoldrick , William T. Borroz , Stephen K. Eng , David A. Milley
发明人： Michael F. McGoldrick , William T. Borroz , Stephen K. Eng , David A. Milley
IPC分类号： G11C29/00
CPC分类号： G11C29/10 , G01R31/31726 , G01R31/31813 , G11C29/56
摘要： A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequence of test patterns to a unit under test, a pattern results collection unit configured to receive at least one result value from the unit under test and to determine a pass/fail result for at least one supplied test pattern, and a synchronization unit configured to provide a no-result indication to the pattern controller during a preset number of pattern cycles following the start of a test, the preset number of pattern cycles based on a results latency of the test instrument, and to provide pass/fail results to the pattern controller after the preset number of pattern cycles.
摘要翻译：数字测试仪器和测试方法提供可调节的结果延迟。数字测试仪器包括模式控制器，其被配置为生成测试模式序列，至少部分地响应于通过/失败结果;模式存储器，被配置为将生成的测试模式序列提供给被测单元，模式结果收集单元，被配置为从被测单元接收至少一个结果值，并且确定至少一个提供的测试模式的通过/失败结果;以及同步单元，被配置为在模式控制器期间向模式控制器提供无结果指示在测试开始之后的预设数量的模式周期，基于测试仪器的结果等待时间的模式周期的预设数量，并且在预设的模式周期数之后向模式控制器提供通过/失败结果。

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