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1. 发明申请

US20170317247A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING GANG BONDING AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME 审中-公开
公开(公告)号：US20170317247A1
公开(公告)日：2017-11-02
申请号：US15646099
申请日：2017-07-11
申请人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
发明人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
IPC分类号： H01L33/50 , H01L33/44 , H01L23/00 , H01L33/00 , H01L23/498 , H01L33/36 , H01L33/48
CPC分类号： H01L33/507 , H01L23/49805 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/27 , H01L24/32 , H01L24/33 , H01L24/83 , H01L24/94 , H01L33/005 , H01L33/0079 , H01L33/0095 , H01L33/36 , H01L33/44 , H01L33/486 , H01L33/50 , H01L2224/04026 , H01L2224/05073 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05553 , H01L2224/05571 , H01L2224/06151 , H01L2224/11462 , H01L2224/16013 , H01L2224/16057 , H01L2224/16151 , H01L2224/27462 , H01L2224/32238 , H01L2224/325 , H01L2224/33151 , H01L2224/81893 , H01L2224/83447 , H01L2224/83455 , H01L2224/83893 , H01L2224/94 , H01L2224/97 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/12041 , H01L2924/12042 , H01L2924/15787 , H01L2933/0033 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/00
摘要： A semiconductor device including a first lead electrode and a second lead electrode; a semiconductor stack structure disposed on the member, the semiconductor stack structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a plating layer configured to bond the semiconductor stack structure to the member; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure.

2. 发明申请

US20180342653A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING CONDUCTIVE ADHESIVE AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME 审中-公开
公开(公告)号：US20180342653A1
公开(公告)日：2018-11-29
申请号：US16034963
申请日：2018-07-13
申请人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
发明人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
IPC分类号： H01L33/50 , H01L33/36 , H01L33/44 , H01L23/00 , H01L33/00 , H01L23/498 , H01L33/48
摘要： A semiconductor device including a first lead electrode and a second lead electrode on a lead frame; a semiconductor stack structure disposed on the lead frame, the semiconductor stack structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a conductive adhesive configured to bond the semiconductor stack structure to the lead frame; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure.

3. 发明申请

US20090065762A1 LIGHT EMITTING DIODE WITH IMPROVED STRUCTURE 有权
标题翻译：具有改进结构的发光二极管
公开(公告)号：US20090065762A1
公开(公告)日：2009-03-12
申请号：US12178758
申请日：2008-07-24
申请人： Chung Hoon LEE , Ki Bum NAM , Dae Sung KAL
发明人： Chung Hoon LEE , Ki Bum NAM , Dae Sung KAL
IPC分类号： H01L29/06
CPC分类号： H01L33/32 , H01L33/06 , H01L33/16
摘要： A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.
摘要翻译：用于最小化有源区中的晶体缺陷并提高有源区中的电子和空穴的复合效率的发光二极管（LED）包括在非极性衬底上生长的非极性GaN基半导体层。半导体层包括非极性N型半导体层，非极性P型半导体层和位于N型半导体层和P型半导体层之间的非极性有源区。非极性有源区层包括阱层和具有超晶格结构的势垒层。

4. 发明申请

US20150270454A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING GANG BONDING AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME 审中-公开
标题翻译：使用由其制成的ANG ING ING AND AND AND OF OF OF OF TING TING TING AME AME AME AME AME AME AME AME AME AME AME AME AME AME
公开(公告)号：US20150270454A1
公开(公告)日：2015-09-24
申请号：US14731046
申请日：2015-06-04
申请人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
发明人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
IPC分类号： H01L33/50 , H01L33/44 , H01L33/36
CPC分类号： H01L33/507 , H01L23/49805 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/27 , H01L24/32 , H01L24/33 , H01L24/83 , H01L24/94 , H01L33/005 , H01L33/0079 , H01L33/0095 , H01L33/36 , H01L33/44 , H01L33/486 , H01L33/50 , H01L2224/04026 , H01L2224/05073 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05553 , H01L2224/05571 , H01L2224/06151 , H01L2224/11462 , H01L2224/16013 , H01L2224/16057 , H01L2224/16151 , H01L2224/27462 , H01L2224/32238 , H01L2224/325 , H01L2224/33151 , H01L2224/81893 , H01L2224/83447 , H01L2224/83455 , H01L2224/83893 , H01L2224/94 , H01L2224/97 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/12041 , H01L2924/12042 , H01L2924/15787 , H01L2933/0033 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/00
摘要： A semiconductor device including a first lead electrode and a second lead electrode; a semiconductor stack structure disposed on the member, the semiconductor stack structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a plating layer configured to bond the semiconductor stack structure to the member; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure.
摘要翻译：一种半导体器件，包括第一引线电极和第二引线电极; 半导体堆叠结构，其设置在所述构件上，所述半导体堆叠结构包括第一导电半导体层，第二导电半导体层和插入在所述第一和第二导电半导体层之间的有源区; 电连接到第一导电半导体层的第一电极; 电连接到第二导电半导体层的第二电极; 电镀层，其被配置为将所述半导体堆叠结构结合到所述构件; 以及覆盖半导体堆叠结构的至少侧表面的第一波长转换器。

5. 发明申请

US20120153259A1 LIGHT EMITTING DIODE WITH IMPROVED STRUCTURE 有权
标题翻译：具有改进结构的发光二极管
公开(公告)号：US20120153259A1
公开(公告)日：2012-06-21
申请号：US13406313
申请日：2012-02-27
申请人： Chung Hoon LEE , Ki Bum NAM , Dae Sung KAL
发明人： Chung Hoon LEE , Ki Bum NAM , Dae Sung KAL
IPC分类号： H01L33/06
CPC分类号： H01L33/32 , H01L33/06 , H01L33/16
摘要： A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.
摘要翻译：用于最小化有源区中的晶体缺陷并提高有源区中的电子和空穴的复合效率的发光二极管（LED）包括在非极性衬底上生长的非极性GaN基半导体层。半导体层包括非极性N型半导体层，非极性P型半导体层和位于N型半导体层和P型半导体层之间的非极性有源区。非极性有源区层包括阱层和具有超晶格结构的势垒层。

6. 发明申请

US20090085048A1 AC LIGHT EMITTING DIODE 有权
标题翻译：交流发光二极管
公开(公告)号：US20090085048A1
公开(公告)日：2009-04-02
申请号：US12178764
申请日：2008-07-24
申请人： Chung Hoon LEE , Ki Bum NAM , Dae Won KIM
发明人： Chung Hoon LEE , Ki Bum NAM , Dae Won KIM
IPC分类号： H01L33/00
CPC分类号： H01L27/156 , H01L21/0242 , H01L21/02433 , H01L21/0254 , H01L21/02609 , H01L33/16 , H01L33/32 , H01L33/62 , H01L2224/48137
摘要： Disclosed is a light emitting diode (LED) operated by being directly connected to an AC power source. An AC LED according to the present invention comprises a plurality of light emitting cells two-dimensionally arranged on a single substrate; and wires electrically connecting the light emitting cells; wherein the light emitting cells are connected in series by the wires to form a serial array, the single substrate is a non-polar substrate, and the light emitting cells have non-polar GaN-based semiconductor layers grown on the non-polar substrate.
摘要翻译：公开了通过直接连接到AC电源来操作的发光二极管（LED）。根据本发明的交流发光二极管包括二维排列在单个基板上的多个发光单元; 以及电连接所述发光单元的电线; 其中所述发光单元通过所述导线串联连接以形成串联阵列，所述单个衬底是非极性衬底，并且所述发光单元具有在非极性衬底上生长的非极性GaN基半导体层。

7. 发明申请

US20120037881A1 LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：发光二极管及其制造方法
公开(公告)号：US20120037881A1
公开(公告)日：2012-02-16
申请号：US12983499
申请日：2011-01-03
申请人： Kwang Joong KIM , Chang Suk HAN , Kyung Hee YE , Seung Kyu CHOI , Ki Bum NAM , Nam Yoon KIM , Kyung Hae KIM , Ju Hyung YOON
发明人： Kwang Joong KIM , Chang Suk HAN , Kyung Hee YE , Seung Kyu CHOI , Ki Bum NAM , Nam Yoon KIM , Kyung Hae KIM , Ju Hyung YOON
IPC分类号： H01L33/04
CPC分类号： H01L33/06 , H01L21/0237 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/02576 , H01L21/0262 , H01L33/0025 , H01L33/007 , H01L33/025 , H01L33/04 , H01L33/32
摘要： Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the superlattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer.
摘要翻译：本发明的示例性实施例公开了一种发光二极管，其包括掺杂有硅的n型接触层，p型接触层，设置在n型接触层和p型接触层之间的有源区，超晶格所述超晶格层包括多个层，设置在所述超晶格层和所述n型接触层之间的未掺杂的中间层以及设置在所述未掺杂的中间层之间的电子增强层层和超晶格层。最靠近有源区的超晶格层的最终层被掺杂硅，并且最终层的硅掺杂浓度高于n型接触层的掺杂浓度。

8. 发明申请

US20120142134A1 METHOD OF FABRICATING LIGHT EMITTING DIODE 有权
标题翻译：制造发光二极管的方法
公开(公告)号：US20120142134A1
公开(公告)日：2012-06-07
申请号：US13150759
申请日：2011-06-01
申请人： Kwang Joong KIM , Chang Suk HAN , Seung Kyu CHOI , Ki Bum NAM , Nam Yoon KIM , Kyung Hae KIM , Ju Hyung YOON
发明人： Kwang Joong KIM , Chang Suk HAN , Seung Kyu CHOI , Ki Bum NAM , Nam Yoon KIM , Kyung Hae KIM , Ju Hyung YOON
IPC分类号： H01L33/02
CPC分类号： H01L33/007
摘要： Exemplary embodiments of the present invention relate to a method of fabricating a light emitting diode (LED). According to an exemplary embodiment of the present invention, the method includes growing a first GaN-based semiconductor layer on a substrate at a first temperature by supplying a chamber with a nitride source gas and a first metal source gas, stopping the supply of the first metal source gas and maintaining the first temperature for a first time period after stopping the supply of the first metal source gas, decreasing the temperature of the substrate to the a second temperature after the first time period elapses, growing an active layer of the first GaN-based semiconductor layer at the second temperature by supplying the chamber with a second metal source gas.
摘要翻译：本发明的示例性实施例涉及一种制造发光二极管（LED）的方法。根据本发明的示例性实施例，该方法包括通过向室提供氮化物源气体和第一金属源气体，在第一温度下在衬底上生长第一GaN基半导体层，停止第一金属源气体，并且在停止第一金属源气体的供给之后保持第一温度第一温度，在第一时间段之后将衬底的温度降低到第二温度，生长第一GaN的有源层在第二温度下通过向腔室供应第二金属源气体。

9. 发明申请

US20100032650A1 LIGHT EMITTING DIODE HAVING ALGAN BUFFER LAYER AND METHOD OF FABRICATING THE SAME 有权
标题翻译：具有ALGAN缓冲层的发光二极管及其制造方法
公开(公告)号：US20100032650A1
公开(公告)日：2010-02-11
申请号：US12571981
申请日：2009-10-01
申请人： Ki Bum NAM
发明人： Ki Bum NAM
IPC分类号： H01L33/00 , H01L21/20
CPC分类号： H01L33/007 , H01L21/0242 , H01L21/02458 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L33/12
摘要： The present invention relates to a light emitting diode having an AlxGa1-xN buffer layer and a method of fabricating the same, and more particularly, to a light emitting diode having an AlxGa1-xN buffer layer, wherein between a substrate and a GaN-based semiconductor layer, the AlxGa1-xN (0≦x≦1) buffer layer having the composition ratio x of Al decreasing from the substrate to the GaN-based semiconductor layer is interposed to reduce lattice mismatch between the substrate and the GaN-based semiconductor layer, and a method of fabricating the same. To this end, the present invention provides a light emitting diode comprising a substrate; a first conductive semiconductor layer positioned on the substrate; and an AlxGa1-xN (0≦x≦1) buffer layer interposed between the substrate and the first conductive semiconductor layer and having a composition ratio x of Al decreasing from the substrate to the first conductive semiconductor layer.
摘要翻译：本发明涉及具有Al x Ga 1-x N缓冲层的发光二极管及其制造方法，更具体地说，涉及具有Al x Ga 1-x N缓冲层的发光二极管，其中在基板和GaN基半导体层插入从衬底到GaN基半导体层的组成比x为Al的Al x Ga 1-x N（0 <= x <= 1）缓冲层以减小衬底和GaN基半导体层之间的晶格失配半导体层及其制造方法。为此，本发明提供一种包括基板的发光二极管; 位于所述基板上的第一导电半导体层; 以及插入在所述基板和所述第一导电半导体层之间并且从所述基板到所述第一导电半导体层的Al的组成比x为Al的Al x Ga 1-x N（0 <= x <= 1）缓冲层。

10. 发明申请

US20100003810A1 METHOD OF FORMING P-TYPE COMPOUND SEMICONDUCTOR LAYER 有权
标题翻译：形成P型复合半导体层的方法
公开(公告)号：US20100003810A1
公开(公告)日：2010-01-07
申请号：US12560891
申请日：2009-09-16
申请人： Ki Bum NAM , Hwa Mok KIM , James S. SPECK
发明人： Ki Bum NAM , Hwa Mok KIM , James S. SPECK
IPC分类号： H01L21/20
CPC分类号： H01L33/007 , H01L21/0254 , H01L21/02579 , H01L21/0262
摘要： A method of forming a p-type compound semiconductor layer includes increasing a temperature of a substrate loaded into a reaction chamber to a first temperature. A source gas of a Group III element, a source gas of a p-type impurity, and a source gas of nitrogen containing hydrogen are supplied into the reaction chamber to grow the p-type compound semiconductor layer. Then, the supply of the source gas of the Group III element and the source gas of the p-type impurity is stopped and the temperature of the substrate is lowered to a second temperature. The supply of the source gas of nitrogen containing hydrogen is stopped and drawn out at the second temperature, and the temperature of the substrate is lowered to room temperature using a cooling gas. Accordingly, hydrogen is prevented from bonding to the p-type impurity in the p-type compound semiconductor layer.
摘要翻译：形成p型化合物半导体层的方法包括将装载到反应室中的基板的温度升高到第一温度。将III族元素的源气体，p型杂质的源气体和含氮气的源气体供给到反应室中以使p型化合物半导体层生长。然后，停止供给III族元素的源气体和p型杂质的源气体，并将基板的温度降低到第二温度。供给含氮氢气的源气体在第二温度下停止并排出，并且使用冷却气体将基板的温度降至室温。因此，防止氢与p型化合物半导体层中的p型杂质结合。

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