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1. 发明申请

US20140362263A1 IMAGE SENSOR WITH NOISE REDUCTION 有权
标题翻译：具有噪音降低的图像传感器
公开(公告)号：US20140362263A1
公开(公告)日：2014-12-11
申请号：US14297502
申请日：2014-06-05
申请人： David Michael Boisvert , Keith Glen Fife
发明人： David Michael Boisvert , Keith Glen Fife
IPC分类号： H04N5/357
CPC分类号： H04N5/363 , H04N5/378
摘要： Systems and methods are disclosed for reducing reset noise in an image sensor. Voltage on the column read out is sensed during reset. When the voltage reaches a desired threshold level, a voltage is asserted on the column read out line that turns off the reset transistor. Using column circuitry to turn off the reset transistor may be used to reduce noise associated with the reset switch. In example embodiments, a comparator may be included on each column line to determine when the threshold voltage has been reached and to trigger the assertion of the turn off voltage on the column line.
摘要翻译：公开了用于减少图像传感器中的复位噪声的系统和方法。在复位期间，读出的电压被感测到。当电压达到所需的阈值电平时，在关闭复位晶体管的列读出线上断言电压。使用列电路来关闭复位晶体管可以用于降低与复位开关相关联的噪声。在示例实施例中，可以在每个列线上包括比较器，以确定何时已经达到阈值电压，并且触发在列线上关断电压的断言。

2. 发明授权

US07489355B2 CMOS active pixel with hard and soft reset 有权
标题翻译： CMOS有源像素，硬复位和软复位
公开(公告)号：US07489355B2
公开(公告)日：2009-02-10
申请号：US10752197
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
IPC分类号： H04N5/335
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.
摘要翻译：用于成像阵列中的像素位置的电路包括将入射光转换为光电流的光检测元件和可操作地连接到光检测元件的复位晶体管，以复位与光检测元件相关联的电压。复位晶体管硬复位与光检测元件相关联的电压，并且在与光检测元件相关联的电压的硬复位产生之后，软复位与光检测元件相关联的电压。通过将列或行线电压硬复位到第一预定电压也测量列或行线的像素电压; 将列或行线电压软复位为第一像素电压; 将列或行线电压硬复位到第二预定电压; 将列或行线电压软复位到第二像素电压; 以及确定所述第一和第二像素电压之间的差，所述差是所测量的像素电压。

3. 发明授权

US06881992B2 CMOS pixel design for minimization of defect-induced leakage current 有权
标题翻译： CMOS像素设计，可最大限度地减少缺陷感应漏电流
公开(公告)号：US06881992B2
公开(公告)日：2005-04-19
申请号：US10244723
申请日：2002-09-16
申请人： Hae-Seung Lee , Keith Glen Fife
发明人： Hae-Seung Lee , Keith Glen Fife
IPC分类号： H01L27/146 , H01L29/768 , H01L31/062
CPC分类号： H01L27/14609
摘要： A pixel site of a semiconductor imager structure includes a substrate layer of a first dopant type; a photodiode being formed of a doped well region within the substrate layer, the doped well region being of a second dopant type; a transistor wherein a terminal of the transistor being provided within the doped well region, the terminal of the transistor being of the second dopant type and of a dopant concentration greater than a dopant concentration of the doped well region; and an oxide layer formed over the substrate layer, the doped well region, and the terminal of the transistor. The oxide layer has a varying height such that a height of the oxide layer associated with the doped well region is thicker than a height of the oxide layer associated with the terminal of the transistor. The oxide layer includes a step region being located where the height of the oxide layer transitions from the height associated with the doped well region to the height associated with the terminal of the transistor. The oxide layer has a constant height across a perimeter of the doped well region that forms a depletion region with the substrate when a reverse bias voltage is applied across thereto.
摘要翻译：半导体成像器结构的像素位置包括第一掺杂剂类型的衬底层; 光电二极管由衬底层内的掺杂阱区形成，所述掺杂阱区是第二掺杂剂型; 晶体管，其中所述晶体管的端子设置在所述掺杂阱区域内，所述晶体管的端子是第二掺杂剂类型，并且掺杂剂浓度大于所述掺杂阱区域的掺杂剂浓度; 以及形成在所述基板层，所述掺杂阱区域和所述晶体管的端子之上的氧化物层。氧化物层具有变化的高度，使得与掺杂阱区相关联的氧化物层的高度比与晶体管的端子相关联的氧化物层的高度更厚。氧化物层包括步骤区域，其中氧化物层的高度从与掺杂阱区域相关联的高度转变到与晶体管的端子相关联的高度。氧化物层在掺杂阱区的周边上具有恒定的高度，当在其上施加反向偏置电压时与衬底形成耗尽区。

4. 发明授权

US07489354B2 CMOS active pixel with hard and soft reset 有权
公开(公告)号：US07489354B2
公开(公告)日：2009-02-10
申请号：US10752112
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
IPC分类号： H04N5/335
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.

5. 发明授权

US07289149B1 Operational transconductance amplifier for high-speed, low-power imaging applications 失效
标题翻译：用于高速，低功耗成像应用的运算跨导放大器
公开(公告)号：US07289149B1
公开(公告)日：2007-10-30
申请号：US10400731
申请日：2003-03-27
申请人： Hae-Seung Lee , Keith Glen Fife
发明人： Hae-Seung Lee , Keith Glen Fife
IPC分类号： H04N5/235 , H04N5/228 , H04N3/14 , H04N5/335
CPC分类号： H04N5/378 , H03F1/26 , H03F3/08 , H03F3/45192 , H03F3/45475 , H03F2200/372 , H03F2203/45028 , H03F2203/45134 , H03F2203/45138 , H03F2203/45302 , H04N5/357
摘要： A low power imaging array has a plurality of pixels wherein each pixel converts an intensity of incident light into electrical energy. An operational transconductance amplifier is utilized in conjunction with the imaging array to process the image signals from the low power imaging array. The operational transconductance amplifier includes a current mirror stage with a current mirror gain factor. The current mirror gain factor is selected based on a pixel noise level introduced by the low power imaging array such that current mirror gain factor noise introduced by the current mirror gain factor results in an overall noise level that is less than or equal to a predetermined level.
摘要翻译：低功率成像阵列具有多个像素，其中每个像素将入射光的强度转换成电能。结合成像阵列利用运算跨导放大器来处理来自低功率成像阵列的图像信号。运算跨导放大器包括具有电流镜增益系数的电流镜级。基于由低功率成像阵列引入的像素噪声电平来选择电流镜增益因子，使得由电流镜增益因子引入的电流镜增益因子噪声导致小于或等于预定电平的总噪声电平。

6. 发明授权

US07173666B1 System and method for displaying a non-standard aspect ratio image on a standard aspect ratio monitor 失效
标题翻译：在标准宽高比监视器上显示非标准宽高比图像的系统和方法
公开(公告)号：US07173666B1
公开(公告)日：2007-02-06
申请号：US10225925
申请日：2002-08-22
申请人： Ichiro Masaki , Vivek Sikri , Nilesh Agarwalla , Keith Glen Fife
发明人： Ichiro Masaki , Vivek Sikri , Nilesh Agarwalla , Keith Glen Fife
IPC分类号： H04N7/01
CPC分类号： H04N9/641 , H04N5/145 , H04N5/23293 , H04N5/335 , H04N5/45 , H04N7/01 , H04N7/0122 , H04N21/4314 , H04N21/4316 , H04N21/44008 , H04N21/440272
摘要： An area is imaged with a non-standard aspect ratio, e.g. wide aspect ratio, digital imager to produce pixels of image data. At least a portion of the produced pixels of image data corresponding to the captured non-standard aspect ratio image is displayed beginning, for a given frame of pixels of image data, at a column of pixels of image data corresponding to a predetermined column of imaged pixels. The number of columns of display pixels is different than the number of columns of imaged pixels. Motion is detected in the imaged pixels so that a motion responsive portion of the imaged pixels corresponding to the captured non-standard aspect ratio image corresponding to a window of the imaged pixels having motion detected therein can be displayed.
摘要翻译：以非标准长宽比成像区域，例如，宽宽比，数字成像器产生图像数据的像素。对于给定的图像数据的像素，对应于所捕获的非标准宽高比图像的所产生的图像数据的至少一部分像素被显示在对应于预定的成像列的图像数据的像素列上像素。显示像素的列数与成像像素的列数不同。在成像像素中检测运动，使得可以显示对应于与其中检测到运动的成像像素的窗口对应的所捕获的非标准宽高比图像的成像像素的运动响应部分。

7. 发明授权

US06903670B1 Circuit and method for cancellation of column pattern noise in CMOS imagers 有权
标题翻译： CMOS成像器中列模式噪声消除的电路和方法
公开(公告)号：US06903670B1
公开(公告)日：2005-06-07
申请号：US10679755
申请日：2003-10-06
申请人： Hae-Seung Lee , Keith Glen Fife
发明人： Hae-Seung Lee , Keith Glen Fife
IPC分类号： H03M1/10 , H03M1/12 , H03M1/06
CPC分类号： H03M1/1038 , H03M1/123
摘要： A circuit and method measure the output voltage of a CMOS pixel in a manner that substantially reduces all columnar pattern noise due to mismatches in the signal processing circuits including the correlated double sampling amplifiers and A/D converters. The circuit includes a test switch, operatively connected between a reference voltage source and a correlated double sampling amplifier, for applying a test voltage from the reference voltage source when the state of the test switch is ON to the correlated double sampling amplifier. The reference voltage source produces a voltage corresponding to a full-scale voltage level to enable the determination of a gain error in the correlated double sampling amplifier and/or A/D converter; a voltage corresponding to ground to enable the determination of an offset error in the correlated double sampling amplifier and/or A/D converter; and a plurality of analog voltages ranging from analog ground to a full-scale voltage level to enable the determination of non-linearity errors in the A/D converter.
摘要翻译：电路和方法以基本上减少由于包括相关双采样放大器和A / D转换器在内的信号处理电路中的不匹配而导致的所有柱状图案噪声的方式来测量CMOS像素的输出电压。电路包括可操作地连接在参考电压源和相关双采样放大器之间的测试开关，用于当测试开关的状态导通到相关的双采样放大器时，从参考电压源施加测试电压。参考电压源产生对应于满量程电压电平的电压，以便能够确定相关双采样放大器和/或A / D转换器中的增益误差; 与地相对应的电压，以确定相关双采样放大器和/或A / D转换器中的偏移误差; 以及从模拟地到满量程电压电平的多个模拟电压，以便能够确定A / D转换器中的非线性误差。

8. 发明授权

US08009206B2 Adaptive sensitivity control, on a pixel-by-pixel basis, for a digital imager 有权
标题翻译：针对数字成像仪，逐像素地进行自适应灵敏度控制
公开(公告)号：US08009206B2
公开(公告)日：2011-08-30
申请号：US10037885
申请日：2002-01-04
申请人： Ichiro Masaki , Lane Gearle Brooks , Vivek A. Sikri , Keith Glen Fife
发明人： Ichiro Masaki , Lane Gearle Brooks , Vivek A. Sikri , Keith Glen Fife
IPC分类号： H04N5/217
CPC分类号： H04N5/35527 , H04N5/23225 , H04N5/23241 , H04N5/235 , H04N5/2353 , H04N5/35509 , H04N5/374 , H04N2201/3252
摘要： A system and method adaptively control sensitivity, on a pixel-by-pixel basis, of a digital imager. An illumination intensity level mapping controller determines a number of pixels of image data having illumination intensity levels within a first defined range of illumination intensity levels and determines an illumination intensity level mapping function based upon the determined number of pixels within the first defined range of illumination intensity levels. An exposure controller determines a number of pixels having illumination intensity levels within a second defined range of illumination intensity levels and determines an integration time based upon the determined number of pixels having illumination intensity levels within the second defined range of illumination intensity levels. A transfer control function generation circuit determines a composite transfer control function based on the determined integration time and determined illumination intensity level mapping function; determines each transition point between a plurality of discrete transfer control functions from the determined integration time and the determined illumination intensity level mapping function; and imposes the determined transfer control function upon a pixel of the digital imager.
摘要翻译：系统和方法以数字成像器的逐个像素为基础自适应地控制灵敏度。照明强度级映射控制器确定具有在照明强度级别的第一限定范围内的照明强度级别的图像数据的像素数，并且基于所确定的第一限定的照明强度范围内的像素数确定照明强度级别映射函数水平。曝光控制器确定具有在照明强度水平的第二限定范围内的照明强度水平的多个像素，并且基于所确定的具有在第二限定的照明强度水平范围内的照明强度水平的像素数量来确定积分时间。转移控制函数生成电路基于所确定的积分时间和确定的照明强度水平映射函数来确定复合传送控制功能; 从所确定的积分时间和所确定的照明强度水平映射函数确定多个离散转移控制函数之间的每个转变点; 并将确定的传送控制功能施加到数字成像器的像素上。

9. 发明授权

US07446805B2 CMOS active pixel with hard and soft reset 有权
标题翻译： CMOS有源像素，硬复位和软复位
公开(公告)号：US07446805B2
公开(公告)日：2008-11-04
申请号：US10752131
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
IPC分类号： H04N5/217
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.
摘要翻译：用于成像阵列中的像素位置的电路包括将入射光转换为光电流的光检测元件和可操作地连接到光检测元件的复位晶体管，以复位与光检测元件相关联的电压。复位晶体管硬复位与光检测元件相关联的电压，并且在与光检测元件相关联的电压的硬复位产生之后，软复位与光检测元件相关联的电压。通过将列或行线电压硬复位到第一预定电压也测量列或行线的像素电压; 将列或行线电压软复位为第一像素电压; 将列或行线电压硬复位到第二预定电压; 将列或行线电压软复位到第二像素电压; 以及确定所述第一和第二像素电压之间的差，所述差是所测量的像素电压。

10. 发明授权

US07417678B2 Precise CMOS imager transfer function control for expanded dynamic range imaging using variable-height multiple reset pulses 有权
标题翻译：精确的CMOS成像器传输功能控制，用于使用可变高度多重复位脉冲进行扩展动态范围成像
公开(公告)号：US07417678B2
公开(公告)日：2008-08-26
申请号：US10751562
申请日：2004-01-05
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks
IPC分类号： H04N3/14 , H04N5/335 , H01L27/00
CPC分类号： H04N5/35527
摘要： A sense node voltage relating to light intensity incident upon a light-detecting element is measured. To realize this measurement, a first integration reset pulse is generated to enable a resetting of the sense node voltage to a voltage value substantially equal to a reset voltage value associated with the first integration reset pulse, an edge of the first integration reset pulse triggering a beginning of a first integration period. Thereafter, a second integration reset pulse is generated to enable a resetting of the sense node voltage to a voltage value substantially equal to a reset voltage value associated with the second integration reset pulse, an edge of the second integration reset pulse triggering a beginning of a second integration period. Subsequent to the generation of the first integration reset pulse and prior to the generation of the second integration reset pulse, a plurality of intra-period reset pulses is generated to enable resetting of the sense node voltage to a plurality of voltage values, each voltage value being substantially equal to a reset voltage value associated with the generated intra-period reset pulse. The sense node voltage generated in response to incident light intensity is measured only once during an integration period, wherein this measurement takes place subsequent to the generation of the plurality of intra-period reset pulses and prior to the generation of the second integration reset pulse.
摘要翻译：测量与入射到光检测元件上的光强有关的感测节点电压。为了实现该测量，产生第一积分复位脉冲，以使感测节点电压复位为基本上等于与第一积分复位脉冲相关联的复位电压值的电压值，第一积分复位脉冲的边沿触发一个第一个整合时期的开始。此后，产生第二积分复位脉冲，以便将感测节点电压重置为基本上等于与第二积分复位脉冲相关联的复位电压值的电压值，第二积分复位脉冲的边沿触发一个第二整合期。在产生第一积分复位脉冲之后并且在产生第二积分复位脉冲之前，产生多个周期内复位脉冲，以使感测节点电压复位为多个电压值，每个电压值基本上等于与产生的周期内复位脉冲相关联的复位电压值。响应于入射光强度产生的感测节点电压在积分周期期间仅测量一次，其中该测量在多个周期内复位脉冲的产生之后并在第二积分复位脉冲的产生之前进行。

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