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1. 发明授权

US08103898B2 Explicit skew interface for mitigating crosstalk and simultaneous switching noise 有权
标题翻译：用于减轻串扰和同时开关噪声的显式偏移接口
公开(公告)号：US08103898B2
公开(公告)日：2012-01-24
申请号：US11969801
申请日：2008-01-04
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： G06F1/00 , H04J1/12 , H04J3/10
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

2. 发明申请

US20090174455A1 EXPLICIT SKEW INTERFACE FOR MITIGATING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE 有权
标题翻译：用于减轻搅拌机和同时切换噪音的显示切割界面
公开(公告)号：US20090174455A1
公开(公告)日：2009-07-09
申请号：US11969801
申请日：2008-01-04
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： G06F1/04
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

3. 发明授权

US08341452B2 Explicit skew interface for reducing crosstalk and simultaneous switching noise 有权
标题翻译：显式偏移接口，用于减少串扰和同时开关噪声
公开(公告)号：US08341452B2
公开(公告)日：2012-12-25
申请号：US13353603
申请日：2012-01-19
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： G06F1/00 , H04J1/12 , H04J3/10
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

4. 发明申请

US20120114087A1 EXPLICIT SKEW INTERFACE FOR REDUCING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE 有权
标题翻译：用于减少摇滚音箱和同时开关噪音的显示切口界面
公开(公告)号：US20120114087A1
公开(公告)日：2012-05-10
申请号：US13353603
申请日：2012-01-19
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： H04L7/04
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

5. 发明申请

US20120051152A1 BUFFER DIE IN STACKS OF MEMORY DIES AND METHODS 有权
标题翻译：存储器堆栈中的缓冲器和方法
公开(公告)号：US20120051152A1
公开(公告)日：2012-03-01
申请号：US12872638
申请日：2010-08-31
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： G11C7/10
CPC分类号： G11C7/10 , G11C5/02 , G11C7/1003
摘要： Memory devices and methods of making and operating them are shown. Memory devices shown include stacked memory dies with one or more buffer dies included. In one such memory device, a command die communicates with one or more downstream memory dies through the one or more buffer dies. The one or more buffer dies function to repeat signals, and can potentially improve performance for higher numbers of memory dies in the stack.
摘要翻译：显示了存储器件及其制作和操作方法。所示的存储器件包括具有一个或多个缓冲管芯的堆叠存储器管芯。在一个这样的存储器装置中，命令管芯通过一个或多个缓冲管芯与一个或多个下游存储器管芯通信。一个或多个缓冲器管芯用于重复信号，并且可以潜在地提高堆叠中较高数量的存储器管芯的性能。

6. 发明申请

US20100026533A1 Data Bus Inversion Apparatus, Systems, and Methods 有权
标题翻译：数据总线反转装置，系统和方法
公开(公告)号：US20100026533A1
公开(公告)日：2010-02-04
申请号：US12577276
申请日：2009-10-12
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： H03M5/00
CPC分类号： H03M5/00 , G06F13/4234 , G11C7/02 , G11C7/1006 , Y02D10/14 , Y02D10/151
摘要： Apparatus, systems, and methods are disclosed such as those that operate to encode data bits transmitted on a plurality of channels according to at least one of multiple Data Bus Inversion (DBI) algorithms. Additional apparatus, systems, and methods are disclosed.
摘要翻译：公开了装置，系统和方法，例如根据多个数据总线反转（DBI）算法中的至少一个，对在多个信道上发送的数据位进行编码的装置，系统和方法。公开了附加装置，系统和方法。

7. 发明申请

US20090182918A1 DATA BUS INVERSION APPARATUS, SYSTEMS, AND METHODS 有权
标题翻译：数据总线反相装置，系统和方法
公开(公告)号：US20090182918A1
公开(公告)日：2009-07-16
申请号：US12015311
申请日：2008-01-16
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： G06F13/42
CPC分类号： H03M5/00 , G06F13/4234 , G11C7/02 , G11C7/1006 , Y02D10/14 , Y02D10/151
摘要： Apparatus, systems, and methods are disclosed such as those that operate to encode data bits transmitted on a plurality of channels according to at least one of multiple Data Bus Inversion (DBI) algorithms. Additional apparatus, systems, and methods are disclosed.
摘要翻译：公开了装置，系统和方法，例如根据多个数据总线反转（DBI）算法中的至少一个，对在多个信道上发送的数据位进行编码的装置，系统和方法。公开了附加装置，系统和方法。

8. 发明申请

US20070114997A1 Systems, methods and apparatus for a partially elongated field of view in a magnetic resonance imaging system 有权
标题翻译：用于磁共振成像系统中部分细长视野的系统，方法和装置
公开(公告)号：US20070114997A1
公开(公告)日：2007-05-24
申请号：US11283132
申请日：2005-11-18
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： G01V3/00
CPC分类号： G01R33/381 , G01R33/3875
摘要： Systems, methods and apparatus are provided through which a partially elongated field-of-view in a magnetic resonance imaging system is generated either by an asymmetric primary coil or a conventional symmetrical primary coil with a supplementary high odd-order shim that elongates the field-of-view towards one end of the bore. For significantly increased efficiency, the high odd-order shim can evoke specific parts of the primary coil by injecting additional current and/or subtracting current from specific turns, as required.
摘要翻译：提供了一种系统，方法和装置，通过该系统，方法和装置，通过非对称初级线圈或具有补充高奇数级垫片的常规对称初级线圈产生磁共振成像系统中的部分细长视场，朝向钻孔的一端。为了显着提高效率，高奇数垫片可以根据需要通过从特定匝数注入额外的电流和/或减去电流来唤起初级线圈的特定部分。

9. 发明申请

US20120242157A1 DEVICES HAVING DIFFERENT EFFECTIVE SERIES RESISTANCE STATES AND METHODS FOR CONTROLLING SUCH DEVICES 有权
标题翻译：具有不同有效系列电阻状态的装置和用于控制这些装置的方法
公开(公告)号：US20120242157A1
公开(公告)日：2012-09-27
申请号：US13072402
申请日：2011-03-25
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： G05F1/613
CPC分类号： H04L25/0278
摘要： Devices and methods are described, such as those including parallel paths coupled between a first power supply and a second power supply. The parallel paths include different values of capacitance to reduce unwanted variations as a function of current demand frequency such as resonance. A selectable resistance is provided along one or more parallel paths, and can be varied during different times in a signal burst.
摘要翻译：描述了装置和方法，例如包括耦合在第一电源和第二电源之间的并行路径的装置和方法。平行路径包括不同的电容值，以减少作为当前需求频率（例如谐振）的函数的不期望的变化。沿着一个或多个并行路径提供可选择的电阻，并且可以在信号脉冲串的不同时间期间变化。

10. 发明授权

US08183880B2 Devices and methods for driving a signal off an integrated circuit 有权
标题翻译：将信号从集成电路驱动的装置和方法
公开(公告)号：US08183880B2
公开(公告)日：2012-05-22
申请号：US12773505
申请日：2010-05-04
申请人： Timothy Hollis , Brent Keeth
发明人： Timothy Hollis , Brent Keeth
IPC分类号： H03K17/16
CPC分类号： H03K19/018528 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311
摘要： Embodiments of the present invention provide electronic devices, memory devices and methods of driving an on-chip signal off a chip. In one such embodiment, an on-chip signal and a second signal complementary to the on-chip signal are generated and provided to the two inputs of a differential driver. One output of the differential driver circuitry is coupled to an externally-accessible output terminal of the package. The other output may be terminated off the chip, but within the package. By routing the output signal and a second complementary output through the package, crosstalk potentially caused by the output signal can be reduced. Simultaneous switching output noise may also be reduced through use of a current-steering differential driver topology. Signal symmetry may also improve, reducing inter-symbol interference.
摘要翻译：本发明的实施例提供电子设备，存储器件以及驱动芯片上片上信号的方法。在一个这样的实施例中，生成与片上信号互补的片上信号和第二信号，并将其提供给差分驱动器的两个输入。差分驱动器电路的一个输出耦合到封装的外部可访问的输出端子。另一个输出可能会从芯片中脱离，但在封装内。通过将输出信号和通过封装的第二互补输出路由，可以减少由输出信号引起的串扰。通过使用电流转向差动驱动器拓扑，也可以减少同时开关输出噪声。信号对称性也可以提高，减少符号间干扰。

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