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1. 发明申请

US20120110306A1 TRANSLATED MEMORY PROTECTION APPARATUS FOR AN ADVANCED MICROPROCESSOR 失效
标题翻译：用于高级微处理器的翻译记忆保护装置
公开(公告)号：US20120110306A1
公开(公告)日：2012-05-03
申请号：US13243943
申请日：2011-09-23
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
摘要翻译：一种响应于尝试写入包括目标指令的存储器地址的方法，该目标指令已经被转换为主机指令以供主机处理器执行，包括以下步骤：标记包括被转换为主机指令的目标指令的存储器地址检测当尝试写入存储器地址时已被标记的存储器地址，以及通过保护存储器地址处的目标指令来标记的存储器地址的检测，直到确保转换为止在更新之前，与存储器地址相关联的将不被使用。

2. 发明授权

US08055877B1 Translated memory protection apparatus for an advanced microprocessor 有权
标题翻译：用于高级微处理器的翻译记忆保护装置
公开(公告)号：US08055877B1
公开(公告)日：2011-11-08
申请号：US11248813
申请日：2005-10-11
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
摘要翻译：一种响应于尝试写入包括目标指令的存储器地址的方法，该目标指令已经被转换为主机指令以供主机处理器执行，包括以下步骤：标记包括被转换为主机指令的目标指令的存储器地址检测当尝试写入存储器地址时已被标记的存储器地址，以及通过保护存储器地址处的目标指令来标记的存储器地址的检测，直到确保转换为止在更新之前，与存储器地址相关联的将不被使用。

3. 发明授权

US07716452B1 Translated memory protection apparatus for an advanced microprocessor 有权
公开(公告)号：US07716452B1
公开(公告)日：2010-05-11
申请号：US10438158
申请日：2003-05-13
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.

4. 发明授权

US06199152B1 Translated memory protection apparatus for an advanced microprocessor 失效
标题翻译：用于高级微处理器的翻译记忆保护装置
公开(公告)号：US06199152B1
公开(公告)日：2001-03-06
申请号：US08702771
申请日：1996-08-22
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F1100
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
摘要翻译：一种响应于尝试写入包括目标指令的存储器地址的方法，该目标指令已经被转换为主机指令以供主机处理器执行，包括以下步骤：标记包括被转换为主机指令的目标指令的存储器地址检测当尝试写入存储器地址时已被标记的存储器地址，以及通过保护存储器地址处的目标指令来标记的存储器地址的检测，直到确保转换为止在更新之前，与存储器地址相关联的将不被使用。

5. 发明授权

US08719544B2 Translated memory protection apparatus for an advanced microprocessor 失效
标题翻译：用于高级微处理器的翻译记忆保护装置
公开(公告)号：US08719544B2
公开(公告)日：2014-05-06
申请号：US13243943
申请日：2011-09-23
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
摘要翻译：一种响应于尝试写入包括目标指令的存储器地址的方法，该目标指令已经被转换为主机指令以供主机处理器执行，包括以下步骤：标记包括被转换为主机指令的目标指令的存储器地址检测当尝试写入存储器地址时已被标记的存储器地址，以及通过保护存储器地址处的目标指令来标记的存储器地址的检测，直到确保转换为止在更新之前，与存储器地址相关联的将不被使用。

6. 发明授权

US07840776B1 Translated memory protection apparatus for an advanced microprocessor 有权
标题翻译：用于高级微处理器的翻译记忆保护装置
公开(公告)号：US07840776B1
公开(公告)日：2010-11-23
申请号：US09699947
申请日：2000-10-30
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
摘要翻译：一种响应于尝试写入包括目标指令的存储器地址的方法，该目标指令已经被转换为主机指令以供主机处理器执行，包括以下步骤：标记包括被转换为主机指令的目标指令的存储器地址检测当尝试写入存储器地址时已被标记的存储器地址，以及通过保护存储器地址处的目标指令来标记的存储器地址的检测，直到确保转换为止在更新之前，与存储器地址相关联的将不被使用。

7. 发明申请

US20100205413A1 TRANSLATED MEMORY PROTECTION 有权
标题翻译：翻译记忆保护
公开(公告)号：US20100205413A1
公开(公告)日：2010-08-12
申请号：US12762187
申请日：2010-04-16
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm J. Wing
IPC分类号： G06F9/30
CPC分类号： G06F9/3808 , G06F9/3812 , G06F9/45504 , G06F13/4239
摘要： A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
摘要翻译：一种响应于尝试写入包括目标指令的存储器地址的方法，该目标指令已经被转换为主机指令以供主机处理器执行，包括以下步骤：标记包括被转换为主机指令的目标指令的存储器地址检测当尝试写入存储器地址时已被标记的存储器地址，以及通过保护存储器地址处的目标指令来标记的存储器地址的检测，直到确保转换为止在更新之前，与存储器地址相关联的将不被使用。

8. 发明授权

US6031992A Combining hardware and software to provide an improved microprocessor 失效
标题翻译：结合硬件和软件提供改进的微处理器
公开(公告)号：US6031992A
公开(公告)日：2000-02-29
申请号：US678541
申请日：1996-07-05
申请人： Robert F. Cmelik , David R. Ditzel , Edmund J. Kelly , Colin B. Hunter , Douglas A. Laird , Malcolm John Wing , Grzegorz B. Zyner
发明人： Robert F. Cmelik , David R. Ditzel , Edmund J. Kelly , Colin B. Hunter , Douglas A. Laird , Malcolm John Wing , Grzegorz B. Zyner
IPC分类号： G06F9/318 , G06F9/38 , G06F9/455 , G06F9/45
CPC分类号： G06F9/3812 , G06F9/3017 , G06F9/30174 , G06F9/45504
摘要： A microprocessor for a host computer designed to execute target application programs for a target computer having a target instruction set including the combination of code morphing software, and morph host processing hardware designed to execute instructions of a host instruction set, the combination of the code morphing software and the morph host processing hardware comprising means to translate a set of target instructions into instructions of a host instruction set, means to optimize the instructions of the host instruction set translated from the target application program speculating upon the occurrence of a condition, means to determine under control of the code morphing software official state of the target computer which existed at the beginning of a translation of a set of target instructions during execution of the target application program by the microprocessor, means for updating state of the target computer from state of the host computer when a set of host instructions executes in accordance with the speculation, means to detect failure of the condition during the execution of the set of host instructions, means for updating state of the host computer from state of the target computer when a set of host instructions fails to execute in accordance with the speculation, and means to translate a new set of host instructions without the speculation when a set of host instructions fails to execute in accordance with the speculation.
摘要翻译：一种用于主计算机的微处理器，被设计用于执行目标计算机的目标应用程序，所述目标计算机具有目标指令集，所述目标指令集包括代码变形软件的组合，以及被设计为执行主机指令集的指令的变形主机处理硬件，代码变形软件和变形主机处理硬件包括将一组目标指令转换为主机指令集的指令的装置，用于优化从发生条件时推测的目标应用程序翻译的主机指令集的指令的装置，在由微处理器在目标应用程序执行期间在一组目标指令的转换开始时存在的目标计算机的代码变形软件官方状态的控制下确定用于从目标计算机的状态更新目标计算机的状态的装置主机当一套主机指令时根据推测执行的装置，用于在执行主机指令集期间检测状况的失败的手段，用于当主机指令的集合根据不可执行的主机指令不能执行时从目标计算机的状态更新主机的状态的装置当一组主机指令根据推测不能执行时，这种推测和翻译一组新的主机指令的手段无需推测。

9. 发明授权

US5832205A Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed 失效
标题翻译：用于微处理器的存储器控制器，用于检测正在寻址的部件的物理性质的猜测失败
公开(公告)号：US5832205A
公开(公告)日：1998-11-03
申请号：US700302
申请日：1996-08-20
申请人： Edmund J. Kelly , Robert F. Cmelik , Malcolm John Wing
发明人： Edmund J. Kelly , Robert F. Cmelik , Malcolm John Wing
IPC分类号： G06F9/38 , C09K8/34 , G06F9/30 , G06F9/318 , G06F9/455 , G06F11/00 , G06F11/14 , G06F11/28 , G06F12/02 , G06F12/10
CPC分类号： C09K8/34 , G06F11/141 , G06F12/0292 , G06F12/1027 , G06F9/30181 , G06F9/3808 , G06F9/3824 , G06F9/3834 , G06F9/3842 , G06F9/3861 , G06F9/3863 , G06F9/3885 , G06F9/45504
摘要： A memory controller for a microprocessor including apparatus to both detect a failure of speculation on the nature of the memory being addressed, and apparatus to recover from such failures.
摘要翻译：一种用于微处理器的存储器控制器，包括用于检测对正在寻址的存储器的性质的猜测失败的装置以及从这种故障中恢复的装置。

10. 发明授权

US07840788B1 Checking for exception by floating point instruction reordered across branch by comparing current status in FP status register against last status copied in shadow register 有权
标题翻译：通过比较FP状态寄存器中的当前状态与复制在影子寄存器中的最后状态，通过浮点指令检查异常
公开(公告)号：US07840788B1
公开(公告)日：2010-11-23
申请号：US12037872
申请日：2008-02-26
申请人： Guillermo J. Rozas , David Dunn , Robert F. Cmelik
发明人： Guillermo J. Rozas , David Dunn , Robert F. Cmelik
IPC分类号： G06F9/38
CPC分类号： G06F9/3863 , G06F9/30087 , G06F9/30174 , G06F9/3865 , G06F9/3867
摘要： A process which automatically inserts commands that test for and raise exceptions indicating floating point status exceptions into a sequence of instructions to be executed, re-ordering a pipelined instructions by moving a floating point instruction from after a branch instruction to before the branch instruction, and responds to exceptions in execution of the sequence of instructions by returning execution to a point in the sequence of instructions at which correct state is known and then executing each instruction in the sequence singly to completion so that exceptions in pipelined floating point instructions can be automatically-detected and handled precisely.
摘要翻译：一种自动将测试指示浮点状态异常的异常的指令插入到要执行的指令序列中的过程，通过将分支指令之后的浮点指令移动到分支指令之前重新排序流水线指令，以及通过将执行返回到已知正确状态的指令序列中的点，然后单独执行序列中的每个指令来完成，从而响应于指令序列执行中的异常，从而可以自动执行流水线浮点指令中的异常，检测和处理精确。

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