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1. 发明授权

US06400852B1 Arbitrary zoom “on -the -fly” 失效
标题翻译：任意放大“on-the”
公开(公告)号：US06400852B1
公开(公告)日：2002-06-04
申请号：US09219815
申请日：1998-12-23
申请人： Edward J. Miller, II , Mark P. Rygh
发明人： Edward J. Miller, II , Mark P. Rygh
IPC分类号： G06K932
CPC分类号： G06T3/4007 , G09G5/395 , G09G2340/0414 , G09G2340/0421 , H04N5/2628 , H04N7/0122
摘要： A system and method of performing “on-the-fly” zooming (i.e., while the video display is in-motion) having infinite value scaling is provided to give the user the ability to zoom-up by any amount while viewing. The variable “on-the-fly” zooming function is performed by a user employing a user interface device, such as a mouse, to select a window of random size in a display screen which is playing an in-motion video display. The information obtained by the user interface device is converted into scaling information and base address information and are stored into temporary registers. On the next video synchronization signal, the scaling and base address information are loaded into registers used to perform scaling on the pixel data retrieved from the frame buffer area in the video system. The new base address ensures that the pixel data is retrieved so that only the data within the window is scaled. The retrieved video data is then scaled using the new scaling information.
摘要翻译：提供具有无限值缩放的执行“即时”缩放（即，视频显示在运动中）的系统和方法，以给予用户在观看时放大任意数量的能力。变量“即时”缩放功能由使用诸如鼠标之类的用户界面设备的用户在正在播放动态视频显示的显示屏中选择随机大小的窗口来执行。由用户接口设备获取的信息被转换为缩放信息和基地址信息，并被存储到临时寄存器中。在下一个视频同步信号中，缩放和基址信息被加载到用于对从视频系统中的帧缓冲器区域检索的像素数据执行缩放的寄存器中。新的基地址确保检索像素数据，以便仅缩放窗口内的数据。然后使用新的缩放信息对所检索的视频数据进行缩放。

2. 发明申请

US20110016344A1 AUDIO CLOCKING IN VIDEO APPLICATIONS 失效
标题翻译：视频应用中的音频时钟
公开(公告)号：US20110016344A1
公开(公告)日：2011-01-20
申请号：US12889327
申请日：2010-09-23
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： G06F1/08
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.
摘要翻译：一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动引起的性能问题。系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。

3. 发明授权

US08378867B2 Audio clocking in video applications 有权
公开(公告)号：US08378867B2
公开(公告)日：2013-02-19
申请号：US12543509
申请日：2009-08-19
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： H03M3/00
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.

4. 发明授权

US08487797B2 Audio clocking in video applications 失效
标题翻译：视频应用中的音频时钟
公开(公告)号：US08487797B2
公开(公告)日：2013-07-16
申请号：US12889327
申请日：2010-09-23
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： H03M3/00
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.
摘要翻译：一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动引起的性能问题。系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。

5. 发明授权

US07587131B1 Audio clocking in video applications 有权
标题翻译：视频应用中的音频时钟
公开(公告)号：US07587131B1
公开(公告)日：2009-09-08
申请号：US10856436
申请日：2004-05-28
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： H04N5/91
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from the jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream. For example, the system clock rate might be 27 MHz while the sample rate of the audio data stream is 44.1 kHz. More generally, the system clock signal preferably has a rate of 108/N MHz, where N is an integer. A sample rate conversion unit in the audio DAC is used to convert the sample rate of the audio data stream to the rate of the system clock signal.
摘要翻译：一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动可能导致的性能问题。系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。例如，系统时钟频率可能是27 MHz，而音频数据流的采样率是44.1 kHz。更一般地，系统时钟信号优选地具有108 / NMHz的速率，其中N是整数。音频DAC中的采样率转换单元用于将音频数据流的采样率转换为系统时钟信号的速率。

6. 发明申请

US20090310941A1 AUDIO CLOCKING IN VIDEO APPLICATIONS 有权
标题翻译：视频应用中的音频时钟
公开(公告)号：US20090310941A1
公开(公告)日：2009-12-17
申请号：US12543509
申请日：2009-08-19
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： H04N7/00
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.
摘要翻译：一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动引起的性能问题。系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。

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