会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明授权
    • Method for forming gate electrode of semiconductor device
    • 形成半导体器件栅电极的方法
    • US07611978B2
    • 2009-11-03
    • US12124058
    • 2008-05-20
    • Eun Sang Cho
    • Eun Sang Cho
    • H01L21/3205
    • H01L21/28123H01L21/0337H01L21/32139H01L29/66553H01L29/66583
    • Provided is a method for forming a gate electrode of a semiconductor device which can form a gate electrode having a fine line width. Disclosed method steps include forming a gate oxide film, a polysilicon film for a gate electrode, and a first sacrificial layer on the entire surface of a semiconductor substrate and then forming an opening within the first sacrificial layer. The effective width of the hole is reduced, and an ion implantation layer is formed on the top surface of the polysilicon film in the region exposed through the hole. A gate electrode is formed under the ion implantation layer by using the ion implantation layer as a mask.
    • 提供一种形成可形成具有细线宽度的栅电极的半导体器件的栅电极的方法。 公开的方法步骤包括在半导体衬底的整个表面上形成栅极氧化膜,用于栅电极的多晶硅膜和第一牺牲层,然后在第一牺牲层内形成开口。 孔的有效宽度减小,并且在通过该孔暴露的区域中的多晶硅膜的顶表面上形成离子注入层。 通过使用离子注入层作为掩模,在离子注入层的下方形成栅电极。