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    • 1. 发明授权
    • Chip C4 assembly improvement using magnetic force and adhesive
    • 芯片C4组装改进使用磁力和粘合剂
    • US6142361A
    • 2000-11-07
    • US458483
    • 1999-12-09
    • Francis J. Downes, Jr.Robert M. JappMark V. Pierson
    • Francis J. Downes, Jr.Robert M. JappMark V. Pierson
    • H01L21/60H05K3/30H05K3/34B23K1/20B23K31/02
    • H01L24/81B23K2201/40H01L2224/81801H01L2924/01006H01L2924/01033H01L2924/0105H01L2924/01082H01L2924/01322H01L2924/014H01L2924/14H05K3/303H05K3/3436Y10T29/4913Y10T29/53196
    • A method, and associated structure, for adhesively coupling a chip to an organic chip carrier. The chip is attached to a top surface of the organic chip carrier by interfacing a solder bump between a C4 solder structure on the chip and a pad on a top surface of the chip carrier. The melting temperature of the solder bump is less than the melting temperature of the C4 solder structure. A block of ferrous material is placed on a top surface of the chip. A temporary or permanent stiffener of ferrous material is placed on the top surface of the chip carrier. A permanent magnet is coupled to a bottom surface of the chip carrier. Alternatively, an electromagnetic could be utilized instead of the electromagnet. Due to the permanent magnet or the electromagnet, a magnetic force on the stiffener is directed toward the magnet and substantially flattens the first surface of the chip carrier. Similarly, a magnetic force on the block is directed toward the magnet such that the electronic component and the chip carrier are held in alignment. The solder bump is reflowed at a temperature between the melting temperature of the solder bump and the melting temperature of the C4 solder structure. The reflowing reconfigures the solder bump. The magnetic force on the block frictionally clamps the reflowed solder between the C4 solder structure and the pad. The chip and carrier are cooled, resulting in the C4 solder structure being adhesively and conductively coupled to the pad.
    • 一种用于将芯片粘合地耦合到有机芯片载体的方法和相关联的结构。 芯片通过在芯片上的C4焊料结构和芯片载体的顶表面上的焊盘之间接合焊料凸块来附接到有机芯片载体的顶表面。 焊料凸点的熔化温度小于C4焊料结构的熔化温度。 将一块黑色金属材料放置在芯片的上表面上。 铁芯材料的临时或永久性加强件被放置在芯片载体的顶表面上。 永磁体耦合到芯片载体的底表面。 或者,可以使用电磁来代替电磁体。 由于永磁体或电磁体,加强件上的磁力被引向磁体并且基本平坦化芯片载体的第一表面。 类似地,块上的磁力指向磁体,使得电子部件和芯片载体保持对准。 在焊料凸块的熔化温度和C4焊料结构的熔化温度之间的温度下回流焊料凸点。 回流重新配置焊料凸块。 块上的磁力摩擦地夹住C4焊料结构和焊盘之间的回流焊料。 芯片和载体被冷却,导致C4焊料结构被粘性地导电耦合到焊盘。
    • 2. 发明授权
    • Chip C4 assembly improvement using magnetic force and adhesive
    • 芯片C4组装改进使用磁力和粘合剂
    • US06429384B1
    • 2002-08-06
    • US09588836
    • 2000-06-07
    • Francis J. Downes, Jr.Robert M. JappMark V. Pierson
    • Francis J. Downes, Jr.Robert M. JappMark V. Pierson
    • H05K116
    • H01L24/81B23K2101/40H01L2224/81801H01L2924/01006H01L2924/01033H01L2924/0105H01L2924/01082H01L2924/01322H01L2924/014H01L2924/14H05K3/303H05K3/3436Y10T29/4913Y10T29/53196
    • A structure that adhesively couples a chip to an organic chip carrier. The chip is attached to a top surface of the organic chip carrier by interfacing a solder bump between a C4 solder structure on the chip and a pad on a top surface of the chip carrier. The melting temperature of the solder bump is less than the melting temperature of the C4 solder structure. A block of ferrous material is on a top surface of the chip. A temporary or permanent stiffener of ferrous material is on the top surface of the chip carrier. A permanent magnet is coupled to a bottom surface of the chip carrier. Alternatively, an electromagnetic could be utilized instead of the electromagnet. Due to the permanent magnet or the electromagnet, a magnetic force on the stiffener is directed toward the magnet and substantially flattens the first surface of the chip carrier. Similarly, a magnetic force on the block is directed toward the magnet such that the electronic component and the chip carrier are held in alignment. After the solder bump has been reflowed at a temperature between the melting temperature of the solder bump and the melting temperature of the C4 solder structure, the solder bump is reconfigured. The magnetic force on the block frictionally clamps the reflowed solder between the C4 solder structure and the pad. After the chip and carrier are cooled, the C4 solder structure is adhesively and conductively coupled to the pad.
    • 将芯片与有机芯片载体粘接的结构。 芯片通过在芯片上的C4焊料结构和芯片载体的顶表面上的焊盘之间接合焊料凸块来附接到有机芯片载体的顶表面。 焊料凸点的熔化温度小于C4焊料结构的熔化温度。 铁质材料块在芯片的顶表面上。 铁质材料的临时或永久性加强件位于芯片载体的顶表面上。 永磁体耦合到芯片载体的底表面。 或者,可以使用电磁来代替电磁体。 由于永磁体或电磁体,加强件上的磁力被引向磁体并且基本平坦化芯片载体的第一表面。 类似地,块上的磁力指向磁体,使得电子部件和芯片载体保持对准。 在焊料凸块的熔化温度和C4焊料结构的熔化温度之间的温度下回流焊料凸点之后,重新配置焊料凸点。 块上的磁力摩擦地夹住C4焊料结构和焊盘之间的回流焊料。 在芯片和载体被冷却之后,C4焊料结构粘合地并且导电地耦合到焊盘。
    • 4. 发明授权
    • Electrical coupling of a stiffener to a chip carrier
    • 加强筋与芯片载体的电耦合
    • US06699736B2
    • 2004-03-02
    • US10305643
    • 2002-11-26
    • Terry J. DornbosRaymond A. Phillips, Jr.Mark V. PiersonWilliam J. RudikDavid L. Thomas
    • Terry J. DornbosRaymond A. Phillips, Jr.Mark V. PiersonWilliam J. RudikDavid L. Thomas
    • H01L2144
    • H05K3/0061H01L21/4846H05K3/386H05K3/4038H05K2201/0305H05K2201/09554H05K2201/10977
    • A method and structure for conductively coupling a metallic stiffener to a chip carrier. A substrate has a conductive pad on its surface and an adhesive layer is formed on the substrate surface. The metallic stiffener is placed on the adhesive layer, wherein the adhesive layer mechanically couples the stiffener to the substrate surface and electrically couples the stiffener to the pad. The adhesive layer is then cured such as by pressurization at elevated temperature. Embodiments of the present invention form the adhesive layer by forming an electrically conductive contact on the pad and setting a dry adhesive on the substrate, such that the electrically conductive contact is within a hole in the dry adhesive. The electrically conductive contact electrically couples the stiffener to the pad. The curing step includes curing both the dry adhesive and the electrically conductive contact, resulting in the dry adhesive adhesively coupling the stiffener to the substrate. The electrically conductive contact may include an electrically conductive adhesive or a metallic solder. Additional embodiments of the present invention form the adhesive layer by applying an electrically conductive adhesive on the substrate, wherein after the stiffener is placed on the adhesive layer, the electrically conductive adhesive mechanically and electrically couples the stiffener to the surface of the substrate.
    • 用于将金属加强件导电耦合到芯片载体的方法和结构。 衬底在其表面上具有导电焊盘,并且在衬底表面上形成粘合剂层。 金属加强件被放置在粘合剂层上,其中粘合剂层将加强件机械地连接到基底表面,并将加强件电耦合到垫。 然后将粘合剂层固化,例如通过在升高的温度下加压。 本发明的实施例通过在焊盘上形成导电触点并在基板上设置干燥的粘合剂来形成粘合剂层,使得导电触点位于干粘合剂中的孔内。 导电触头将加强件电耦合到焊盘。 固化步骤包括固化干燥粘合剂和导电接触,导致干燥粘合剂将加强剂粘合到基底上。 导电接触可包括导电粘合剂或金属焊料。 本发明的另外的实施方案通过在基底上施加导电粘合剂形成粘合剂层,其中在将加强件放置在粘合剂层上之后,导电粘合剂将加强件机械地和电耦合到基底的表面。
    • 6. 发明授权
    • Method of making electrically conductive contacts on substrates
    • 在基板上制作导电触点的方法
    • US06173887B1
    • 2001-01-16
    • US09339924
    • 1999-06-24
    • Donald I. MeadMark V. Pierson
    • Donald I. MeadMark V. Pierson
    • B23K2622
    • H05K3/3484B23K1/0053B23K1/0056B23K2101/40H05K3/3494H05K2203/043H05K2203/0557H05K2203/107
    • A method of making an electrically conductive contact on a substrate by applying a layer of solder paste to a circuitized feature on a substrate and selectively heating and melting the solder paste over the feature to form a solder bump. The excess solder paste is removed. A focused energy heat source such as a laser beam or focused Infrared heats the solder paste. In another embodiment, a reflective mask with apertures may be used to allow focused heating source to selectively melt areas of the solder paste layer applied to a circuitized feature. In yet another embodiment, a reflective mask with apertures filled with solder paste is applied onto a substrate and then heated to cause localized solder melting. The mask and excess solder paste are removed.
    • 一种通过将衬底层施加到衬底上的电路化特征并在该特征上选择性地加热和熔化焊膏以形成焊料凸块来在衬底上形成导电接触的方法。 去除多余的焊膏。 聚焦能量热源如激光束或聚焦红外线加热焊膏。 在另一个实施例中,具有孔的反射掩模可以用于允许聚焦的加热源选择性地熔化施加到电路化特征上的焊膏层的区域。 在另一个实施例中,将具有填充有焊膏的孔的反射掩模施加到基板上,然后加热以引起局部焊料熔化。 去除掩模和多余的焊膏。