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1. 发明申请

US20100330771A1 Moisture Barrier Capacitors in Semiconductor Components 审中-公开
标题翻译：半导体元件中的阻水电容器
公开(公告)号：US20100330771A1
公开(公告)日：2010-12-30
申请号：US12876866
申请日：2010-09-07
申请人： Hans-Joachim Barth , Helmut Horst Tews
发明人： Hans-Joachim Barth , Helmut Horst Tews
IPC分类号： H01L21/02
CPC分类号： H01L28/75 , G06F17/5068 , H01L21/76897 , H01L22/14 , H01L23/5223 , H01L23/5226 , H01L23/562 , H01L23/585 , H01L27/0611 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.
摘要翻译：公开了在半导体部件上形成防潮电容器的结构和方法。电容器位于半导体芯片的周围，并且包括电连接到电压节点的内板，具有用于电连接到不同电压节点的翅片的外板。

2. 发明授权

US08569820B2 Capacitor having a plurality of parallel conductive members 有权
标题翻译：具有多个平行导电构件的电容器
公开(公告)号：US08569820B2
公开(公告)日：2013-10-29
申请号：US13344714
申请日：2012-01-06
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01L27/108
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译：公开了半导体器件及其制造方法。在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。

3. 发明申请

US20090160020A1 Moisture Barrier Capacitors in Semiconductor Components 有权
标题翻译：半导体元件中的阻水电容器
公开(公告)号：US20090160020A1
公开(公告)日：2009-06-25
申请号：US11962395
申请日：2007-12-21
申请人： Hans-Joachim Barth , Helmut Horst Tews
发明人： Hans-Joachim Barth , Helmut Horst Tews
IPC分类号： H01L29/92 , H01L21/02 , H01L21/66
CPC分类号： H01L28/75 , G06F17/5068 , H01L21/76897 , H01L22/14 , H01L23/5223 , H01L23/5226 , H01L23/562 , H01L23/585 , H01L27/0611 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.
摘要翻译：公开了在半导体部件上形成防潮电容器的结构和方法。电容器位于半导体芯片的周围，并且包括电连接到电压节点的内板，具有用于电连接到不同电压节点的翅片的外板。

4. 发明申请

US20120099243A1 Semiconductor Devices and Methods of Manufacture Thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120099243A1
公开(公告)日：2012-04-26
申请号：US13344714
申请日：2012-01-06
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01G4/005
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译：公开了半导体器件及其制造方法。在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。

5. 发明申请

US20090141424A1 Semiconductor Devices and Methods of Manufacture Thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090141424A1
公开(公告)日：2009-06-04
申请号：US11947591
申请日：2007-11-29
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01G4/33 , H01G4/00
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译：公开了半导体器件及其制造方法。在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。

6. 发明授权

US09012297B2 Methods of forming moisture barrier capacitors in semiconductor components 有权
标题翻译：在半导体部件中形成防潮电容器的方法
公开(公告)号：US09012297B2
公开(公告)日：2015-04-21
申请号：US12876866
申请日：2010-09-07
申请人： Hans-Joachim Barth , Helmut Horst Tews
发明人： Hans-Joachim Barth , Helmut Horst Tews
IPC分类号： H01L21/441 , H01L27/08 , H01L23/522 , H01L23/00 , H01L23/58 , H01L27/06
CPC分类号： H01L28/75 , G06F17/5068 , H01L21/76897 , H01L22/14 , H01L23/5223 , H01L23/5226 , H01L23/562 , H01L23/585 , H01L27/0611 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.
摘要翻译：公开了在半导体部件上形成防潮电容器的结构和方法。电容器位于半导体芯片的周围，并且包括电连接到电压节点的内板，具有用于电连接到不同电压节点的翅片的外板。

7. 发明授权

US08138539B2 Semiconductor devices and methods of manufacture thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08138539B2
公开(公告)日：2012-03-20
申请号：US11947591
申请日：2007-11-29
申请人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
发明人： Hans-Joachim Barth , Erwin Ruderer , Alexander Von Glasow , Philipp Riess , Erdem Kaltalioglu , Peter Baumgartner , Thomas Benetik , Helmut Horst Tews
IPC分类号： H01L27/108 , H01L21/20
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes a plurality of first parallel conductive members, and a plurality of second parallel conductive members disposed over the plurality of first parallel conductive members. A first base member is coupled to an end of the plurality of first parallel conductive members, and a second base member is coupled to an end of the plurality of second parallel conductive members. A connecting member is disposed between the plurality of first parallel conductive members and the plurality of second parallel conductive members, wherein the connecting member includes at least one elongated via.
摘要翻译：公开了半导体器件及其制造方法。在一个实施例中，电容器板包括多个第一平行导电构件，以及设置在多个第一平行导电构件上的多个第二平行导电构件。第一基座构件联接到多个第一平行导电构件的端部，并且第二基座构件联接到多个第二平行导电构件的端部。连接构件设置在多个第一平行导电构件和多个第二平行导电构件之间，其中连接构件包括至少一个细长通孔。

8. 发明授权

US07812424B2 Moisture barrier capacitors in semiconductor components 有权
标题翻译：半导体元件中的湿气电容器
公开(公告)号：US07812424B2
公开(公告)日：2010-10-12
申请号：US11962395
申请日：2007-12-21
申请人： Hans-Joachim Barth , Helmut Horst Tews
发明人： Hans-Joachim Barth , Helmut Horst Tews
IPC分类号： H01L29/92
CPC分类号： H01L28/75 , G06F17/5068 , H01L21/76897 , H01L22/14 , H01L23/5223 , H01L23/5226 , H01L23/562 , H01L23/585 , H01L27/0611 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.
摘要翻译：公开了在半导体部件上形成防潮电容器的结构和方法。电容器位于半导体芯片的周围，并且包括电连接到电压节点的内板，具有用于电连接到不同电压节点的翅片的外板。

9. 发明申请

US20110278680A1 Strained Semiconductor Device and Method of Making the Same 有权
标题翻译：应变半导体器件及其制造方法
公开(公告)号：US20110278680A1
公开(公告)日：2011-11-17
申请号：US13193692
申请日：2011-07-29
申请人： Helmut Horst Tews , Andre Schenk
发明人： Helmut Horst Tews , Andre Schenk
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L29/7848 , H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L27/088 , H01L27/1203 , H01L29/66477 , H01L29/6653 , H01L29/66636 , H01L29/7834
摘要： In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or SOI layer). The gate electrode is electrically insulated from the semiconductor body. A first sidewall spacer is formed along a sidewall of the gate electrode. A sacrificial sidewall spacer is formed adjacent the first sidewall spacer. The sacrificial sidewall spacer and the first sidewall spacer overlying the semiconductor body. A planarization layer is formed over the semiconductor body such that a portion of the planarization layer is adjacent the sacrificial sidewall spacer. The sacrificial sidewall spacer can then be removed and a recess etched in the semiconductor body. The recess is substantially aligned between the first sidewall spacer and the portion of the planarization layer. A semiconductor material (e.g., SiGe or SiC) can then be formed in the recess.
摘要翻译：在形成半导体器件的方法中，在半导体本体（例如体硅衬底或SOI层）上形成栅电极。栅电极与半导体本体电绝缘。沿着栅电极的侧壁形成第一侧壁间隔物。邻近第一侧壁间隔件形成牺牲侧壁间隔物。牺牲侧壁间隔件和覆盖半导体本体的第一侧壁间隔件。平坦化层形成在半导体本体上，使得平坦化层的一部分与牺牲侧壁间隔物相邻。然后可以去除牺牲侧壁间隔物并在半导体本体中蚀刻凹陷。所述凹部基本上在所述第一侧壁间隔物和所述平坦化层的所述部分之间对准。然后可以在凹部中形成半导体材料（例如，SiGe或SiC）。

10. 发明授权

US07157328B2 Selective etching to increase trench surface area 有权
标题翻译：选择性蚀刻以增加沟槽表面积
公开(公告)号：US07157328B2
公开(公告)日：2007-01-02
申请号：US11047312
申请日：2005-01-31
申请人： Helmut Horst Tews , Stephan Kudelka , Kenneth T. Settlemyer
发明人： Helmut Horst Tews , Stephan Kudelka , Kenneth T. Settlemyer
IPC分类号： H01L21/8242
CPC分类号： H01L21/30604 , H01L29/66181
摘要： The surface area of the walls of a trench formed in a substrate is increased. A barrier layer is formed on the walls of the trench such that the barrier layer is thinner near the corners of the trench and is thicker between the corners of the trench. A dopant is introduced into the substrate through the barrier layer to form higher doped regions in the substrate near the corners of the trench and lesser doped regions between the corners of the trench. The barrier layer is removed, and the walls of the trench are etched in a manner that etches the lesser doped regions of the substrate at a higher rate than the higher doped regions of the substrate to widen and lengthen the trench and to form rounded corners at the intersections of the walls of the trench.
摘要翻译：在衬底中形成的沟槽的壁的表面积增加。阻挡层形成在沟槽的壁上，使得阻挡层在沟槽的角部附近更薄，并且在沟槽的角部之间更厚。通过势垒层将掺杂剂引入到衬底中，以在衬底附近的沟槽的角部附近形成更高的掺杂区域，并且在沟槽的角部之间形成较小的掺杂区域。去除阻挡层，并且以如下方式蚀刻沟槽的壁，该方式是以比衬底的较高掺杂区域更高的速率蚀刻衬底的较小掺杂区域，以加宽和延长沟槽并且形成圆角沟渠墙壁的交叉点。

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