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1. 发明授权

US07981750B2 Methods of fabrication of channel-stressed semiconductor devices 有权
标题翻译：通道应力半导体器件的制造方法
公开(公告)号：US07981750B2
公开(公告)日：2011-07-19
申请号：US12138502
申请日：2008-06-13
申请人： Hion-suck Baik , Jong-bong Park , Jung-yun Won , Hwa-sung Rhee , Byung-seo Kim , Ho Lee , Myung-sun Kim , Ji-hye Yi
发明人： Hion-suck Baik , Jong-bong Park , Jung-yun Won , Hwa-sung Rhee , Byung-seo Kim , Ho Lee , Myung-sun Kim , Ji-hye Yi
IPC分类号： H01L21/336
CPC分类号： H01L21/823807 , H01L21/823814 , H01L29/165 , H01L29/665 , H01L29/66628 , H01L29/66636 , H01L29/7843 , H01L29/7848 , Y10S438/938
摘要： In one aspect, a method of fabricating a semiconductor device is provided. The method includes forming at least one capping layer over epitaxial source/drain regions of a PMOS device, forming a stress memorization (SM) layer over the PMOS device including the at least one capping layer and over an adjacent NMOS device, and treating the SM layer formed over the NMOS and PMOS devices to induce tensile stress in a channel region of the NMOS device.
摘要翻译：一方面，提供一种制造半导体器件的方法。该方法包括在PMOS器件的外延源极/漏极区域上形成至少一个覆盖层，在包括至少一个覆盖层并且在相邻的NMOS器件上的PMOS器件上形成应力记忆（SM）层，以及处理SM 形成在NMOS和PMOS器件上的层，以在NMOS器件的沟道区域中引起拉伸应力。

2. 发明授权

US08971118B2 Methods of forming non-volatile memory devices including vertical NAND strings 有权
标题翻译：形成包括垂直NAND串的非易失性存储器件的方法
公开(公告)号：US08971118B2
公开(公告)日：2015-03-03
申请号：US14164712
申请日：2014-01-27
申请人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
发明人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
IPC分类号： G11C16/04 , G11C16/06 , H01L21/28 , H01L27/115 , H01L21/768
CPC分类号： H01L27/11582 , H01L21/28282 , H01L21/308 , H01L21/76802 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578
摘要： A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
摘要翻译：基于NAND的非易失性存储器件可以包括垂直地布置为NAND串的多个存储单元和多个字线板，每个字线板电连接到NAND串中的存储器单元的相应栅极。多个字线触点可以各自电连接到相应的字线板，其中多个字线触点与器件中的位线方向对准。

3. 发明申请

US20090273076A1 Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and elctronic apparatus including the same 有权
标题翻译：用于散热构件的胶带，包括散热构件的薄膜型半导体封装的芯片，以及包括该散热构件的电子装置
公开(公告)号：US20090273076A1
公开(公告)日：2009-11-05
申请号：US12385731
申请日：2009-04-17
申请人： Kyong-sei CHOI , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
发明人： Kyong-sei CHOI , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
IPC分类号： H01L23/498 , H01L23/36
CPC分类号： H01L23/49838 , H01L23/4985 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01079 , H05K1/0203 , H05K1/189 , H05K2201/09109 , H05K2201/1028 , H05K2201/10674 , H05K2203/1581 , H01L2924/00
摘要： Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
摘要翻译：公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间绝缘基板的底表面和散热部件的顶表面。

4. 发明授权

US09373633B2 Methods of forming non-volatile memory devices including vertical NAND strings 有权
公开(公告)号：US09373633B2
公开(公告)日：2016-06-21
申请号：US14603827
申请日：2015-01-23
申请人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
发明人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
IPC分类号： H01L21/44 , H01L27/115 , H01L21/768 , H01L21/28 , H01L21/308
CPC分类号： H01L27/11582 , H01L21/28282 , H01L21/308 , H01L21/76802 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578
摘要： A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.

5. 发明申请

US20090310415A1 NON-VOLATILE MEMORY DEVICES INCLUDING VERTICAL NAND STRINGS AND METHODS OF FORMING THE SAME 有权
标题翻译：包括垂直NAND条的非易失性存储器件及其形成方法
公开(公告)号：US20090310415A1
公开(公告)日：2009-12-17
申请号：US12480399
申请日：2009-06-08
申请人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
发明人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
IPC分类号： G11C16/04 , H01L21/302
CPC分类号： H01L27/11582 , H01L21/28282 , H01L21/308 , H01L21/76802 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578
摘要： A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
摘要翻译：基于NAND的非易失性存储器件可以包括垂直地布置为NAND串的多个存储单元和多个字线板，每个字线板电连接到NAND串中的存储器单元的相应栅极。多个字线触点可以各自电连接到相应的字线板，其中多个字线触点与器件中的位线方向对准。

6. 发明申请

US20150140813A1 Methods of Forming Non-Volatile Memory Devices Including Vertical NAND Strings 审中-公开
标题翻译：形成包括垂直NAND串的非易失性存储器件的方法
公开(公告)号：US20150140813A1
公开(公告)日：2015-05-21
申请号：US14603827
申请日：2015-01-23
申请人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
发明人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
IPC分类号： H01L27/115 , H01L21/308
CPC分类号： H01L27/11582 , H01L21/28282 , H01L21/308 , H01L21/76802 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578
摘要： A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
摘要翻译：基于NAND的非易失性存储器件可以包括垂直地布置为NAND串的多个存储单元和多个字线板，每个字线板电连接到NAND串中的存储器单元的相应栅极。多个字线触点可以各自电连接到相应的字线板，其中多个字线触点与器件中的位线方向对准。

7. 发明申请

US20110143625A1 TAPE FOR HEAT DISSIPATING MEMBER, CHIP ON FILM TYPE SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATING MEMBER, AND ELECTRONIC APPARATUS INCLUDING THE SAME 有权
标题翻译：用于散热构件的胶带，薄膜型半导体封装，包括散热构件的芯片，以及包括其的电子设备
公开(公告)号：US20110143625A1
公开(公告)日：2011-06-16
申请号：US13033307
申请日：2011-02-23
申请人： Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
发明人： Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
IPC分类号： H01J9/00
CPC分类号： H01L23/49838 , H01L23/4985 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01079 , H05K1/0203 , H05K1/189 , H05K2201/09109 , H05K2201/1028 , H05K2201/10674 , H05K2203/1581 , H01L2924/00
摘要： Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
摘要翻译：公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间绝缘基板的底表面和散热部件的顶表面。

8. 发明授权

US07915727B2 Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same 有权
标题翻译：用于散热构件的胶带，包括散热构件的薄膜型半导体封装的芯片，以及包括该散热构件的电子设备
公开(公告)号：US07915727B2
公开(公告)日：2011-03-29
申请号：US12385731
申请日：2009-04-17
申请人： Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
发明人： Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
IPC分类号： H01L23/498 , H01L23/36
CPC分类号： H01L23/49838 , H01L23/4985 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01079 , H05K1/0203 , H05K1/189 , H05K2201/09109 , H05K2201/1028 , H05K2201/10674 , H05K2203/1581 , H01L2924/00
摘要： Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
摘要翻译：公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间绝缘基板的底表面和散热部件的顶表面。

9. 发明授权

US07453716B2 Semiconductor memory device with stacked control transistors 有权
标题翻译：具有堆叠控制晶体管的半导体存储器件
公开(公告)号：US07453716B2
公开(公告)日：2008-11-18
申请号：US11238381
申请日：2005-09-29
申请人： Sung-min Kim , Eun-jung Yun , Jong-soo Seo , Du-eung Kim , Beak-hyung Cho , Byung-seo Kim
发明人： Sung-min Kim , Eun-jung Yun , Jong-soo Seo , Du-eung Kim , Beak-hyung Cho , Byung-seo Kim
IPC分类号： G11C11/00
CPC分类号： H01L27/2436 , G11C13/0004 , G11C13/003 , G11C2213/74 , G11C2213/79
摘要： In a semiconductor memory device and method, phase-change memory cells are provided, each including a plurality of control transistors formed on different layers and variable resistance devices formed of a phase-change material. Each phase-change memory cell includes a plurality of control transistors formed on different layers, and a variable resistance device formed of a phase-change material. In one example, the number of the control transistors is two. The semiconductor memory device includes a global bit line; a plurality of local bit lines connected to or disconnected from the global bit line via local bit line selection circuits which correspond to the local bit lines, respectively; and a plurality of phase-change memory cell groups storing data while being connected to the local bit lines, respectively. Each of the phase-change memory cells of each of the phase-change memory cell groups comprises a plurality of control transistors formed on different layers, and a variable resistance device formed of a phase-change material. In addition, the semiconductor memory device has a hierarchical bit line structure that uses a global bit line and local bit lines. Accordingly, it is possible to increase both the integration density of the semiconductor memory device and the amount of current flowing through each of the phase-change memory cells.
摘要翻译：在半导体存储器件和方法中，提供了相变存储单元，每个都包括形成在不同层上的多个控制晶体管和由相变材料形成的可变电阻器件。每个相变存储单元包括形成在不同层上的多个控制晶体管和由相变材料形成的可变电阻器件。在一个示例中，控制晶体管的数量是两个。半导体存储器件包括全局位线; 通过分别对应于本地位线的本地位线选择电路分别连接到全局位线或与全局位线断开的多个局部位线; 以及分别在连接到本地位线时存储数据的多个相变存储单元组。每个相变存储单元组的每个相变存储单元包括形成在不同层上的多个控制晶体管和由相变材料形成的可变电阻器件。此外，半导体存储器件具有使用全局位线和局部位线的分层位线结构。因此，可以增加半导体存储器件的集成密度和流过每个相变存储单元的电流量。

10. 发明授权

US08325527B2 Non-volatile memory devices including vertical NAND strings and methods of forming the same 有权
标题翻译：包括垂直NAND串的非易失性存储器件及其形成方法
公开(公告)号：US08325527B2
公开(公告)日：2012-12-04
申请号：US12480399
申请日：2009-06-08
申请人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
发明人： Beom-jun Jin , Byung-seo Kim , Sung-Dong Kim
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： H01L27/11582 , H01L21/28282 , H01L21/308 , H01L21/76802 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/11565 , H01L27/11578
摘要： A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
摘要翻译：基于NAND的非易失性存储器件可以包括垂直地布置为NAND串的多个存储单元和多个字线板，每个字线板电连接到NAND串中的存储器单元的相应栅极。多个字线触点可以各自电连接到相应的字线板，其中多个字线触点与器件中的位线方向对准。

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