专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09397729B2 Through chip coupling for signal transport 有权
标题翻译：通过芯片耦合进行信号传输
公开(公告)号：US09397729B2
公开(公告)日：2016-07-19
申请号：US12946072
申请日：2010-11-15
申请人： Tzu-Jin Yeh , Hsieh-Hung Hsieh , Jun-De Jin , Ming Hsien Tsai , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Tzu-Jin Yeh , Hsieh-Hung Hsieh , Jun-De Jin , Ming Hsien Tsai , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H04B5/00
CPC分类号： H04B5/0081
摘要： Through-chip coupling is utilized for signal transport, where an interface is formed between a first coil on a first integrated circuit (IC) chip and a second coil on a second IC chip. The first coil is coupled to an antenna. The second coil is coupled to an amplifier circuit. The second coil is not in direct contact with the first coil. The first coil and the second coil communicatively transmit signals between the antenna and the first amplifier circuit.
摘要翻译：芯片耦合用于信号传输，其中在第一集成电路（IC）芯片上的第一线圈和第二IC芯片上的第二线圈之间形成接口。第一线圈耦合到天线。第二线圈耦合到放大器电路。第二线圈不与第一线圈直接接触。第一线圈和第二线圈在天线和第一放大器电路之间通信地传送信号。

2. 发明授权

US08729968B2 Built-in self-test circuit for voltage controlled oscillators 有权
标题翻译：用于压控振荡器的内置自检电路
公开(公告)号：US08729968B2
公开(公告)日：2014-05-20
申请号：US13103571
申请日：2011-05-09
申请人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03L5/00
CPC分类号： G01R31/2824
摘要： A built-in self-test circuit for testing a voltage controlled oscillator comprises a voltage controlled oscillator, a buffer having an input coupled to an output of the voltage controlled oscillator and a radio frequency peak detector coupled to the output of the buffer. The radio frequency peak detector is configured to receive an ac signal from the voltage controlled oscillator and generate a dc value proportional to the ac signal at an output of the radio frequency peak detector. Furthermore, the output of the radio frequency peak detector generates a dc value proportional to an amplitude of the ac signal from the voltage controlled oscillator when the voltage controlled oscillator functions correctly. On the other hand, the output of the radio frequency peak detector is at zero volts when the voltage controlled oscillator fails to generate an ac signal.
摘要翻译：用于测试压控振荡器的内置自检电路包括压控振荡器，具有耦合到压控振荡器的输出的输入的缓冲器和耦合到缓冲器的输出的射频峰值检测器。射频峰值检测器被配置为从压控振荡器接收交流信号，并且在射频峰值检测器的输出处产生与ac信号成比例的直流值。此外，当压控振荡器正常工作时，射频峰值检测器的输出产生与来自压控振荡器的ac信号的幅度成比例的直流值。另一方面，当压控振荡器不能产生交流信号时，射频峰值检测器的输出为零伏特。

3. 发明申请

US20120286836A1 Built-in Self-test Circuit for Voltage Controlled Oscillators 有权
标题翻译：用于压控振荡器的内置自检电路
公开(公告)号：US20120286836A1
公开(公告)日：2012-11-15
申请号：US13103571
申请日：2011-05-09
申请人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03K3/84
CPC分类号： G01R31/2824
摘要： A built-in self-test circuit for testing a voltage controlled oscillator comprises a voltage controlled oscillator, a buffer having an input coupled to an output of the voltage controlled oscillator and a radio frequency peak detector coupled to the output of the buffer. The radio frequency peak detector is configured to receive an ac signal from the voltage controlled oscillator and generate a dc value proportional to the ac signal at an output of the radio frequency peak detector. Furthermore, the output of the radio frequency peak detector generates a dc value proportional to an amplitude of the ac signal from the voltage controlled oscillator when the voltage controlled oscillator functions correctly. On the other hand, the output of the radio frequency peak detector is at zero volts when the voltage controlled oscillator fails to generate an ac signal.
摘要翻译：用于测试压控振荡器的内置自检电路包括压控振荡器，具有耦合到压控振荡器的输出的输入的缓冲器和耦合到缓冲器的输出的射频峰值检测器。射频峰值检测器被配置为从压控振荡器接收交流信号，并且在射频峰值检测器的输出处产生与ac信号成比例的直流值。此外，当压控振荡器正常工作时，射频峰值检测器的输出产生与来自压控振荡器的ac信号的幅度成比例的直流值。另一方面，当压控振荡器不能产生交流信号时，射频峰值检测器的输出为零伏特。

4. 发明申请

US20120286888A1 Switched Capacitor Array for Voltage Controlled Oscillator 审中-公开
标题翻译：用于压控振荡器的开关电容阵列
公开(公告)号：US20120286888A1
公开(公告)日：2012-11-15
申请号：US13103592
申请日：2011-05-09
申请人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03B5/12 , H03H11/00
CPC分类号： H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03B2201/0266
摘要： A system comprises a voltage controlled oscillator comprising an inductor and a variable capacitor and a switched capacitor array connected in parallel with the variable capacitor. The switched capacitor array further comprises a plurality of capacitor banks wherein a thermometer code is employed to control each capacitor bank. In addition, the switched capacitor array provides N tuning steps for the oscillation frequency of the voltage controlled oscillator when the switched capacitor array is controlled by an n-bit thermometer code.
摘要翻译：一种系统包括压控振荡器，其包括电感器和可变电容器以及与可变电容器并联连接的开关电容器阵列。开关电容器阵列还包括多个电容器组，其中使用温度计代码来控制每个电容器组。此外，当开关电容器阵列由n位温度计代码控制时，开关电容器阵列为压控振荡器的振荡频率提供N个调谐步骤。

5. 发明申请

US20110260819A1 CONTINUOUSLY TUNABLE INDUCTOR WITH VARIABLE RESISTORS 审中-公开
标题翻译：具有可变电阻器的连续电容器
公开(公告)号：US20110260819A1
公开(公告)日：2011-10-27
申请号：US12766970
申请日：2010-04-26
申请人： Tzu-Jin Yeh , Kal-Wen Tan , Ming Hsien Tsai , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Tzu-Jin Yeh , Kal-Wen Tan , Ming Hsien Tsai , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H01F21/00
CPC分类号： H01F21/02 , H01F21/005 , H01F2021/125
摘要： An integrated tunable inductor includes a primary inductor having a plurality of inductor turns, at least one closed loop eddy current coil proximate the primary inductor, and at least one variable resistor integrated in series with the eddy current coil.
摘要翻译：集成可调电感器包括具有多个电感线圈的初级电感器，至少一个靠近初级电感器的闭环涡流线圈以及与涡流线圈串联集成的至少一个可变电阻器。

6. 发明授权

US09177715B2 System and method for inductive wireless signaling 有权
标题翻译：感应式无线信令系统和方法
公开(公告)号：US09177715B2
公开(公告)日：2015-11-03
申请号：US12952429
申请日：2010-11-23
申请人： Jun-De Jin , Fan-Ming Kuo , Huan-Neng Chen , Ming Hsien Tsai , Hsieh-Hung Hsieh , Tzu-Jin Yeh
发明人： Jun-De Jin , Fan-Ming Kuo , Huan-Neng Chen , Ming Hsien Tsai , Hsieh-Hung Hsieh , Tzu-Jin Yeh
IPC分类号： H01F5/00 , H01F38/14 , H01F17/00
CPC分类号： H02J5/005 , H01F5/00 , H01F17/0006 , H01F38/14 , H01F2017/0086 , H02J17/00 , H02J50/12
摘要： A transformer includes first and second semiconductor substrates. The first semiconductor substrate includes a first circuit, a first coil providing a first impedance, and a first capacitor coupled in parallel with the first coil. The second semiconductor substrate includes a second circuit, a second coil providing a second impedance and inductively coupled with the first coil, and a second capacitor coupled in parallel with the second coil.
摘要翻译：变压器包括第一和第二半导体衬底。第一半导体衬底包括第一电路，提供第一阻抗的第一线圈和与第一线圈并联耦合的第一电容器。第二半导体衬底包括第二电路，提供第二阻抗并与第一线圈感应耦合的第二线圈以及与第二线圈并联耦合的第二电容器。

7. 发明授权

US08958185B2 ESD block isolation by RF choke 有权
标题翻译： ESD阻隔隔离ESD
公开(公告)号：US08958185B2
公开(公告)日：2015-02-17
申请号：US13029240
申请日：2011-02-17
申请人： Ming Hsien Tsai , Jun-De Jin , Hsieh-Hung Hsieh , Tzu-Jin Yeh
发明人： Ming Hsien Tsai , Jun-De Jin , Hsieh-Hung Hsieh , Tzu-Jin Yeh
IPC分类号： H02H9/00 , H01L27/02 , H02H9/04 , H01C7/12 , H02H1/00 , H02H1/04 , H02H3/22 , H02H9/06
CPC分类号： H01L27/0288 , H02H9/046
摘要： A circuit includes a first node configured to receive a radio frequency (“RF”) signal, a first electrostatic discharge (ESD) protection circuit coupled to a first voltage supply rail for an RF circuit and to a second node, and a second ESD protection circuit coupled to the second node and to a second voltage supply node for the RF circuit. An RF choke circuit is coupled to the second node and to a third node disposed between the first node and the RF circuit.
摘要翻译：电路包括被配置为接收射频（“RF”）信号的第一节点，耦合到用于RF电路的第一电压供电轨和第二节点的第一静电放电（ESD）保护电路，以及第二ESD保护耦合到第二节点的电路和用于RF电路的第二电压供应节点。 RF扼流电路耦合到第二节点和设置在第一节点和RF电路之间的第三节点。

8. 发明授权

US09093977B2 Integrated passive device filter with fully on-chip ESD protection 有权
标题翻译：集成无源器件滤波器，具有完全片上ESD保护
公开(公告)号：US09093977B2
公开(公告)日：2015-07-28
申请号：US13562571
申请日：2012-07-31
申请人： Jun-De Jin , Ming Hsien Tsai , Tzu-Jin Yeh
发明人： Jun-De Jin , Ming Hsien Tsai , Tzu-Jin Yeh
IPC分类号： H02H9/00 , H03H7/40 , H02H9/04 , H01L23/60 , H01L23/64 , H01L23/522
CPC分类号： H03H7/40 , H01L23/5223 , H01L23/5227 , H01L23/60 , H01L23/64 , H01L2924/0002 , H02H9/04 , H02H9/046 , Y10T29/49117 , H01L2924/00
摘要： The present disclosure relates to an on-chip electrostatic discharge (ESD) protection circuit that may be reused for a variety of integrated circuit (IC) applications. Both inductor-capacitor (LC) parallel resonator and shunt inductor (connected to ground) are used as ESD protection circuits and also as a part of an impedance matching network for a given IC application. The ESD LC resonator can be designed with a variety of band pass filter (BPF) topologies. On-chip ESD protection circuit allows for co-optimization ESD and BPF performance simultaneously, a fully on-chip ESD solution for integrated passive device (IPD) processes, eliminates a need for active ESD device protection, additional processes to support off-chip ESD protection, reduces power consumption, and creates a reusable BPF topology.
摘要翻译：本公开涉及可以重用于各种集成电路（IC）应用的片上静电放电（ESD）保护电路。电感 - 电容（LC）并联谐振器和并联电感（连接到地）均用作ESD保护电路，也可用作给定IC应用的阻抗匹配网络的一部分。 ESD LC谐振器可以设计有各种带通滤波器（BPF）拓扑。片上ESD保护电路允许同时优化ESD和BPF性能，用于集成无源器件（IPD）工艺的完全片上ESD解决方案，无需主动ESD器件保护，另外还支持片外ESD保护保护，降低功耗，并创建可重用的BPF拓扑。

9. 发明申请

US20140036396A1 INTEGRATED PASSIVE DEVICE FILTER WITH FULLY ON-CHIP ESD PROTECTION 有权
标题翻译：集成无源器件滤波器，具有全面的片上ESD保护功能
公开(公告)号：US20140036396A1
公开(公告)日：2014-02-06
申请号：US13562571
申请日：2012-07-31
申请人： Jun-De Jin , Ming Hsien Tsai , Tzu-Jin Yeh
发明人： Jun-De Jin , Ming Hsien Tsai , Tzu-Jin Yeh
IPC分类号： H02H9/04 , H05K13/00 , H03H7/01
CPC分类号： H03H7/40 , H01L23/5223 , H01L23/5227 , H01L23/60 , H01L23/64 , H01L2924/0002 , H02H9/04 , H02H9/046 , Y10T29/49117 , H01L2924/00
摘要： The present disclosure relates to an on-chip electrostatic discharge (ESD) protection circuit that may be reused for a variety of integrated circuit (IC) applications. Both inductor-capacitor (LC) parallel resonator and shunt inductor (connected to ground) are used as ESD protection circuits and also as a part of an impedance matching network for a given IC application. The ESD LC resonator can be designed with a variety of band pass filter (BPF) topologies. On-chip ESD protection circuit allows for co-optimization ESD and BPF performance simultaneously, a fully on-chip ESD solution for integrated passive device (IPD) processes, eliminates a need for active ESD device protection, additional processes to support off-chip ESD protection, reduces power consumption, and creates a reusable BPF topology.
摘要翻译：本公开涉及可以重用于各种集成电路（IC）应用的片上静电放电（ESD）保护电路。电感 - 电容（LC）并联谐振器和并联电感（连接到地）均用作ESD保护电路，也可用作给定IC应用的阻抗匹配网络的一部分。 ESD LC谐振器可以设计有各种带通滤波器（BPF）拓扑。片上ESD保护电路允许同时优化ESD和BPF性能，用于集成无源器件（IPD）工艺的完全片上ESD解决方案，无需主动ESD器件保护，另外还支持片外ESD保护保护，降低功耗，并创建可重用的BPF拓扑。

10. 发明授权

US08848390B2 Capacitive proximity communication using tuned-inductor 有权
标题翻译：使用调谐电感的电容式近距离通信
公开(公告)号：US08848390B2
公开(公告)日：2014-09-30
申请号：US13028270
申请日：2011-02-16
申请人： Jun-De Jin , Ming Hsien Tsai , Tzu-Jin Yeh
发明人： Jun-De Jin , Ming Hsien Tsai , Tzu-Jin Yeh
IPC分类号： H05K1/11 , H05K1/14 , H01L23/48 , H01L25/065 , H01Q1/22 , H01L23/64
CPC分类号： H01L25/0657 , H01L23/48 , H01L23/645 , H01L2225/06531 , H01L2924/0002 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01Q1/2283 , H01L2924/00
摘要： A multi-chip module includes a chip stack package including at least one pair of stacked dies, the dies having overlapping opposing faces, and at least one capacitive proximity communication (CPC) interconnect between the pair of stacked dies. The CPC interconnect includes a first capacitor plate at a first one of the overlapping opposing faces and a second capacitor plate at a second one of the overlapping opposing faces spaced from and aligned with the first capacitor plate. The CPC interconnect further includes an inductive element connected in series with the first capacitor plate and second capacitor plate, wherein the capacitor plates form part of a capacitor and the capacitor cooperates with the inductor element to form a LC circuit having a resonant frequency.
摘要翻译：多芯片模块包括芯片堆叠封装，其包括至少一对堆叠的裸片，所述裸片具有重叠的相对面，以及在所述一对堆叠裸片之间的至少一个电容邻近通信（CPC）互连。 CPC互连包括在重叠相对面中的第一个处的第一电容器板和与第一电容器板间隔开并与第一电容器板对准的第二个重叠相对面中的第二电容器板。 CPC互连还包括与第一电容器板和第二电容器板串联连接的电感元件，其中电容器板形成电容器的一部分，并且电容器与电感器元件配合以形成具有谐振频率的LC电路。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式