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1. 发明授权

US09437537B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09437537B2
公开(公告)日：2016-09-06
申请号：US13571524
申请日：2012-08-10
申请人： Hyun Sub Kim , Sung Bo Shim
发明人： Hyun Sub Kim , Sung Bo Shim
IPC分类号： H01L21/48 , H01L23/522 , H01L21/033 , H01L21/3213
CPC分类号： H01L23/522 , H01L21/0337 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device including conductive lines configured to include first lines extending generally in parallel in a first direction and second lines extending generally in parallel in a second direction to intersect the first direction from the respective ends of the first lines and each second line having a width wider than the first line, and dummy patterns formed between the second lines.
摘要翻译：一种半导体器件，包括导线，其被配置为包括在第一方向上大致平行延伸的第一线和在第二方向上大致平行延伸的第二线，从第一线的相应端部与第一方向相交，并且每条第二线具有宽度宽于第一行，以及形成在第二行之间的虚拟图案。

2. 发明申请

US20110149629A1 Semiconductor Memory Apparatus and Method of Operating the Same 有权
标题翻译：半导体存储器及其操作方法
公开(公告)号：US20110149629A1
公开(公告)日：2011-06-23
申请号：US12973000
申请日：2010-12-20
申请人： Sung Bo Shim , Sang Don Lee , Jong Woo Kim
发明人： Sung Bo Shim , Sang Don Lee , Jong Woo Kim
IPC分类号： G11C5/06 , G11C8/10 , G11C8/12 , G11C7/20
CPC分类号： G11C8/10 , G11C7/18 , G11C8/12 , G11C8/14 , G11C16/04 , G11C16/08
摘要： A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal.
摘要翻译：半导体存储器装置包括第一和第二存储块，每个存储块包括耦合到第一和第二本地线组的半导体元件，第一开关电路被配置为响应于第一和第二本地线组将第一全局线组耦合到第一存储器块的第一本地线组块选择信号，第二切换电路，被配置为响应于块选择信号将第二全局线组耦合到第一和第二存储器块的第二本地线组;以及第三开关电路，被配置为将第一全局线组响应于块选择信号到第二存储器块的第一本地线组。

3. 发明授权

US08391043B2 Semiconductor memory apparatus and method of operating the same 有权
标题翻译：半导体存储装置及其操作方法
公开(公告)号：US08391043B2
公开(公告)日：2013-03-05
申请号：US12973000
申请日：2010-12-20
申请人： Sung Bo Shim , Sang Don Lee , Jong Woo Kim
发明人： Sung Bo Shim , Sang Don Lee , Jong Woo Kim
IPC分类号： G11C5/06
CPC分类号： G11C8/10 , G11C7/18 , G11C8/12 , G11C8/14 , G11C16/04 , G11C16/08
摘要： A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal.
摘要翻译：半导体存储器装置包括第一和第二存储块，每个存储块包括耦合到第一和第二本地线组的半导体元件，第一开关电路被配置为响应于第一和第二本地线组将第一全局线组耦合到第一存储器块的第一本地线组块选择信号，第二切换电路，被配置为响应于块选择信号将第二全局线组耦合到第一和第二存储器块的第二本地线组;以及第三开关电路，被配置为将第一全局线组响应于块选择信号到第二存储器块的第一本地线组。

4. 发明授权

US07109109B2 Contact plug in semiconductor device and method of forming the same 有权
标题翻译：半导体器件的接触插头及其形成方法
公开(公告)号：US07109109B2
公开(公告)日：2006-09-19
申请号：US10887944
申请日：2004-07-09
申请人： Sung Bo Shim , Hee Hyun Chang
发明人： Sung Bo Shim , Hee Hyun Chang
IPC分类号： H01L21/28
CPC分类号： H01L21/76838 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： Disclosed are a contact plug in a semiconductor device and method of forming the same. After a junction region where a contact plug is formed upwardly up to the bottom of a metal wire, the raised junction region and the metal wire are connected by a contact plug. Or after a first contact plug of the same area is formed on the junction region up to the bottom of the metal wires, the first contact plug is connected by a second contact plug. Thus, the width of the contact plug except for some portions is increased by maximum. It is thus possible to prevent an electric field from being concentrated and prohibit on-current from reduced, thus improving the electrical properties of devices.
摘要翻译：公开了一种半导体器件中的接触插塞及其形成方法。在接触插塞向上形成到金属线的底部的接合区域之后，凸起的接合区域和金属线通过接触插塞连接。或者在同一区域的第一接触插塞形成在金属线的底部的接合区域上之后，第一接触插头通过第二接触插塞连接。因此，除了一些部分之外，接触塞的宽度增加最多。因此可以防止电场集中，并且阻止电流减小，从而提高器件的电气性能。

5. 发明授权

US06999343B2 Method of programming a flash memory cell and method of programming an NAND flash memory using the same 有权
标题翻译：闪速存储器单元的编程方法以及使用该闪速存储器单元编程NAND闪速存储器的方法
公开(公告)号：US06999343B2
公开(公告)日：2006-02-14
申请号：US10738235
申请日：2003-12-17
申请人： Sung Bo Shim
发明人： Sung Bo Shim
IPC分类号： G11C16/04
CPC分类号： G11C16/3404 , G11C16/3454
摘要： The disclosed is a method of programming a flash memory cell, comprising; a step of an over-programming of a flash memory cell to-be-programmed; a first recovering step of the over-programmed flash memory cell by adjusting a gate bias of the flash memory cell; a second recovering step of the over-programmed flash memory cell by setting the gate bias to a voltage of 0V and then adjusting a bulk bias of the over-programmed flash memory cell; a third recovering step of the over-programmed flash memory cell by floating the gate bias and then adjusting the bulk bias of the over-programmed flash memory cell; and a fourth recovering step of the over-programmed flash memory cell by adjusting the bulk bias of the over-programmed flash memory cell using a self-boosting operation.
摘要翻译：所公开的是一种对闪存单元进行编程的方法，包括：要编程的闪存单元的过度编程的步骤; 通过调整闪速存储单元的栅极偏置来对过程编程的闪存单元进行第一恢复步骤; 通过将栅极偏置设置为0V的电压，然后调整过程编程的闪速存储器单元的体积偏压来实现过程编程闪存单元的第二恢复步骤; 通过浮置栅极偏置然后调整过度编程的闪速存储器单元的体积偏压来实现过度编程的闪存单元的第三恢复步骤; 以及通过使用自增压操作调整过程编程的闪速存储器单元的体积偏压来对过程编程的闪存单元进行第四恢复步骤。

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