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1. 发明授权

US11641787B2 Self-rectifying resistive memory and fabrication method thereof 有权
公开(公告)号：US11641787B2
公开(公告)日：2023-05-02
申请号：US16767091
申请日：2018-03-28
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Qing Luo , Hangbing Lv , Ming Liu
IPC分类号： H10N70/00 , H01L45/00
摘要： The present disclosure provides a self-rectifying resistive memory, including: a lower electrode; a resistive material layer formed on the lower electrode and used as a storage medium; a barrier layer formed on the resistive material layer and using a semiconductor material or an insulating material; and an upper electrode formed on the barrier layer to achieve Schottky contact with the material of the barrier layer; wherein, the Schottky contact between the upper electrode and the material of the barrier layer is used to realize self-rectification of the self-rectifying resistive memory. Thus, no additional gate transistor or diode is required as the gate unit. In addition, because the device has self-rectifying characteristics, it is capable of suppressing read crosstalk in the cross-array.

2. 发明授权

US09762217B2 Random sampler adapted to one-dimension slow-varying signal 有权
公开(公告)号：US09762217B2
公开(公告)日：2017-09-12
申请号：US14888335
申请日：2013-07-15
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Dongmei Li , Qing Luo , Shengfa Liang , Hongzhang Yang , Xiaojing Li , Hao Zhang , Changqing Xie , Ming Liu
IPC分类号： H03K4/08 , A61B5/00 , H03K3/84 , H03K4/50
CPC分类号： H03K4/08 , A61B5/00 , H03K3/84 , H03K4/50
摘要： A sampler adapted to a one-dimension slow-varying signal, including: a signal preprocessing unit configured to preprocess an input signal; a slope-controllable sawtooth wave signal generating unit configured to generate a slope-controllable sawtooth wave signal and perform zero-resetting; a signal comparing unit configured to compare the preprocessed input signal from the signal preprocessing unit with the sawtooth wave signal and to output a pulse signal to the generating unit and a signal outputting unit when the preprocessed input signal is equal to the sawtooth wave signal; a counting unit configured to count a number of clock signals while the sawtooth wave signal generating unit is generating the sawtooth wave signal and to transmit the counted number to the signal outputting unit; the signal outputting unit configured to, upon receipt of the pulse signal output from the signal comparing unit, output the number counted by the counting unit at the moment.

3. 发明授权

US11205750B2 1S1R memory integrated structure with larger selector surface area which can effectively suppress leakage current in the cross array without increasing the overall size of the integrated structure and method for fabricating the same 有权
公开(公告)号：US11205750B2
公开(公告)日：2021-12-21
申请号：US16786346
申请日：2020-02-10
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Qing Luo , Hangbing Lv , Ming Liu , Xiaoxin Xu , Cheng Lu
IPC分类号： H01L45/00 , G11C13/00
摘要： The present disclosure provides a 1S1R memory integrated structure and a method for fabricating the same, wherein the 1S1R memory integrated structure includes: a word line metal, a resistive material layer, a selector lower electrode, a selector material layer, a selector upper electrode, an interconnection wire, and a bit line metal; wherein the selector material layer is in a shape of a groove, and the selector upper electrode is formed in the groove. According to the 1S1R memory integrated structure and its fabricating method in the present disclosure, by the change of the integrated position of the selector, the device area of the selector is much larger than the device area of the memory, which significantly reduces the requirement for the on-state current density of the selector.

4. 发明授权

US10665780B2 Selection device for use in bipolar resistive memory and manufacturing method therefor 有权
公开(公告)号：US10665780B2
公开(公告)日：2020-05-26
申请号：US16085400
申请日：2016-03-18
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Ming Liu , Qing Luo , Xiaoxin Xu , Hangbing Lv , Shibing Long , Qi Liu
IPC分类号： H01L29/51 , H01L45/00 , H01L27/24 , G11C13/00 , G11C11/56
摘要： A selector for a bipolar resistive random access memory and a method for fabricating the selector are provided. The method includes: providing a substrate; forming a lower electrode on the substrate, where the lower electrode is made of a metal, and the metal is made up of metal atoms which diffuse under an annealing condition of below 400° C.; forming a first metal oxide layer on the lower electrode; performing an annealing process on the first metal oxide layer to make the metal atoms in the lower electrode diffuse into the first metal oxide layer to form a first metal oxide layer doped with metal atoms; forming a second metal oxide layer on the first metal oxide layer doped with metal atoms; forming an upper electrode layer on the second metal oxide layer; and patterning the upper electrode layer to form an upper electrode.

5. 发明授权

US09418843B2 Method for manufacturing ordered nanowire array of NiO doped with Pt in situ 有权
标题翻译：用于原位掺杂Pt的NiO有序纳米线阵列的制备方法
公开(公告)号：US09418843B2
公开(公告)日：2016-08-16
申请号：US14760890
申请日：2013-01-17
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Dongmei Li , Xin Chen , Shengfa Liang , Jiebin Niu , Peiwen Zhang , Yu Liu , Xiaojing Li , Shuang Zhan , Hao Zhang , Qing Luo , Changqing Xie , Ming Liu
IPC分类号： H01L21/00 , H01L21/02 , H01L21/465 , G01N33/00 , B82Y10/00 , B82Y40/00
CPC分类号： H01L21/02565 , B82Y10/00 , B82Y40/00 , G01N33/004 , G01N33/005 , H01L21/02422 , H01L21/02581 , H01L21/02603 , H01L21/02614 , H01L21/465 , Y02A50/243
摘要： The present disclosure provides a method for manufacturing ordered nanowires array of NiO doped with Pt in situ, comprising: growing a Ni layer on a high-temperature resistant and insulated substrate; applying a photoresist on the Ni layer, pattering a pattern region of the ordered nanowires array by applying electron beam etching on the photoresist, growing Ni on the pattern region of the ordered nanowires array, peeling off the photoresist by acetone and etching the surface of the Ni layer by ion beam etching so as to etch off the Ni layer grown on the surface of the substrate and to leave the Ni on the pattern region of the ordered nanowires array to form the ordered Ni nanowires array; dipping the ordered Ni nanowires array into a solution of H2PtCl6 so as to displace Pt on the Ni nanowires array by a displacement reaction; and oxidizing the Ni nanowires array attached with Pt in an oxidation oven to obtain the ordered nanowires array of NiO doped with Pt. The present invention is simple and practical and the sensitivity and reliability of the doped sensor on the gas of CO and H2 are greatly improved.
摘要翻译：本公开提供了一种用于制造原位掺杂有Pt的NiO的有序纳米线阵列的方法，包括：在耐高温和绝缘的衬底上生长Ni层; 在Ni层上施加光致抗蚀剂，通过在光致抗蚀剂上施加电子束蚀刻来图案化有序纳米线阵列的图案区域，在有序纳米线阵列的图案区域上生长Ni，用丙酮剥离光致抗蚀剂并蚀刻 Ni层，以便蚀刻生长在衬底表面上的Ni层，并将Ni留在有序纳米线阵列的图案区上以形成有序的Ni纳米线阵列; 将有序的Ni纳米线阵列浸入H2PtCl6溶液中，通过置换反应置换Ni纳米线阵列上的Pt; 并在氧化炉中氧化附着有Pt的Ni纳米线阵列，以获得掺杂有Pt的NiO的有序纳米线阵列。本发明简单实用，掺杂传感器对CO和H2气体的灵敏度和可靠性大大提高。

6. 发明申请

US20220093150A1 FUSION MEMORY 有权
公开(公告)号：US20220093150A1
公开(公告)日：2022-03-24
申请号：US17424998
申请日：2019-01-28
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Hangbing Lv , Qing Luo , Xiaoxin Xu , Tiancheng Gong , Ming Liu
IPC分类号： G11C11/22 , H01L27/1159 , H01L27/11597 , H01L29/51 , H01L29/78 , G06N3/063
摘要： The present disclosure provides a fusion memory including a plurality of memory cells, wherein each memory cell of the plurality of memory cells includes: a bulk substrate; a source and a drain on the bulk substrate; a channel extending between the source and the drain; a ferroelectric layer on the channel; and a gate on the ferroelectric layer.

7. 发明申请

US20200176674A1 1S1R MEMORY INTEGRATED STRUCTURE AND METHOD FOR FABRICATING THE SAME 审中-公开
公开(公告)号：US20200176674A1
公开(公告)日：2020-06-04
申请号：US16786346
申请日：2020-02-10
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Qing Luo , Hangbing Lv , Ming Liu , Xiaoxin Xu , Cheng Lu
IPC分类号： H01L45/00
摘要： The present disclosure provides a 1S1R memory integrated structure and a method for fabricating the same, wherein the 1S1R memory integrated structure includes: a word line metal, a resistive material layer, a selector lower electrode, a selector material layer, a selector upper electrode, an interconnection wire, and a bit line metal; wherein the selector material layer is in a shape of a groove, and the selector upper electrode is formed in the groove. According to the 1S1R memory integrated structure and its fabricating method in the present disclosure, by the change of the integrated position of the selector, the device area of the selector is much larger than the device area of the memory, which significantly reduces the requirement for the on-state current density of the selector.

8. 发明授权

US09455741B2 Method for collecting signal with sampling frequency lower than Nyquist frequency 有权
标题翻译：采样频率低于奈奎斯特频率的信号采集方法
公开(公告)号：US09455741B2
公开(公告)日：2016-09-27
申请号：US14805868
申请日：2015-07-22
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Dongmei Li , Xiaojing Li , Shengfa Liang , Hao Zhang , Qing Luo , Changqing Xie , Ming Liu
IPC分类号： H03M7/30 , H04L27/26
CPC分类号： H03M7/3062 , H03M7/30 , H04L27/2642
摘要： A method for collecting a signal with a frequency lower than a Nyquist frequency includes, by a data transmitting end, selecting a suitable transformation base matrix for an input signal, deriving a sparse representation of the signal using the transformation base matrix to determine a sparsity of the signal, calculating a number M of compressive sampling operations according to the sparsity, sampling the signal with fNYQ/M using M channels, and integrating sampling values of each channel to obtain M measurement values. A reconstruction end reconstructs an original signal by solving optimization problems. Based on theory, compressive sampling can be performed on a sparse signal or a signal represented in a sparse manner with a frequency much lower than the Nyquist frequency, overcoming restrictions of the typical Nyquist sampling theorem. The method can be implemented simply and decrease pressure on data collection, storage, transmission and processing.
摘要翻译：收集频率低于奈奎斯特频率的信号的方法包括：通过数据发送端，为输入信号选择合适的变换基矩阵，使用变换基矩阵导出信号的稀疏表示，以确定稀疏度信号，根据稀疏度计算M个压缩采样操作，使用M个通道对fNYQ / M采样信号，并对每个通道的采样值进行积分以获得M个测量值。重建结束通过解决优化问题重建原始信号。基于理论，可以对稀疏信号或以稀疏方式表示的信号执行压缩采样，频率远低于奈奎斯特频率，克服典型奈奎斯特采样定理的限制。该方法可以简单实现，减少数据收集，存储，传输和处理的压力。

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