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1. 发明申请

US20170286334A1 ENHANCED DIRECTED SYSTEM MANAGEMENT INTERRUPT MECHANISM 审中-公开
公开(公告)号：US20170286334A1
公开(公告)日：2017-10-05
申请号：US15088429
申请日：2016-04-01
申请人： Intel Corporation
发明人： Gaurav Khanna , Prashant Sethi , Venkatesh Ramamurthy
IPC分类号： G06F13/24 , G06F12/10 , G06F9/44
CPC分类号： G06F13/24
摘要： A method is described. The method includes determining that a first of a plurality of processor cores in a multi-processor computing system has entered an idle state, triggering a SMI for the first processor core, the first processor core entering a system management mode (SMM) and performing one or more platform management operations.

2. 发明申请

US20170177377A1 STARTING APPLICATION PROCESSORS OF A VIRTUAL MACHINE 有权
公开(公告)号：US20170177377A1
公开(公告)日：2017-06-22
申请号：US14976990
申请日：2015-12-21
申请人： Intel Corporation
发明人： Arumugam Thiyagarajah , Gaurav Khanna , Stalinselvaraj Jeyasingh , Sohil Mehta , Mukesh J. Jagasia
IPC分类号： G06F9/44
CPC分类号： G06F9/4406 , G06F9/4401 , G06F9/4403 , G06F9/45558 , G06F2009/45575 , G06F2009/45579
摘要： Apparatuses, methods and storage medium associated with virtual machine application processor startup, are disclosed herein. In embodiments, an apparatus for computing may include a plurality of processor cores; and a plurality of OS modules of an OS. The OS modules may include a BSP module and an AP module. The BSP module may be configured to write into a storage area a start state of an AP of a VM, while the VM is being started up; and the AP module may be configured to start the AP at the start state, directly in a protected mode of execution without first going through a real mode of execution. Other embodiments may be described and/or claimed.

3. 发明申请

US20160371118A1 VIRTUAL MACHINE MANAGEMENT METHOD AND APPARATUS INCLUDING IDLING AND SCHEDULING OF VIRTUAL PROCESSORS 审中-公开
标题翻译：虚拟机管理方法和设备，包括虚拟处理器的定位和调度
公开(公告)号：US20160371118A1
公开(公告)日：2016-12-22
申请号：US14741782
申请日：2015-06-17
申请人： Intel Corporation
发明人： Vijay Dhanraj , Abhinav R. Karhu , Gaurav Khanna , Russell J. Fenger
IPC分类号： G06F9/50 , G06F9/455
CPC分类号： G06F9/485 , G06F9/45558 , G06F9/5027 , G06F9/5077 , G06F2009/4557 , G06F2009/45575
摘要： Apparatuses, methods and storage media associated with managing operations of a virtual machine including dynamic idling and scheduling of virtual processors on logical processors described herein. In embodiments, an apparatus may include a physical computing platform with one or more physical processors, a virtual machine manager to manage operation of virtual machines each with a priority level and with one or more virtual processors that operate on logical processor instances of the one or more physical processors, wherein the virtual machine manager tracks activities of the virtual processors that operate on a shared logical processor instance and selectively idles and schedules one or more virtual processors in view of at least the activities of the virtual processors that operate on a shared logical processor instance and the priority of the virtual machines associated with the one or more virtual processors.
摘要翻译：与管理虚拟机的操作相关联的装置，方法和存储介质，包括本文所述的逻辑处理器上的虚拟处理器的动态空闲和调度。在实施例中，装置可以包括具有一个或多个物理处理器的物理计算平台，虚拟机管理器，用于管理各自具有优先级的虚拟机的操作，以及一个或多个虚拟处理器，其在一个或多个物理处理器的逻辑处理器实例上操作更多物理处理器，其中虚拟机管理器跟踪在共享逻辑处理器实例上操作的虚拟处理器的活动，并且考虑到至少在共享逻辑上操作的虚拟处理器的活动，选择性地空闲并调度一个或多个虚拟处理器处理器实例和与一个或多个虚拟处理器相关联的虚拟机的优先级。

4. 发明授权

US10956345B2 Enhanced directed system management interrupt mechanism 有权
公开(公告)号：US10956345B2
公开(公告)日：2021-03-23
申请号：US15088429
申请日：2016-04-01
申请人： Intel Corporation
发明人： Gaurav Khanna , Prashant Sethi , Venkatesh Ramamurthy
IPC分类号： G06F13/24 , G06F1/3206 , G06F9/4401
摘要： A method is described. The method includes determining that a first of a plurality of processor cores in a multi-processor computing system has entered an idle state, triggering a SMI for the first processor core, the first processor core entering a system management mode (SMM) and performing one or more platform management operations.

5. 发明申请

US20180060078A1 METHOD FOR BOOTING A HETEROGENEOUS SYSTEM AND PRESENTING A SYMMETRIC CORE VIEW 审中-公开
公开(公告)号：US20180060078A1
公开(公告)日：2018-03-01
申请号：US15672254
申请日：2017-08-08
申请人： Intel Corporation
发明人： Eliezer Weissmann , Rinat Rappoport , Michael Mishaeli , Hisham Shafi , Oron Lenz , Jason W. Brandt , Stephen A. Fischer , Bret L. Toll , Inder M. Sodhi , Alon Naveh , Ganapati N. Srinivasa , Ashish V, Choubal , Scott D. Hahn , David A. Koufaty , Russel J. Fenger , Gaurav Khanna , Eugene Gorbatov , Mishali Naik , Andrew J. Herdrich , Abirami Prabhakaran , Sanjeev S. Sahagirdar , Paul Brett , Paolo Narvaez , Andrew D. Henroid , Dheeraj R. Subbareddy
IPC分类号： G06F9/44 , G06F9/50 , G06F9/455
摘要： A heterogeneous processor architecture and a method of booting a heterogeneous processor is described. A processor according to one embodiment comprises: a set of large physical processor cores; a set of small physical processor cores having relatively lower performance processing capabilities and relatively lower power usage relative to the large physical processor cores; and a package unit, to enable a bootstrap processor. The bootstrap processor initializes the homogeneous physical processor cores, while the heterogeneous processor presents the appearance of a homogeneous processor to a system firmware interface.

6. 发明授权

US10372493B2 Thread and/or virtual machine scheduling for cores with diverse capabilities 有权
公开(公告)号：US10372493B2
公开(公告)日：2019-08-06
申请号：US14978182
申请日：2015-12-22
申请人： Intel Corporation
发明人： Vijay Dhanraj , Gaurav Khanna , Russell J. Fenger , Monica Gupta
IPC分类号： G06F9/48 , G06F9/455 , G06F9/50
摘要： Apparatuses, methods and storage medium associated with scheduling of threads and/or virtual machines, are disclosed herein. In embodiments, an apparatus is provided with a scheduler of an operating system and/or a virtual machine monitor. The scheduler is to retrieve or receive capabilities of the cores of one or more multi-core processors of the apparatus with diverse capabilities, and schedule a plurality of threads for execution on selected one or ones of the cores, based at least in part on the capabilities of the cores and characteristics of the plurality of threads. The virtual machine monitor is to retrieve or receive capabilities of the cores, and schedule a plurality of virtual machines for execution on selected one or ones of the cores, based at least in part on the capabilities of the cores and respective priorities of the virtual machines. Other embodiments may be described and/or claimed.

7. 发明授权

US09639372B2 Apparatus and method for heterogeneous processors mapping to virtual cores 有权
公开(公告)号：US09639372B2
公开(公告)日：2017-05-02
申请号：US13730565
申请日：2012-12-28
申请人： Intel Corporation
发明人： Paolo Narvaez , Ganapati N. Srinivasa , Eugene Gorbatov , Dheeraj R. Subbareddy , Mishali Naik , Alon Naveh , Abirami Prabhakaran , Eliezer Weissmann , David A. Koufaty , Paul Brett , Scott D. Hahn , Andrew J. Herdrich , Ravishankar Iyer , Nagabhushan Chitlur , Inder M. Sodhi , Gaurav Khanna , Russell J. Fenger
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F9/3891
摘要： A heterogeneous processor architecture is described. For example, a processor according to one embodiment of the invention comprises: a set of large physical processor cores; a set of small physical processor cores having relatively lower performance processing capabilities and relatively lower power usage relative to the large physical processor cores; virtual-to-physical (V-P) mapping logic to expose the set of large physical processor cores to software through a corresponding set of virtual cores and to hide the set of small physical processor core from the software.

8. 发明申请

US20210318971A1 ENHANCED DIRECTED SYSTEM MANAGEMENT INTERRUPT MECHANISM 有权
公开(公告)号：US20210318971A1
公开(公告)日：2021-10-14
申请号：US17208336
申请日：2021-03-22
申请人： Intel Corporation
发明人： Gaurav Khanna , Prashant Sethi , Venkatesh Ramamurthy
IPC分类号： G06F13/24
摘要： An example compute node is disclosed that includes a plurality of processor cores. The example further includes an operating system (OS) having an OS power management (OSPM) engine to determine that a first of the plurality of processor cores has entered an idle state; and a system management mode (SMM) handler to detect a system management interrupt (SMI) and transition control of hardware resources of the first processor core from the OS to a basic input output system (BIOS) to enter a system management mode (SMM) in order to perform one or more platform management operations.

9. 发明授权

US09898307B2 Starting application processors of a virtual machine 有权
公开(公告)号：US09898307B2
公开(公告)日：2018-02-20
申请号：US14976990
申请日：2015-12-21
申请人： Intel Corporation
发明人： Arumugam Thiyagarajah , Gaurav Khanna , Stalinselvaraj Jeyasingh , Sohil Mehta , Mukesh J. Jagasia
IPC分类号： G06F9/00 , G06F9/24 , G06F15/177 , G06F9/44
CPC分类号： G06F9/4406 , G06F9/4401 , G06F9/4403 , G06F9/45558 , G06F2009/45575 , G06F2009/45579
摘要： Apparatuses, methods and storage medium associated with virtual machine application processor startup, are disclosed herein. In embodiments, an apparatus for computing may include a plurality of processor cores; and a plurality of OS modules of an OS. The OS modules may include a BSP module and an AP module. The BSP module may be configured to write into a storage area a start state of an AP of a VM, while the VM is being started up; and the AP module may be configured to start the AP at the start state, directly in a protected mode of execution without first going through a real mode of execution. Other embodiments may be described and/or claimed.

10. 发明申请

US20140189302A1 OPTIMAL LOGICAL PROCESSOR COUNT AND TYPE SELECTION FOR A GIVEN WORKLOAD BASED ON PLATFORM THERMALS AND POWER BUDGETING CONSTRAINTS 审中-公开
标题翻译：基于平台热量和功率限制的优化逻辑处理器计数和类型选择
公开(公告)号：US20140189302A1
公开(公告)日：2014-07-03
申请号：US13993547
申请日：2012-12-28
申请人： INTEL CORPORATION
发明人： Dheeraj R. Subbareddy , Ganapati N. Srinivasa , David A. Koufaty , Scott D. Hahn , Mishali Naik , Paolo Narvaez , Abirami Prabhakaran , Eugene Gorbatov , Alon Naveh , Inder M. Sodhi , Eliezer Weissmann , Paul Brett , Gaurav Khanna , Russell J. Fenger
IPC分类号： G06F9/38
CPC分类号： G06F9/3885 , G06F9/5094 , Y02D10/22
摘要： A processor includes multiple physical cores that support multiple logical cores of different core types, where the core types include a big core type and a small core type. A multi-threaded application includes multiple software threads are concurrently executed by a first subset of logical cores in a first time slot. Based on data gathered from monitoring the execution in the first time slot, the processor selects a second subset of logical cores for concurrent execution of the software threads in a second time slot. Each logical core in the second subset has one of the core types that matches the characteristics of one of the software threads.
摘要翻译：处理器包括多个物理核，其支持不同核心类型的多个逻辑核，其中核心类型包括大型核心类型和小型核心类型。多线程应用程序包括多个软件线程，由第一时隙中的逻辑核心的第一子集同时执行。基于从监视第一时隙中的执行收集的数据，处理器在第二时隙中选择用于在软件线程中并发执行的逻辑核心的第二子集。第二子集中的每个逻辑核心具有与其中一个软件线程的特征相匹配的核心类型之一。

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