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1. 发明授权

US09312858B2 Level shifter for a time-varying input 有权
公开(公告)号：US09312858B2
公开(公告)日：2016-04-12
申请号：US14293074
申请日：2014-06-02
申请人： International Business Machines Corporation
发明人： Derick G. Behrends , Todd A. Christensen , Travis R. Hebig , Michael Launsbach
IPC分类号： H03K19/0185 , G06F17/50
CPC分类号： H03K19/018521 , G06F17/5063 , G06F17/5081 , G06F2217/78
摘要： A level shifter circuit for coupling a first circuit, that uses a first supply voltage, with a second circuit, that uses a second supply voltage, includes an input node to receive an input signal and an output node to output to a level-shifted output signal corresponding with the input signal. An idle state on the input node corresponds with a particular binary logic value that is maintained for a first time period, and which is detected by a detection sub-circuit. Further, the level shifter circuit includes a first inverter that uses the second supply voltage, and has a feedback path between the input and output of the first inverter. The feedback path includes a first resistive element and a first transmission gate. The first transmission gate is configurable to open the feedback path when the detection sub-circuit detects an idle state on the input node of the level shifter circuit.

2. 发明授权

US09281023B2 Single ended sensing circuits for signal lines 有权
标题翻译：用于信号线的单端感测电路
公开(公告)号：US09281023B2
公开(公告)日：2016-03-08
申请号：US14146793
申请日：2014-01-03
申请人： International Business Machines Corporation
发明人： Igor Arsovski , Travis R. Hebig
IPC分类号： G11C7/08 , G11C7/12 , G11C7/06 , G11C15/04
CPC分类号： G11C7/08 , G11C7/067 , G11C7/12 , G11C15/04 , G11C2207/002
摘要： Disclosed are single-ended sensing circuits. Each of the sensing circuits comprises at least a sense amplifier connected to a sense node, an isolation field effect transistor (FET) connected in series between the sense node and a signal line node, and a pre-charged device connected to the sense node. In order to achieve a relatively fast pre-charge of both the sense and signal line nodes and to also achieve a relatively fast and accurate sense of the sense node, the single-ended circuits further incorporate a variable reference voltage generator connected to the gate of the isolation FET for selectively applying different reference voltages to the gate during pre-charging and sensing operations, respectively, and/or a second pre-charge device connected to the signal line node for facilitating pre-charging of that signal line node.
摘要翻译：公开了单端感测电路。每个感测电路至少包括连接到感测节点的读出放大器，串联连接在感测节点和信号线节点之间的隔离场效应晶体管（FET）以及连接到感测节点的预充电器件。为了实现感测和信号线路节点的相对较快的预充电并且还实现感测节点的相对快速和准确的感测，单端电路还包括连接到门极的可变参考电压发生器隔离FET分别用于在预充电和感测操作期间选择性地将不同的参考电压施加到栅极，和/或连接到信号线节点的第二预充电器件用于促进该信号线节点的预充电。

3. 发明授权

US09088277B2 Leakage reduction in output driver circuits 有权
标题翻译：输出驱动电路的漏电减少
公开(公告)号：US09088277B2
公开(公告)日：2015-07-21
申请号：US14074926
申请日：2013-11-08
申请人： International Business Machines Corporation
发明人： Igor Arsovski , Travis R. Hebig
IPC分类号： H03K19/0175 , H03K19/096 , H03K19/0944 , H03K19/00 , H03K5/135
CPC分类号： H03K19/0013 , H03K5/135 , H03K19/0944 , H03K19/0963
摘要： An output driver circuit may include a electrically conductive medium, an output logic inverter having a first switch adapted to couple a first positive supply voltage to the electrically conductive medium and a second switch adapted to couple a ground supply voltage to the conductive medium. A first biasing network includes a first input that is coupled to the conductive medium, a second input that receives a clock signal, and a first output that is adapted to couple a second positive supply voltage to each input of the first and the second switch. Based on the second switch coupling the conductive medium to the ground supply voltage and the received clock signal generating a logic low, the biasing network reverse biases the first switch by coupling the second positive supply voltage to the respective input of the first switch causing a leakage current reduction in the first switch.
摘要翻译：输出驱动器电路可以包括导电介质，输出逻辑反相器，其具有适于将第一正电源电压耦合到导电介质的第一开关和适于将接地电源电压耦合到导电介质的第二开关。第一偏置网络包括耦合到导电介质的第一输入端，接收时钟信号的第二输入端和适于将第二正电源电压耦合到第一和第二开关的每个输入端的第一输出端。基于将导电介质耦合到接地电源电压并且接收的时钟信号产生逻辑低的第二开关，偏置网络通过将第二正电源电压耦合到第一开关的相应输入端而产生泄漏来反向偏置第一开关，导致泄漏当前减少了第一个开关。

4. 发明申请

US20150130510A1 LEAKAGE REDUCTION IN OUTPUT DRIVER CIRCUITS 有权
标题翻译：输出驱动电路中的泄漏减少
公开(公告)号：US20150130510A1
公开(公告)日：2015-05-14
申请号：US14074926
申请日：2013-11-08
申请人： International Business Machines Corporation
发明人： Igor Arsovski , Travis R. Hebig
IPC分类号： H03K19/00 , H03K19/0944
CPC分类号： H03K19/0013 , H03K5/135 , H03K19/0944 , H03K19/0963
摘要： An output driver circuit may include a electrically conductive medium, an output logic inverter having a first switch adapted to couple a first positive supply voltage to the electrically conductive medium and a second switch adapted to couple a ground supply voltage to the conductive medium. A first biasing network includes a first input that is coupled to the conductive medium, a second input that receives a clock signal, and a first output that is adapted to couple a second positive supply voltage to each input of the first and the second switch. Based on the second switch coupling the conductive medium to the ground supply voltage and the received clock signal generating a logic low, the biasing network reverse biases the first switch by coupling the second positive supply voltage to the respective input of the first switch causing a leakage current reduction in the first switch.
摘要翻译：输出驱动器电路可以包括导电介质，输出逻辑反相器，其具有适于将第一正电源电压耦合到导电介质的第一开关和适于将接地电源电压耦合到导电介质的第二开关。第一偏置网络包括耦合到导电介质的第一输入端，接收时钟信号的第二输入端和适于将第二正电源电压耦合到第一和第二开关的每个输入端的第一输出端。基于将导电介质耦合到接地电源电压并且接收的时钟信号产生逻辑低的第二开关，偏置网络通过将第二正电源电压耦合到第一开关的相应输入端而产生泄漏来反向偏置第一开关，导致泄漏当前减少了第一个开关。

5. 发明申请

US20140127875A1 INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA 有权
标题翻译：集成的解压电容器通过硅利用
公开(公告)号：US20140127875A1
公开(公告)日：2014-05-08
申请号：US13763823
申请日：2013-02-11
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Derick G. Behrends , Todd A. Christensen , Travis R. Hebig , Michael Launsbach , John E. Sheets, II
IPC分类号： H01L49/02
CPC分类号： H01L28/40 , H01L21/76898 , H01L23/481 , H01L29/945 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device may include a through substrate via (TSV) conductive structure that may extend vertically through two or more layers of the semiconductor device. The TSV conductive structure may be coupled to a first voltage supply. The semiconductor device may include substrate layer. The substrate layer may include a first dopant region and a second dopant region. The first dopant region may be coupled to a second voltage supply. The second dopant region may be in electrical communication with the TSV conductive structure. The semiconductor device may include a first metal layer and a first insulator layer disposed between the substrate layer and the first metal layer. The first metal layer may laterally contact the TSV conductive structure. The first and second voltage supply may be adapted to create a capacitance at a junction between the first dopant region and the second dopant region.
摘要翻译：半导体器件可以包括可以垂直延伸穿过半导体器件的两层或更多层的贯穿衬底通孔（TSV）导电结构。 TSV导电结构可以耦合到第一电压源。半导体器件可以包括衬底层。衬底层可以包括第一掺杂区和第二掺杂区。第一掺杂剂区域可以耦合到第二电压源。第二掺杂剂区域可以与TSV导电结构电连通。半导体器件可以包括第一金属层和设置在衬底层和第一金属层之间的第一绝缘体层。第一金属层可横向接触TSV导电结构。第一和第二电压源可以适于在第一掺杂剂区域和第二掺杂剂区域之间的结处产生电容。

6. 发明申请

US20170191978A1 RECYCLATE VERIFICATION 有权
公开(公告)号：US20170191978A1
公开(公告)日：2017-07-06
申请号：US15468026
申请日：2017-03-23
申请人： International Business Machines Corporation
发明人： Travis R. Hebig , Joseph Kuczynski , Steven R. Nickel
IPC分类号： G01N33/44 , C08J3/00 , C08J3/20
CPC分类号： C08K5/092 , C08J3/005 , C08J3/203 , C08J11/04 , C08J2300/00 , C08J2300/30 , C08J2347/00 , C08J2355/02 , C08J2369/00 , C08J2400/00 , C08J2400/30 , C08J2447/00 , C08J2469/00 , C08K5/09 , C08L55/02 , C08L2666/02 , G01N33/442
摘要： A composition for recyclate verification is produced by adding a predetermined quantity of one or more verification compounds to a base resin. Each of the verification compounds is thermally stable over a range of temperatures that includes the maximum processing temperature of the base resin but is less than the degradation temperature of the base resin. In some embodiments, a thermoplastic material provided for verification as a recyclate is analyzed to detect the presence (and, optionally, the loading level) of one or more verification compounds associated with the base resin of the thermoplastic material. In some embodiments, a computer-implemented method for recyclate verification is performed using a computer program product. In some embodiments, a thermoplastic material verified as a recyclate is heated to drive off the verification compound(s), then a known quantity of the verification compound(s) is added to the recyclate, which is then blended with virgin base resin material.

7. 发明授权

US09287873B2 Level shifter for a time-varying input 有权
标题翻译：电平移位器用于时变输入
公开(公告)号：US09287873B2
公开(公告)日：2016-03-15
申请号：US14463829
申请日：2014-08-20
申请人： International Business Machines Corporation
发明人： Derick G. Behrends , Todd A. Christensen , Travis R. Hebig , Michael Launsbach
IPC分类号： H03K19/018 , H03K19/0185
CPC分类号： H03K19/018521 , G06F17/5063 , G06F17/5081 , G06F2217/78
摘要： A level shifter circuit for coupling a first circuit, that uses a first supply voltage, with a second circuit, that uses a second supply voltage, includes an input node to receive an input signal and an output node to output to a level-shifted output signal corresponding with the input signal. An idle state on the input node corresponds with a particular binary logic value that is maintained for a first time period, and which is detected by a detection sub-circuit. Further, the level shifter circuit includes a first inverter that uses the second supply voltage, and has a feedback path between the input and output of the first inverter. The feedback path includes a first resistive element and a first transmission gate. The first transmission gate is configurable to open the feedback path when the detection sub-circuit detects an idle state on the input node of the level shifter circuit.
摘要翻译：用于将使用第一电源电压的第一电路与使用第二电源电压的第二电路耦合的电平移动器电路包括用于接收输入信号的输入节点和输出到电平移位输出的输出节点信号与输入信号对应。输入节点上的空闲状态对应于由第一时间段维持的特定二进制逻辑值，并由检测子电路检测。此外，电平移位器电路包括使用第二电源电压的第一反相器，并且在第一反相器的输入和输出之间具有反馈路径。反馈路径包括第一电阻元件和第一传输门。当检测子电路检测到电平移位器电路的输入节点上的空闲状态时，第一传输门可配置为打开反馈路径。

8. 发明申请

US20160060138A1 REMOVAL OF HAB-PRODUCED TOXINS FROM BODIES OF WATER 有权
公开(公告)号：US20160060138A1
公开(公告)日：2016-03-03
申请号：US14476430
申请日：2014-09-03
申请人： International Business Machines Corporation
发明人： Travis R. Hebig , Joseph Kuczynski , Steven R. Nickel
IPC分类号： C02F1/26
CPC分类号： C02F1/26 , B01D11/0288 , B01D11/0292 , B01D11/0484 , B01D11/0492 , B01D17/0217 , B01D21/262 , C02F2101/30 , C02F2103/007 , C02F2103/08 , C02F2209/006 , C02F2209/36
摘要： One or more brevetoxins or other toxins produced by red tides or other harmful algal blooms (HABs) are removed from a body of water by contacting an aqueous phase containing water, algae and one or more HAB-produced toxins with an organic phase, extracting the one or more toxins into the organic phase, and separating the organic phase enriched in the one or more toxins from the aqueous phase depleted in the one or more toxins. In some embodiments, the organic phase is comprised of vegetable oil, mineral oil, or other suitable oil. In some embodiments, an annular centrifugal contactor is used to accomplish the contacting, extracting, and separating. In some embodiments, the toxin-depleted aqueous phase is pumped back into the source of the aqueous phase, and the toxin-enriched organic phase is recirculated until a predetermined threshold concentration of the one or more toxins is met.

9. 发明授权

US09218880B2 Partial update in a ternary content addressable memory 有权
标题翻译：三进制内容可寻址内存中的部分更新
公开(公告)号：US09218880B2
公开(公告)日：2015-12-22
申请号：US14282298
申请日：2014-05-20
申请人： International Business Machines Corporation
发明人： Igor Arsovski , Derick G. Behrends , Todd A. Christensen , Travis R. Hebig , Michael Launsbach
IPC分类号： G11C15/00 , G11C15/04 , G06F17/50
CPC分类号： G11C15/046 , G06F17/5054 , G06F2217/64 , G06F2217/86 , G11C15/04
摘要： A TCAM may have a plurality of rows of cells. Each row may have a match line. Each cell may have elements for storing first and second bits, and compare circuitry associated to determine matches between a bit of a search word and data stored in the cell. For at least one first row of the rows, the TCAM includes a valid row cell having at least one element to store a partial update indication. The valid row cell may cause the match line associated with the first row to signal that the first row does not match a search word when the partial update indication associated with the first row is enabled. When the partial update indication associated with the first row is disabled, the determination of matches with a search word is performed solely by the compare circuitry without influence of the valid row cell.
摘要翻译： TCAM可以具有多行单元。每行可能有一个匹配行。每个小区可以具有用于存储第一和第二比特的元素，并且比较相关联的电路以确定搜索词的比特和存储在小区中的数据之间的匹配。对于行的至少一行第一行，TCAM包括具有至少一个元素以存储部分更新指示的有效行单元。当与第一行相关联的部分更新指示被启用时，有效行单元可能导致与第一行相关联的匹配行表示第一行与搜索词不匹配。当与第一行相关联的部分更新指示被禁用时，与搜索字匹配的确定仅由比较电路执行而不影响有效行单元。

10. 发明申请

US20150349778A1 LEVEL SHIFTER FOR A TIME-VARYING INPUT 有权
标题翻译：等级变换器用于时变输入
公开(公告)号：US20150349778A1
公开(公告)日：2015-12-03
申请号：US14293074
申请日：2014-06-02
申请人： International Business Machines Corporation
发明人： Derick G. Behrends , Todd A. Christensen , Travis R. Hebig , Michael Launsbach
IPC分类号： H03K19/0185 , G06F17/50
CPC分类号： H03K19/018521 , G06F17/5063 , G06F17/5081 , G06F2217/78
摘要： A level shifter circuit for coupling a first circuit, that uses a first supply voltage, with a second circuit, that uses a second supply voltage, includes an input node to receive an input signal and an output node to output to a level-shifted output signal corresponding with the input signal. An idle state on the input node corresponds with a particular binary logic value that is maintained for a first time period, and which is detected by a detection sub-circuit. Further, the level shifter circuit includes a first inverter that uses the second supply voltage, and has a feedback path between the input and output of the first inverter. The feedback path includes a first resistive element and a first transmission gate. The first transmission gate is configurable to open the feedback path when the detection sub-circuit detects an idle state on the input node of the level shifter circuit.
摘要翻译：用于将使用第一电源电压的第一电路与使用第二电源电压的第二电路耦合的电平移动器电路包括用于接收输入信号的输入节点和输出到电平移位输出的输出节点信号与输入信号对应。输入节点上的空闲状态对应于由第一时间段维持的特定二进制逻辑值，并由检测子电路检测。此外，电平移位器电路包括使用第二电源电压的第一反相器，并且在第一反相器的输入和输出之间具有反馈路径。反馈路径包括第一电阻元件和第一传输门。当检测子电路检测到电平移位器电路的输入节点上的空闲状态时，第一传输门可配置为打开反馈路径。

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